1 /*
2  * Driver for Regulator part of Palmas PMIC Chips
3  *
4  * Copyright 2011-2013 Texas Instruments Inc.
5  *
6  * Author: Graeme Gregory <gg@slimlogic.co.uk>
7  * Author: Ian Lartey <ian@slimlogic.co.uk>
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under  the terms of the GNU General  Public License as published by the
11  *  Free Software Foundation;  either version 2 of the License, or (at your
12  *  option) any later version.
13  *
14  */
15 
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/err.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/driver.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/slab.h>
24 #include <linux/regmap.h>
25 #include <linux/mfd/palmas.h>
26 #include <linux/of.h>
27 #include <linux/of_platform.h>
28 #include <linux/regulator/of_regulator.h>
29 
30 static const struct regulator_linear_range smps_low_ranges[] = {
31 	REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
32 	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
33 	REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
34 	REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
35 };
36 
37 static const struct regulator_linear_range smps_high_ranges[] = {
38 	REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
39 	REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
40 	REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
41 	REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
42 };
43 
44 static struct palmas_regs_info palmas_generic_regs_info[] = {
45 	{
46 		.name		= "SMPS12",
47 		.sname		= "smps1-in",
48 		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,
49 		.ctrl_addr	= PALMAS_SMPS12_CTRL,
50 		.tstep_addr	= PALMAS_SMPS12_TSTEP,
51 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
52 	},
53 	{
54 		.name		= "SMPS123",
55 		.sname		= "smps1-in",
56 		.vsel_addr	= PALMAS_SMPS12_VOLTAGE,
57 		.ctrl_addr	= PALMAS_SMPS12_CTRL,
58 		.tstep_addr	= PALMAS_SMPS12_TSTEP,
59 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
60 	},
61 	{
62 		.name		= "SMPS3",
63 		.sname		= "smps3-in",
64 		.vsel_addr	= PALMAS_SMPS3_VOLTAGE,
65 		.ctrl_addr	= PALMAS_SMPS3_CTRL,
66 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
67 	},
68 	{
69 		.name		= "SMPS45",
70 		.sname		= "smps4-in",
71 		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,
72 		.ctrl_addr	= PALMAS_SMPS45_CTRL,
73 		.tstep_addr	= PALMAS_SMPS45_TSTEP,
74 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
75 	},
76 	{
77 		.name		= "SMPS457",
78 		.sname		= "smps4-in",
79 		.vsel_addr	= PALMAS_SMPS45_VOLTAGE,
80 		.ctrl_addr	= PALMAS_SMPS45_CTRL,
81 		.tstep_addr	= PALMAS_SMPS45_TSTEP,
82 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
83 	},
84 	{
85 		.name		= "SMPS6",
86 		.sname		= "smps6-in",
87 		.vsel_addr	= PALMAS_SMPS6_VOLTAGE,
88 		.ctrl_addr	= PALMAS_SMPS6_CTRL,
89 		.tstep_addr	= PALMAS_SMPS6_TSTEP,
90 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
91 	},
92 	{
93 		.name		= "SMPS7",
94 		.sname		= "smps7-in",
95 		.vsel_addr	= PALMAS_SMPS7_VOLTAGE,
96 		.ctrl_addr	= PALMAS_SMPS7_CTRL,
97 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
98 	},
99 	{
100 		.name		= "SMPS8",
101 		.sname		= "smps8-in",
102 		.vsel_addr	= PALMAS_SMPS8_VOLTAGE,
103 		.ctrl_addr	= PALMAS_SMPS8_CTRL,
104 		.tstep_addr	= PALMAS_SMPS8_TSTEP,
105 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
106 	},
107 	{
108 		.name		= "SMPS9",
109 		.sname		= "smps9-in",
110 		.vsel_addr	= PALMAS_SMPS9_VOLTAGE,
111 		.ctrl_addr	= PALMAS_SMPS9_CTRL,
112 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
113 	},
114 	{
115 		.name		= "SMPS10_OUT2",
116 		.sname		= "smps10-in",
117 		.ctrl_addr	= PALMAS_SMPS10_CTRL,
118 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
119 	},
120 	{
121 		.name		= "SMPS10_OUT1",
122 		.sname		= "smps10-out2",
123 		.ctrl_addr	= PALMAS_SMPS10_CTRL,
124 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
125 	},
126 	{
127 		.name		= "LDO1",
128 		.sname		= "ldo1-in",
129 		.vsel_addr	= PALMAS_LDO1_VOLTAGE,
130 		.ctrl_addr	= PALMAS_LDO1_CTRL,
131 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO1,
132 	},
133 	{
134 		.name		= "LDO2",
135 		.sname		= "ldo2-in",
136 		.vsel_addr	= PALMAS_LDO2_VOLTAGE,
137 		.ctrl_addr	= PALMAS_LDO2_CTRL,
138 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO2,
139 	},
140 	{
141 		.name		= "LDO3",
142 		.sname		= "ldo3-in",
143 		.vsel_addr	= PALMAS_LDO3_VOLTAGE,
144 		.ctrl_addr	= PALMAS_LDO3_CTRL,
145 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO3,
146 	},
147 	{
148 		.name		= "LDO4",
149 		.sname		= "ldo4-in",
150 		.vsel_addr	= PALMAS_LDO4_VOLTAGE,
151 		.ctrl_addr	= PALMAS_LDO4_CTRL,
152 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO4,
153 	},
154 	{
155 		.name		= "LDO5",
156 		.sname		= "ldo5-in",
157 		.vsel_addr	= PALMAS_LDO5_VOLTAGE,
158 		.ctrl_addr	= PALMAS_LDO5_CTRL,
159 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO5,
160 	},
161 	{
162 		.name		= "LDO6",
163 		.sname		= "ldo6-in",
164 		.vsel_addr	= PALMAS_LDO6_VOLTAGE,
165 		.ctrl_addr	= PALMAS_LDO6_CTRL,
166 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO6,
167 	},
168 	{
169 		.name		= "LDO7",
170 		.sname		= "ldo7-in",
171 		.vsel_addr	= PALMAS_LDO7_VOLTAGE,
172 		.ctrl_addr	= PALMAS_LDO7_CTRL,
173 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO7,
174 	},
175 	{
176 		.name		= "LDO8",
177 		.sname		= "ldo8-in",
178 		.vsel_addr	= PALMAS_LDO8_VOLTAGE,
179 		.ctrl_addr	= PALMAS_LDO8_CTRL,
180 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO8,
181 	},
182 	{
183 		.name		= "LDO9",
184 		.sname		= "ldo9-in",
185 		.vsel_addr	= PALMAS_LDO9_VOLTAGE,
186 		.ctrl_addr	= PALMAS_LDO9_CTRL,
187 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDO9,
188 	},
189 	{
190 		.name		= "LDOLN",
191 		.sname		= "ldoln-in",
192 		.vsel_addr	= PALMAS_LDOLN_VOLTAGE,
193 		.ctrl_addr	= PALMAS_LDOLN_CTRL,
194 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
195 	},
196 	{
197 		.name		= "LDOUSB",
198 		.sname		= "ldousb-in",
199 		.vsel_addr	= PALMAS_LDOUSB_VOLTAGE,
200 		.ctrl_addr	= PALMAS_LDOUSB_CTRL,
201 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
202 	},
203 	{
204 		.name		= "REGEN1",
205 		.ctrl_addr	= PALMAS_REGEN1_CTRL,
206 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
207 	},
208 	{
209 		.name		= "REGEN2",
210 		.ctrl_addr	= PALMAS_REGEN2_CTRL,
211 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
212 	},
213 	{
214 		.name		= "REGEN3",
215 		.ctrl_addr	= PALMAS_REGEN3_CTRL,
216 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
217 	},
218 	{
219 		.name		= "SYSEN1",
220 		.ctrl_addr	= PALMAS_SYSEN1_CTRL,
221 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
222 	},
223 	{
224 		.name		= "SYSEN2",
225 		.ctrl_addr	= PALMAS_SYSEN2_CTRL,
226 		.sleep_id	= PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
227 	},
228 };
229 
230 static struct palmas_regs_info tps65917_regs_info[] = {
231 	{
232 		.name		= "SMPS1",
233 		.sname		= "smps1-in",
234 		.vsel_addr	= TPS65917_SMPS1_VOLTAGE,
235 		.ctrl_addr	= TPS65917_SMPS1_CTRL,
236 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
237 	},
238 	{
239 		.name		= "SMPS2",
240 		.sname		= "smps2-in",
241 		.vsel_addr	= TPS65917_SMPS2_VOLTAGE,
242 		.ctrl_addr	= TPS65917_SMPS2_CTRL,
243 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
244 	},
245 	{
246 		.name		= "SMPS3",
247 		.sname		= "smps3-in",
248 		.vsel_addr	= TPS65917_SMPS3_VOLTAGE,
249 		.ctrl_addr	= TPS65917_SMPS3_CTRL,
250 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
251 	},
252 	{
253 		.name		= "SMPS4",
254 		.sname		= "smps4-in",
255 		.vsel_addr	= TPS65917_SMPS4_VOLTAGE,
256 		.ctrl_addr	= TPS65917_SMPS4_CTRL,
257 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
258 	},
259 	{
260 		.name		= "SMPS5",
261 		.sname		= "smps5-in",
262 		.vsel_addr	= TPS65917_SMPS5_VOLTAGE,
263 		.ctrl_addr	= TPS65917_SMPS5_CTRL,
264 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
265 	},
266 	{
267 		.name		= "SMPS12",
268 		.sname		= "smps1-in",
269 		.vsel_addr	= TPS65917_SMPS1_VOLTAGE,
270 		.ctrl_addr	= TPS65917_SMPS1_CTRL,
271 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
272 	},
273 	{
274 		.name		= "LDO1",
275 		.sname		= "ldo1-in",
276 		.vsel_addr	= TPS65917_LDO1_VOLTAGE,
277 		.ctrl_addr	= TPS65917_LDO1_CTRL,
278 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO1,
279 	},
280 	{
281 		.name		= "LDO2",
282 		.sname		= "ldo2-in",
283 		.vsel_addr	= TPS65917_LDO2_VOLTAGE,
284 		.ctrl_addr	= TPS65917_LDO2_CTRL,
285 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO2,
286 	},
287 	{
288 		.name		= "LDO3",
289 		.sname		= "ldo3-in",
290 		.vsel_addr	= TPS65917_LDO3_VOLTAGE,
291 		.ctrl_addr	= TPS65917_LDO3_CTRL,
292 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO3,
293 	},
294 	{
295 		.name		= "LDO4",
296 		.sname		= "ldo4-in",
297 		.vsel_addr	= TPS65917_LDO4_VOLTAGE,
298 		.ctrl_addr	= TPS65917_LDO4_CTRL,
299 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO4,
300 	},
301 	{
302 		.name		= "LDO5",
303 		.sname		= "ldo5-in",
304 		.vsel_addr	= TPS65917_LDO5_VOLTAGE,
305 		.ctrl_addr	= TPS65917_LDO5_CTRL,
306 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_LDO5,
307 	},
308 	{
309 		.name		= "REGEN1",
310 		.ctrl_addr	= TPS65917_REGEN1_CTRL,
311 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
312 	},
313 	{
314 		.name		= "REGEN2",
315 		.ctrl_addr	= TPS65917_REGEN2_CTRL,
316 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
317 	},
318 	{
319 		.name		= "REGEN3",
320 		.ctrl_addr	= TPS65917_REGEN3_CTRL,
321 		.sleep_id	= TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
322 	},
323 };
324 
325 #define EXTERNAL_REQUESTOR(_id, _offset, _pos)		\
326 	[PALMAS_EXTERNAL_REQSTR_ID_##_id] = {		\
327 		.id = PALMAS_EXTERNAL_REQSTR_ID_##_id,	\
328 		.reg_offset = _offset,			\
329 		.bit_pos = _pos,			\
330 	}
331 
332 static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
333 	EXTERNAL_REQUESTOR(REGEN1, 0, 0),
334 	EXTERNAL_REQUESTOR(REGEN2, 0, 1),
335 	EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
336 	EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
337 	EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
338 	EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
339 	EXTERNAL_REQUESTOR(REGEN3, 0, 6),
340 	EXTERNAL_REQUESTOR(SMPS12, 1, 0),
341 	EXTERNAL_REQUESTOR(SMPS3, 1, 1),
342 	EXTERNAL_REQUESTOR(SMPS45, 1, 2),
343 	EXTERNAL_REQUESTOR(SMPS6, 1, 3),
344 	EXTERNAL_REQUESTOR(SMPS7, 1, 4),
345 	EXTERNAL_REQUESTOR(SMPS8, 1, 5),
346 	EXTERNAL_REQUESTOR(SMPS9, 1, 6),
347 	EXTERNAL_REQUESTOR(SMPS10, 1, 7),
348 	EXTERNAL_REQUESTOR(LDO1, 2, 0),
349 	EXTERNAL_REQUESTOR(LDO2, 2, 1),
350 	EXTERNAL_REQUESTOR(LDO3, 2, 2),
351 	EXTERNAL_REQUESTOR(LDO4, 2, 3),
352 	EXTERNAL_REQUESTOR(LDO5, 2, 4),
353 	EXTERNAL_REQUESTOR(LDO6, 2, 5),
354 	EXTERNAL_REQUESTOR(LDO7, 2, 6),
355 	EXTERNAL_REQUESTOR(LDO8, 2, 7),
356 	EXTERNAL_REQUESTOR(LDO9, 3, 0),
357 	EXTERNAL_REQUESTOR(LDOLN, 3, 1),
358 	EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
359 };
360 
361 #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos)		\
362 	[TPS65917_EXTERNAL_REQSTR_ID_##_id] = {		\
363 		.id = TPS65917_EXTERNAL_REQSTR_ID_##_id,	\
364 		.reg_offset = _offset,			\
365 		.bit_pos = _pos,			\
366 	}
367 
368 static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
369 	EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
370 	EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
371 	EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
372 	EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
373 	EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
374 	EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
375 	EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
376 	EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
377 	EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
378 	EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
379 	EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
380 	EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
381 	EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
382 	EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
383 };
384 
385 static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
386 
387 #define SMPS_CTRL_MODE_OFF		0x00
388 #define SMPS_CTRL_MODE_ON		0x01
389 #define SMPS_CTRL_MODE_ECO		0x02
390 #define SMPS_CTRL_MODE_PWM		0x03
391 
392 #define PALMAS_SMPS_NUM_VOLTAGES	122
393 #define PALMAS_SMPS10_NUM_VOLTAGES	2
394 #define PALMAS_LDO_NUM_VOLTAGES		50
395 
396 #define SMPS10_VSEL			(1<<3)
397 #define SMPS10_BOOST_EN			(1<<2)
398 #define SMPS10_BYPASS_EN		(1<<1)
399 #define SMPS10_SWITCH_EN		(1<<0)
400 
401 #define REGULATOR_SLAVE			0
402 
403 static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
404 		unsigned int *dest)
405 {
406 	unsigned int addr;
407 
408 	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
409 
410 	return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
411 }
412 
413 static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
414 		unsigned int value)
415 {
416 	unsigned int addr;
417 
418 	addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
419 
420 	return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
421 }
422 
423 static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
424 		unsigned int *dest)
425 {
426 	unsigned int addr;
427 
428 	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
429 
430 	return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
431 }
432 
433 static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
434 		unsigned int value)
435 {
436 	unsigned int addr;
437 
438 	addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
439 
440 	return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
441 }
442 
443 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
444 {
445 	int id = rdev_get_id(dev);
446 	int ret;
447 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
448 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
449 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
450 	unsigned int reg;
451 	bool rail_enable = true;
452 
453 	ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
454 	if (ret)
455 		return ret;
456 
457 	reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
458 
459 	if (reg == SMPS_CTRL_MODE_OFF)
460 		rail_enable = false;
461 
462 	switch (mode) {
463 	case REGULATOR_MODE_NORMAL:
464 		reg |= SMPS_CTRL_MODE_ON;
465 		break;
466 	case REGULATOR_MODE_IDLE:
467 		reg |= SMPS_CTRL_MODE_ECO;
468 		break;
469 	case REGULATOR_MODE_FAST:
470 		reg |= SMPS_CTRL_MODE_PWM;
471 		break;
472 	default:
473 		return -EINVAL;
474 	}
475 
476 	pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
477 	if (rail_enable)
478 		palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
479 
480 	/* Switch the enable value to ensure this is used for enable */
481 	pmic->desc[id].enable_val = pmic->current_reg_mode[id];
482 
483 	return 0;
484 }
485 
486 static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
487 {
488 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
489 	int id = rdev_get_id(dev);
490 	unsigned int reg;
491 
492 	reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
493 
494 	switch (reg) {
495 	case SMPS_CTRL_MODE_ON:
496 		return REGULATOR_MODE_NORMAL;
497 	case SMPS_CTRL_MODE_ECO:
498 		return REGULATOR_MODE_IDLE;
499 	case SMPS_CTRL_MODE_PWM:
500 		return REGULATOR_MODE_FAST;
501 	}
502 
503 	return 0;
504 }
505 
506 static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
507 		 int ramp_delay)
508 {
509 	int id = rdev_get_id(rdev);
510 	struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
511 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
512 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
513 	unsigned int reg = 0;
514 	int ret;
515 
516 	/* SMPS3 and SMPS7 do not have tstep_addr setting */
517 	switch (id) {
518 	case PALMAS_REG_SMPS3:
519 	case PALMAS_REG_SMPS7:
520 		return 0;
521 	}
522 
523 	if (ramp_delay <= 0)
524 		reg = 0;
525 	else if (ramp_delay <= 2500)
526 		reg = 3;
527 	else if (ramp_delay <= 5000)
528 		reg = 2;
529 	else
530 		reg = 1;
531 
532 	ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
533 	if (ret < 0) {
534 		dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
535 		return ret;
536 	}
537 
538 	pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
539 	return ret;
540 }
541 
542 static const struct regulator_ops palmas_ops_smps = {
543 	.is_enabled		= regulator_is_enabled_regmap,
544 	.enable			= regulator_enable_regmap,
545 	.disable		= regulator_disable_regmap,
546 	.set_mode		= palmas_set_mode_smps,
547 	.get_mode		= palmas_get_mode_smps,
548 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
549 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
550 	.list_voltage		= regulator_list_voltage_linear_range,
551 	.map_voltage		= regulator_map_voltage_linear_range,
552 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
553 	.set_ramp_delay		= palmas_smps_set_ramp_delay,
554 };
555 
556 static const struct regulator_ops palmas_ops_ext_control_smps = {
557 	.set_mode		= palmas_set_mode_smps,
558 	.get_mode		= palmas_get_mode_smps,
559 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
560 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
561 	.list_voltage		= regulator_list_voltage_linear_range,
562 	.map_voltage		= regulator_map_voltage_linear_range,
563 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
564 	.set_ramp_delay		= palmas_smps_set_ramp_delay,
565 };
566 
567 static const struct regulator_ops palmas_ops_smps10 = {
568 	.is_enabled		= regulator_is_enabled_regmap,
569 	.enable			= regulator_enable_regmap,
570 	.disable		= regulator_disable_regmap,
571 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
572 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
573 	.list_voltage		= regulator_list_voltage_linear,
574 	.map_voltage		= regulator_map_voltage_linear,
575 	.set_bypass		= regulator_set_bypass_regmap,
576 	.get_bypass		= regulator_get_bypass_regmap,
577 };
578 
579 static const struct regulator_ops tps65917_ops_smps = {
580 	.is_enabled		= regulator_is_enabled_regmap,
581 	.enable			= regulator_enable_regmap,
582 	.disable		= regulator_disable_regmap,
583 	.set_mode		= palmas_set_mode_smps,
584 	.get_mode		= palmas_get_mode_smps,
585 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
586 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
587 	.list_voltage		= regulator_list_voltage_linear_range,
588 	.map_voltage		= regulator_map_voltage_linear_range,
589 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
590 };
591 
592 static const struct regulator_ops tps65917_ops_ext_control_smps = {
593 	.set_mode		= palmas_set_mode_smps,
594 	.get_mode		= palmas_get_mode_smps,
595 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
596 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
597 	.list_voltage		= regulator_list_voltage_linear_range,
598 	.map_voltage		= regulator_map_voltage_linear_range,
599 };
600 
601 static int palmas_is_enabled_ldo(struct regulator_dev *dev)
602 {
603 	int id = rdev_get_id(dev);
604 	struct palmas_pmic *pmic = rdev_get_drvdata(dev);
605 	struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
606 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
607 	unsigned int reg;
608 
609 	palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
610 
611 	reg &= PALMAS_LDO1_CTRL_STATUS;
612 
613 	return !!(reg);
614 }
615 
616 static const struct regulator_ops palmas_ops_ldo = {
617 	.is_enabled		= palmas_is_enabled_ldo,
618 	.enable			= regulator_enable_regmap,
619 	.disable		= regulator_disable_regmap,
620 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
621 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
622 	.list_voltage		= regulator_list_voltage_linear,
623 	.map_voltage		= regulator_map_voltage_linear,
624 };
625 
626 static const struct regulator_ops palmas_ops_ldo9 = {
627 	.is_enabled		= palmas_is_enabled_ldo,
628 	.enable			= regulator_enable_regmap,
629 	.disable		= regulator_disable_regmap,
630 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
631 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
632 	.list_voltage		= regulator_list_voltage_linear,
633 	.map_voltage		= regulator_map_voltage_linear,
634 	.set_bypass		= regulator_set_bypass_regmap,
635 	.get_bypass		= regulator_get_bypass_regmap,
636 };
637 
638 static const struct regulator_ops palmas_ops_ext_control_ldo = {
639 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
640 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
641 	.list_voltage		= regulator_list_voltage_linear,
642 	.map_voltage		= regulator_map_voltage_linear,
643 };
644 
645 static const struct regulator_ops palmas_ops_extreg = {
646 	.is_enabled		= regulator_is_enabled_regmap,
647 	.enable			= regulator_enable_regmap,
648 	.disable		= regulator_disable_regmap,
649 };
650 
651 static const struct regulator_ops palmas_ops_ext_control_extreg = {
652 };
653 
654 static const struct regulator_ops tps65917_ops_ldo = {
655 	.is_enabled		= palmas_is_enabled_ldo,
656 	.enable			= regulator_enable_regmap,
657 	.disable		= regulator_disable_regmap,
658 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
659 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
660 	.list_voltage		= regulator_list_voltage_linear,
661 	.map_voltage		= regulator_map_voltage_linear,
662 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
663 };
664 
665 static const struct regulator_ops tps65917_ops_ldo_1_2 = {
666 	.is_enabled		= palmas_is_enabled_ldo,
667 	.enable			= regulator_enable_regmap,
668 	.disable		= regulator_disable_regmap,
669 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
670 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
671 	.list_voltage		= regulator_list_voltage_linear,
672 	.map_voltage		= regulator_map_voltage_linear,
673 	.set_voltage_time_sel	= regulator_set_voltage_time_sel,
674 	.set_bypass		= regulator_set_bypass_regmap,
675 	.get_bypass		= regulator_get_bypass_regmap,
676 };
677 
678 static int palmas_regulator_config_external(struct palmas *palmas, int id,
679 		struct palmas_reg_init *reg_init)
680 {
681 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
682 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
683 	int ret;
684 
685 	ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
686 					    reg_init->roof_floor, true);
687 	if (ret < 0)
688 		dev_err(palmas->dev,
689 			"Ext control config for regulator %d failed %d\n",
690 			id, ret);
691 	return ret;
692 }
693 
694 /*
695  * setup the hardware based sleep configuration of the SMPS/LDO regulators
696  * from the platform data. This is different to the software based control
697  * supported by the regulator framework as it is controlled by toggling
698  * pins on the PMIC such as PREQ, SYSEN, ...
699  */
700 static int palmas_smps_init(struct palmas *palmas, int id,
701 		struct palmas_reg_init *reg_init)
702 {
703 	unsigned int reg;
704 	int ret;
705 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
706 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
707 	unsigned int addr = rinfo->ctrl_addr;
708 
709 	ret = palmas_smps_read(palmas, addr, &reg);
710 	if (ret)
711 		return ret;
712 
713 	switch (id) {
714 	case PALMAS_REG_SMPS10_OUT1:
715 	case PALMAS_REG_SMPS10_OUT2:
716 		reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
717 		if (reg_init->mode_sleep)
718 			reg |= reg_init->mode_sleep <<
719 					PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
720 		break;
721 	default:
722 		if (reg_init->warm_reset)
723 			reg |= PALMAS_SMPS12_CTRL_WR_S;
724 		else
725 			reg &= ~PALMAS_SMPS12_CTRL_WR_S;
726 
727 		if (reg_init->roof_floor)
728 			reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
729 		else
730 			reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
731 
732 		reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
733 		if (reg_init->mode_sleep)
734 			reg |= reg_init->mode_sleep <<
735 					PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
736 	}
737 
738 	ret = palmas_smps_write(palmas, addr, reg);
739 	if (ret)
740 		return ret;
741 
742 	if (rinfo->vsel_addr && reg_init->vsel) {
743 
744 		reg = reg_init->vsel;
745 
746 		ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
747 		if (ret)
748 			return ret;
749 	}
750 
751 	if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
752 			(id != PALMAS_REG_SMPS10_OUT2)) {
753 		/* Enable externally controlled regulator */
754 		ret = palmas_smps_read(palmas, addr, &reg);
755 		if (ret < 0)
756 			return ret;
757 
758 		if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
759 			reg |= SMPS_CTRL_MODE_ON;
760 			ret = palmas_smps_write(palmas, addr, reg);
761 			if (ret < 0)
762 				return ret;
763 		}
764 		return palmas_regulator_config_external(palmas, id, reg_init);
765 	}
766 	return 0;
767 }
768 
769 static int palmas_ldo_init(struct palmas *palmas, int id,
770 		struct palmas_reg_init *reg_init)
771 {
772 	unsigned int reg;
773 	unsigned int addr;
774 	int ret;
775 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
776 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
777 
778 	addr = rinfo->ctrl_addr;
779 
780 	ret = palmas_ldo_read(palmas, addr, &reg);
781 	if (ret)
782 		return ret;
783 
784 	if (reg_init->warm_reset)
785 		reg |= PALMAS_LDO1_CTRL_WR_S;
786 	else
787 		reg &= ~PALMAS_LDO1_CTRL_WR_S;
788 
789 	if (reg_init->mode_sleep)
790 		reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
791 	else
792 		reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
793 
794 	ret = palmas_ldo_write(palmas, addr, reg);
795 	if (ret)
796 		return ret;
797 
798 	if (reg_init->roof_floor) {
799 		/* Enable externally controlled regulator */
800 		ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
801 				addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
802 				PALMAS_LDO1_CTRL_MODE_ACTIVE);
803 		if (ret < 0) {
804 			dev_err(palmas->dev,
805 				"LDO Register 0x%02x update failed %d\n",
806 				addr, ret);
807 			return ret;
808 		}
809 		return palmas_regulator_config_external(palmas, id, reg_init);
810 	}
811 	return 0;
812 }
813 
814 static int palmas_extreg_init(struct palmas *palmas, int id,
815 		struct palmas_reg_init *reg_init)
816 {
817 	unsigned int addr;
818 	int ret;
819 	unsigned int val = 0;
820 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
821 	struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
822 
823 	addr = rinfo->ctrl_addr;
824 
825 	if (reg_init->mode_sleep)
826 		val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
827 
828 	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
829 			addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
830 	if (ret < 0) {
831 		dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
832 			addr, ret);
833 		return ret;
834 	}
835 
836 	if (reg_init->roof_floor) {
837 		/* Enable externally controlled regulator */
838 		ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
839 				addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
840 				PALMAS_REGEN1_CTRL_MODE_ACTIVE);
841 		if (ret < 0) {
842 			dev_err(palmas->dev,
843 				"Resource Register 0x%02x update failed %d\n",
844 				addr, ret);
845 			return ret;
846 		}
847 		return palmas_regulator_config_external(palmas, id, reg_init);
848 	}
849 	return 0;
850 }
851 
852 static void palmas_enable_ldo8_track(struct palmas *palmas)
853 {
854 	unsigned int reg;
855 	unsigned int addr;
856 	int ret;
857 	struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
858 	struct palmas_regs_info *rinfo;
859 
860 	rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
861 	addr = rinfo->ctrl_addr;
862 
863 	ret = palmas_ldo_read(palmas, addr, &reg);
864 	if (ret) {
865 		dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
866 		return;
867 	}
868 
869 	reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
870 	ret = palmas_ldo_write(palmas, addr, reg);
871 	if (ret < 0) {
872 		dev_err(palmas->dev, "Error in enabling tracking mode\n");
873 		return;
874 	}
875 	/*
876 	 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
877 	 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
878 	 * and can be set from 0.45 to 1.65 V.
879 	 */
880 	addr = rinfo->vsel_addr;
881 	ret = palmas_ldo_read(palmas, addr, &reg);
882 	if (ret) {
883 		dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
884 		return;
885 	}
886 
887 	reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
888 	ret = palmas_ldo_write(palmas, addr, reg);
889 	if (ret < 0)
890 		dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
891 
892 	return;
893 }
894 
895 static int palmas_ldo_registration(struct palmas_pmic *pmic,
896 				   struct palmas_pmic_driver_data *ddata,
897 				   struct palmas_pmic_platform_data *pdata,
898 				   const char *pdev_name,
899 				   struct regulator_config config)
900 {
901 	int id, ret;
902 	struct regulator_dev *rdev;
903 	struct palmas_reg_init *reg_init;
904 	struct palmas_regs_info *rinfo;
905 	struct regulator_desc *desc;
906 
907 	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
908 		if (pdata && pdata->reg_init[id])
909 			reg_init = pdata->reg_init[id];
910 		else
911 			reg_init = NULL;
912 
913 		rinfo = &ddata->palmas_regs_info[id];
914 		/* Miss out regulators which are not available due
915 		 * to alternate functions.
916 		 */
917 
918 		/* Register the regulators */
919 		desc = &pmic->desc[id];
920 		desc->name = rinfo->name;
921 		desc->id = id;
922 		desc->type = REGULATOR_VOLTAGE;
923 		desc->owner = THIS_MODULE;
924 
925 		if (id < PALMAS_REG_REGEN1) {
926 			desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
927 			if (reg_init && reg_init->roof_floor)
928 				desc->ops = &palmas_ops_ext_control_ldo;
929 			else
930 				desc->ops = &palmas_ops_ldo;
931 			desc->min_uV = 900000;
932 			desc->uV_step = 50000;
933 			desc->linear_min_sel = 1;
934 			desc->enable_time = 500;
935 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
936 							    rinfo->vsel_addr);
937 			desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
938 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
939 							      rinfo->ctrl_addr);
940 			desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
941 
942 			/* Check if LDO8 is in tracking mode or not */
943 			if (pdata && (id == PALMAS_REG_LDO8) &&
944 			    pdata->enable_ldo8_tracking) {
945 				palmas_enable_ldo8_track(pmic->palmas);
946 				desc->min_uV = 450000;
947 				desc->uV_step = 25000;
948 			}
949 
950 			/* LOD6 in vibrator mode will have enable time 2000us */
951 			if (pdata && pdata->ldo6_vibrator &&
952 			    (id == PALMAS_REG_LDO6))
953 				desc->enable_time = 2000;
954 
955 			if (id == PALMAS_REG_LDO9) {
956 				desc->ops = &palmas_ops_ldo9;
957 				desc->bypass_reg = desc->enable_reg;
958 				desc->bypass_val_on =
959 						PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
960 				desc->bypass_mask =
961 						PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
962 			}
963 		} else {
964 			if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
965 				continue;
966 
967 			desc->n_voltages = 1;
968 			if (reg_init && reg_init->roof_floor)
969 				desc->ops = &palmas_ops_ext_control_extreg;
970 			else
971 				desc->ops = &palmas_ops_extreg;
972 			desc->enable_reg =
973 					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
974 							   rinfo->ctrl_addr);
975 			desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
976 		}
977 
978 		if (pdata)
979 			config.init_data = pdata->reg_data[id];
980 		else
981 			config.init_data = NULL;
982 
983 		desc->supply_name = rinfo->sname;
984 		config.of_node = ddata->palmas_matches[id].of_node;
985 
986 		rdev = devm_regulator_register(pmic->dev, desc, &config);
987 		if (IS_ERR(rdev)) {
988 			dev_err(pmic->dev,
989 				"failed to register %s regulator\n",
990 				pdev_name);
991 			return PTR_ERR(rdev);
992 		}
993 
994 		/* Save regulator for cleanup */
995 		pmic->rdev[id] = rdev;
996 
997 		/* Initialise sleep/init values from platform data */
998 		if (pdata) {
999 			reg_init = pdata->reg_init[id];
1000 			if (reg_init) {
1001 				if (id <= ddata->ldo_end)
1002 					ret = palmas_ldo_init(pmic->palmas, id,
1003 							      reg_init);
1004 				else
1005 					ret = palmas_extreg_init(pmic->palmas,
1006 								 id, reg_init);
1007 				if (ret)
1008 					return ret;
1009 			}
1010 		}
1011 	}
1012 
1013 	return 0;
1014 }
1015 
1016 static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1017 				     struct palmas_pmic_driver_data *ddata,
1018 				     struct palmas_pmic_platform_data *pdata,
1019 				     const char *pdev_name,
1020 				     struct regulator_config config)
1021 {
1022 	int id, ret;
1023 	struct regulator_dev *rdev;
1024 	struct palmas_reg_init *reg_init;
1025 	struct palmas_regs_info *rinfo;
1026 	struct regulator_desc *desc;
1027 
1028 	for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1029 		if (pdata && pdata->reg_init[id])
1030 			reg_init = pdata->reg_init[id];
1031 		else
1032 			reg_init = NULL;
1033 
1034 		/* Miss out regulators which are not available due
1035 		 * to alternate functions.
1036 		 */
1037 		rinfo = &ddata->palmas_regs_info[id];
1038 
1039 		/* Register the regulators */
1040 		desc = &pmic->desc[id];
1041 		desc->name = rinfo->name;
1042 		desc->id = id;
1043 		desc->type = REGULATOR_VOLTAGE;
1044 		desc->owner = THIS_MODULE;
1045 
1046 		if (id < TPS65917_REG_REGEN1) {
1047 			desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1048 			if (reg_init && reg_init->roof_floor)
1049 				desc->ops = &palmas_ops_ext_control_ldo;
1050 			else
1051 				desc->ops = &tps65917_ops_ldo;
1052 			desc->min_uV = 900000;
1053 			desc->uV_step = 50000;
1054 			desc->linear_min_sel = 1;
1055 			desc->enable_time = 500;
1056 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1057 							    rinfo->vsel_addr);
1058 			desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1059 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1060 							      rinfo->ctrl_addr);
1061 			desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1062 			/*
1063 			 * To be confirmed. Discussion on going with PMIC Team.
1064 			 * It is of the order of ~60mV/uS.
1065 			 */
1066 			desc->ramp_delay = 2500;
1067 			if (id == TPS65917_REG_LDO1 ||
1068 			    id == TPS65917_REG_LDO2) {
1069 				desc->ops = &tps65917_ops_ldo_1_2;
1070 				desc->bypass_reg = desc->enable_reg;
1071 				desc->bypass_val_on =
1072 						TPS65917_LDO1_CTRL_BYPASS_EN;
1073 				desc->bypass_mask =
1074 						TPS65917_LDO1_CTRL_BYPASS_EN;
1075 			}
1076 		} else {
1077 			desc->n_voltages = 1;
1078 			if (reg_init && reg_init->roof_floor)
1079 				desc->ops = &palmas_ops_ext_control_extreg;
1080 			else
1081 				desc->ops = &palmas_ops_extreg;
1082 			desc->enable_reg =
1083 					PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1084 							   rinfo->ctrl_addr);
1085 			desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1086 		}
1087 
1088 		if (pdata)
1089 			config.init_data = pdata->reg_data[id];
1090 		else
1091 			config.init_data = NULL;
1092 
1093 		desc->supply_name = rinfo->sname;
1094 		config.of_node = ddata->palmas_matches[id].of_node;
1095 
1096 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1097 		if (IS_ERR(rdev)) {
1098 			dev_err(pmic->dev,
1099 				"failed to register %s regulator\n",
1100 				pdev_name);
1101 			return PTR_ERR(rdev);
1102 		}
1103 
1104 		/* Save regulator for cleanup */
1105 		pmic->rdev[id] = rdev;
1106 
1107 		/* Initialise sleep/init values from platform data */
1108 		if (pdata) {
1109 			reg_init = pdata->reg_init[id];
1110 			if (reg_init) {
1111 				if (id < TPS65917_REG_REGEN1)
1112 					ret = palmas_ldo_init(pmic->palmas,
1113 							      id, reg_init);
1114 				else
1115 					ret = palmas_extreg_init(pmic->palmas,
1116 								 id, reg_init);
1117 				if (ret)
1118 					return ret;
1119 			}
1120 		}
1121 	}
1122 
1123 	return 0;
1124 }
1125 
1126 static int palmas_smps_registration(struct palmas_pmic *pmic,
1127 				    struct palmas_pmic_driver_data *ddata,
1128 				    struct palmas_pmic_platform_data *pdata,
1129 				    const char *pdev_name,
1130 				    struct regulator_config config)
1131 {
1132 	int id, ret;
1133 	unsigned int addr, reg;
1134 	struct regulator_dev *rdev;
1135 	struct palmas_reg_init *reg_init;
1136 	struct palmas_regs_info *rinfo;
1137 	struct regulator_desc *desc;
1138 
1139 	for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1140 		bool ramp_delay_support = false;
1141 
1142 		/*
1143 		 * Miss out regulators which are not available due
1144 		 * to slaving configurations.
1145 		 */
1146 		switch (id) {
1147 		case PALMAS_REG_SMPS12:
1148 		case PALMAS_REG_SMPS3:
1149 			if (pmic->smps123)
1150 				continue;
1151 			if (id == PALMAS_REG_SMPS12)
1152 				ramp_delay_support = true;
1153 			break;
1154 		case PALMAS_REG_SMPS123:
1155 			if (!pmic->smps123)
1156 				continue;
1157 			ramp_delay_support = true;
1158 			break;
1159 		case PALMAS_REG_SMPS45:
1160 		case PALMAS_REG_SMPS7:
1161 			if (pmic->smps457)
1162 				continue;
1163 			if (id == PALMAS_REG_SMPS45)
1164 				ramp_delay_support = true;
1165 			break;
1166 		case PALMAS_REG_SMPS457:
1167 			if (!pmic->smps457)
1168 				continue;
1169 			ramp_delay_support = true;
1170 			break;
1171 		case PALMAS_REG_SMPS10_OUT1:
1172 		case PALMAS_REG_SMPS10_OUT2:
1173 			if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
1174 				continue;
1175 		}
1176 		rinfo = &ddata->palmas_regs_info[id];
1177 		desc = &pmic->desc[id];
1178 
1179 		if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
1180 			ramp_delay_support = true;
1181 
1182 		if (ramp_delay_support) {
1183 			addr = rinfo->tstep_addr;
1184 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
1185 			if (ret < 0) {
1186 				dev_err(pmic->dev,
1187 					"reading TSTEP reg failed: %d\n", ret);
1188 				return ret;
1189 			}
1190 			desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1191 			pmic->ramp_delay[id] = desc->ramp_delay;
1192 		}
1193 
1194 		/* Initialise sleep/init values from platform data */
1195 		if (pdata && pdata->reg_init[id]) {
1196 			reg_init = pdata->reg_init[id];
1197 			ret = palmas_smps_init(pmic->palmas, id, reg_init);
1198 			if (ret)
1199 				return ret;
1200 		} else {
1201 			reg_init = NULL;
1202 		}
1203 
1204 		/* Register the regulators */
1205 		desc->name = rinfo->name;
1206 		desc->id = id;
1207 
1208 		switch (id) {
1209 		case PALMAS_REG_SMPS10_OUT1:
1210 		case PALMAS_REG_SMPS10_OUT2:
1211 			desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1212 			desc->ops = &palmas_ops_smps10;
1213 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1214 							    PALMAS_SMPS10_CTRL);
1215 			desc->vsel_mask = SMPS10_VSEL;
1216 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1217 							    PALMAS_SMPS10_CTRL);
1218 			if (id == PALMAS_REG_SMPS10_OUT1)
1219 				desc->enable_mask = SMPS10_SWITCH_EN;
1220 			else
1221 				desc->enable_mask = SMPS10_BOOST_EN;
1222 			desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1223 							    PALMAS_SMPS10_CTRL);
1224 			desc->bypass_val_on = SMPS10_BYPASS_EN;
1225 			desc->bypass_mask = SMPS10_BYPASS_EN;
1226 			desc->min_uV = 3750000;
1227 			desc->uV_step = 1250000;
1228 			break;
1229 		default:
1230 			/*
1231 			 * Read and store the RANGE bit for later use
1232 			 * This must be done before regulator is probed,
1233 			 * otherwise we error in probe with unsupportable
1234 			 * ranges. Read the current smps mode for later use.
1235 			 */
1236 			addr = rinfo->vsel_addr;
1237 			desc->n_linear_ranges = 3;
1238 
1239 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
1240 			if (ret)
1241 				return ret;
1242 			if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1243 				pmic->range[id] = 1;
1244 			if (pmic->range[id])
1245 				desc->linear_ranges = smps_high_ranges;
1246 			else
1247 				desc->linear_ranges = smps_low_ranges;
1248 
1249 			if (reg_init && reg_init->roof_floor)
1250 				desc->ops = &palmas_ops_ext_control_smps;
1251 			else
1252 				desc->ops = &palmas_ops_smps;
1253 			desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1254 			desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1255 							    rinfo->vsel_addr);
1256 			desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1257 
1258 			/* Read the smps mode for later use. */
1259 			addr = rinfo->ctrl_addr;
1260 			ret = palmas_smps_read(pmic->palmas, addr, &reg);
1261 			if (ret)
1262 				return ret;
1263 			pmic->current_reg_mode[id] = reg &
1264 					PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1265 
1266 			desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1267 							      rinfo->ctrl_addr);
1268 			desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1269 			/* set_mode overrides this value */
1270 			desc->enable_val = SMPS_CTRL_MODE_ON;
1271 		}
1272 
1273 		desc->type = REGULATOR_VOLTAGE;
1274 		desc->owner = THIS_MODULE;
1275 
1276 		if (pdata)
1277 			config.init_data = pdata->reg_data[id];
1278 		else
1279 			config.init_data = NULL;
1280 
1281 		desc->supply_name = rinfo->sname;
1282 		config.of_node = ddata->palmas_matches[id].of_node;
1283 
1284 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1285 		if (IS_ERR(rdev)) {
1286 			dev_err(pmic->dev,
1287 				"failed to register %s regulator\n",
1288 				pdev_name);
1289 			return PTR_ERR(rdev);
1290 		}
1291 
1292 		/* Save regulator for cleanup */
1293 		pmic->rdev[id] = rdev;
1294 	}
1295 
1296 	return 0;
1297 }
1298 
1299 static int tps65917_smps_registration(struct palmas_pmic *pmic,
1300 				      struct palmas_pmic_driver_data *ddata,
1301 				      struct palmas_pmic_platform_data *pdata,
1302 				      const char *pdev_name,
1303 				      struct regulator_config config)
1304 {
1305 	int id, ret;
1306 	unsigned int addr, reg;
1307 	struct regulator_dev *rdev;
1308 	struct palmas_reg_init *reg_init;
1309 	struct palmas_regs_info *rinfo;
1310 	struct regulator_desc *desc;
1311 
1312 	for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1313 		/*
1314 		 * Miss out regulators which are not available due
1315 		 * to slaving configurations.
1316 		 */
1317 		desc = &pmic->desc[id];
1318 		desc->n_linear_ranges = 3;
1319 		if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
1320 		    pmic->smps12)
1321 			continue;
1322 
1323 		/* Initialise sleep/init values from platform data */
1324 		if (pdata && pdata->reg_init[id]) {
1325 			reg_init = pdata->reg_init[id];
1326 			ret = palmas_smps_init(pmic->palmas, id, reg_init);
1327 			if (ret)
1328 				return ret;
1329 		} else {
1330 			reg_init = NULL;
1331 		}
1332 		rinfo = &ddata->palmas_regs_info[id];
1333 
1334 		/* Register the regulators */
1335 		desc->name = rinfo->name;
1336 		desc->id = id;
1337 
1338 		/*
1339 		 * Read and store the RANGE bit for later use
1340 		 * This must be done before regulator is probed,
1341 		 * otherwise we error in probe with unsupportable
1342 		 * ranges. Read the current smps mode for later use.
1343 		 */
1344 		addr = rinfo->vsel_addr;
1345 
1346 		ret = palmas_smps_read(pmic->palmas, addr, &reg);
1347 		if (ret)
1348 			return ret;
1349 		if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1350 			pmic->range[id] = 1;
1351 
1352 		if (pmic->range[id])
1353 			desc->linear_ranges = smps_high_ranges;
1354 		else
1355 			desc->linear_ranges = smps_low_ranges;
1356 
1357 		if (reg_init && reg_init->roof_floor)
1358 			desc->ops = &tps65917_ops_ext_control_smps;
1359 		else
1360 			desc->ops = &tps65917_ops_smps;
1361 		desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1362 		desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1363 						    rinfo->vsel_addr);
1364 		desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1365 		desc->ramp_delay = 2500;
1366 
1367 		/* Read the smps mode for later use. */
1368 		addr = rinfo->ctrl_addr;
1369 		ret = palmas_smps_read(pmic->palmas, addr, &reg);
1370 		if (ret)
1371 			return ret;
1372 		pmic->current_reg_mode[id] = reg &
1373 				PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1374 		desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1375 						      rinfo->ctrl_addr);
1376 		desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1377 		/* set_mode overrides this value */
1378 		desc->enable_val = SMPS_CTRL_MODE_ON;
1379 
1380 		desc->type = REGULATOR_VOLTAGE;
1381 		desc->owner = THIS_MODULE;
1382 
1383 		if (pdata)
1384 			config.init_data = pdata->reg_data[id];
1385 		else
1386 			config.init_data = NULL;
1387 
1388 		desc->supply_name = rinfo->sname;
1389 		config.of_node = ddata->palmas_matches[id].of_node;
1390 
1391 		rdev = devm_regulator_register(pmic->dev, desc, &config);
1392 		if (IS_ERR(rdev)) {
1393 			dev_err(pmic->dev,
1394 				"failed to register %s regulator\n",
1395 				pdev_name);
1396 			return PTR_ERR(rdev);
1397 		}
1398 
1399 		/* Save regulator for cleanup */
1400 		pmic->rdev[id] = rdev;
1401 	}
1402 
1403 	return 0;
1404 }
1405 
1406 static struct of_regulator_match palmas_matches[] = {
1407 	{ .name = "smps12", },
1408 	{ .name = "smps123", },
1409 	{ .name = "smps3", },
1410 	{ .name = "smps45", },
1411 	{ .name = "smps457", },
1412 	{ .name = "smps6", },
1413 	{ .name = "smps7", },
1414 	{ .name = "smps8", },
1415 	{ .name = "smps9", },
1416 	{ .name = "smps10_out2", },
1417 	{ .name = "smps10_out1", },
1418 	{ .name = "ldo1", },
1419 	{ .name = "ldo2", },
1420 	{ .name = "ldo3", },
1421 	{ .name = "ldo4", },
1422 	{ .name = "ldo5", },
1423 	{ .name = "ldo6", },
1424 	{ .name = "ldo7", },
1425 	{ .name = "ldo8", },
1426 	{ .name = "ldo9", },
1427 	{ .name = "ldoln", },
1428 	{ .name = "ldousb", },
1429 	{ .name = "regen1", },
1430 	{ .name = "regen2", },
1431 	{ .name = "regen3", },
1432 	{ .name = "sysen1", },
1433 	{ .name = "sysen2", },
1434 };
1435 
1436 static struct of_regulator_match tps65917_matches[] = {
1437 	{ .name = "smps1", },
1438 	{ .name = "smps2", },
1439 	{ .name = "smps3", },
1440 	{ .name = "smps4", },
1441 	{ .name = "smps5", },
1442 	{ .name = "smps12",},
1443 	{ .name = "ldo1", },
1444 	{ .name = "ldo2", },
1445 	{ .name = "ldo3", },
1446 	{ .name = "ldo4", },
1447 	{ .name = "ldo5", },
1448 	{ .name = "regen1", },
1449 	{ .name = "regen2", },
1450 	{ .name = "regen3", },
1451 	{ .name = "sysen1", },
1452 	{ .name = "sysen2", },
1453 };
1454 
1455 static struct palmas_pmic_driver_data palmas_ddata = {
1456 	.smps_start = PALMAS_REG_SMPS12,
1457 	.smps_end = PALMAS_REG_SMPS10_OUT1,
1458 	.ldo_begin = PALMAS_REG_LDO1,
1459 	.ldo_end = PALMAS_REG_LDOUSB,
1460 	.max_reg = PALMAS_NUM_REGS,
1461 	.has_regen3 = true,
1462 	.palmas_regs_info = palmas_generic_regs_info,
1463 	.palmas_matches = palmas_matches,
1464 	.sleep_req_info = palma_sleep_req_info,
1465 	.smps_register = palmas_smps_registration,
1466 	.ldo_register = palmas_ldo_registration,
1467 };
1468 
1469 static struct palmas_pmic_driver_data tps65917_ddata = {
1470 	.smps_start = TPS65917_REG_SMPS1,
1471 	.smps_end = TPS65917_REG_SMPS12,
1472 	.ldo_begin = TPS65917_REG_LDO1,
1473 	.ldo_end = TPS65917_REG_LDO5,
1474 	.max_reg = TPS65917_NUM_REGS,
1475 	.has_regen3 = true,
1476 	.palmas_regs_info = tps65917_regs_info,
1477 	.palmas_matches = tps65917_matches,
1478 	.sleep_req_info = tps65917_sleep_req_info,
1479 	.smps_register = tps65917_smps_registration,
1480 	.ldo_register = tps65917_ldo_registration,
1481 };
1482 
1483 static int palmas_dt_to_pdata(struct device *dev,
1484 			      struct device_node *node,
1485 			      struct palmas_pmic_platform_data *pdata,
1486 			      struct palmas_pmic_driver_data *ddata)
1487 {
1488 	struct device_node *regulators;
1489 	u32 prop;
1490 	int idx, ret;
1491 
1492 	regulators = of_get_child_by_name(node, "regulators");
1493 	if (!regulators) {
1494 		dev_info(dev, "regulator node not found\n");
1495 		return 0;
1496 	}
1497 
1498 	ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1499 				 ddata->max_reg);
1500 	of_node_put(regulators);
1501 	if (ret < 0) {
1502 		dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1503 		return 0;
1504 	}
1505 
1506 	for (idx = 0; idx < ddata->max_reg; idx++) {
1507 		struct of_regulator_match *match;
1508 		struct palmas_reg_init *rinit;
1509 		struct device_node *np;
1510 
1511 		match = &ddata->palmas_matches[idx];
1512 		np = match->of_node;
1513 
1514 		if (!match->init_data || !np)
1515 			continue;
1516 
1517 		rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
1518 		if (!rinit)
1519 			return -ENOMEM;
1520 
1521 		pdata->reg_data[idx] = match->init_data;
1522 		pdata->reg_init[idx] = rinit;
1523 
1524 		rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1525 		ret = of_property_read_u32(np, "ti,roof-floor", &prop);
1526 		/* EINVAL: Property not found */
1527 		if (ret != -EINVAL) {
1528 			int econtrol;
1529 
1530 			/* use default value, when no value is specified */
1531 			econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1532 			if (!ret) {
1533 				switch (prop) {
1534 				case 1:
1535 					econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1536 					break;
1537 				case 2:
1538 					econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1539 					break;
1540 				case 3:
1541 					econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1542 					break;
1543 				default:
1544 					WARN_ON(1);
1545 					dev_warn(dev,
1546 						 "%s: Invalid roof-floor option: %u\n",
1547 						 match->name, prop);
1548 					break;
1549 				}
1550 			}
1551 			rinit->roof_floor = econtrol;
1552 		}
1553 
1554 		ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
1555 		if (!ret)
1556 			rinit->mode_sleep = prop;
1557 
1558 		ret = of_property_read_bool(np, "ti,smps-range");
1559 		if (ret)
1560 			rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
1561 
1562 		if (idx == PALMAS_REG_LDO8)
1563 			pdata->enable_ldo8_tracking = of_property_read_bool(
1564 						np, "ti,enable-ldo8-tracking");
1565 	}
1566 
1567 	pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1568 
1569 	return 0;
1570 }
1571 
1572 static const struct of_device_id of_palmas_match_tbl[] = {
1573 	{
1574 		.compatible = "ti,palmas-pmic",
1575 		.data = &palmas_ddata,
1576 	},
1577 	{
1578 		.compatible = "ti,twl6035-pmic",
1579 		.data = &palmas_ddata,
1580 	},
1581 	{
1582 		.compatible = "ti,twl6036-pmic",
1583 		.data = &palmas_ddata,
1584 	},
1585 	{
1586 		.compatible = "ti,twl6037-pmic",
1587 		.data = &palmas_ddata,
1588 	},
1589 	{
1590 		.compatible = "ti,tps65913-pmic",
1591 		.data = &palmas_ddata,
1592 	},
1593 	{
1594 		.compatible = "ti,tps65914-pmic",
1595 		.data = &palmas_ddata,
1596 	},
1597 	{
1598 		.compatible = "ti,tps80036-pmic",
1599 		.data = &palmas_ddata,
1600 	},
1601 	{
1602 		.compatible = "ti,tps659038-pmic",
1603 		.data = &palmas_ddata,
1604 	},
1605 	 {
1606 		.compatible = "ti,tps65917-pmic",
1607 		.data = &tps65917_ddata,
1608 	},
1609 	{ /* end */ }
1610 };
1611 
1612 static int palmas_regulators_probe(struct platform_device *pdev)
1613 {
1614 	struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1615 	struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1616 	struct device_node *node = pdev->dev.of_node;
1617 	struct palmas_pmic_driver_data *driver_data;
1618 	struct regulator_config config = { };
1619 	struct palmas_pmic *pmic;
1620 	const char *pdev_name;
1621 	const struct of_device_id *match;
1622 	int ret = 0;
1623 	unsigned int reg;
1624 
1625 	match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1626 
1627 	if (!match)
1628 		return -ENODATA;
1629 
1630 	driver_data = (struct palmas_pmic_driver_data *)match->data;
1631 	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1632 	if (!pdata)
1633 		return -ENOMEM;
1634 
1635 	pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1636 	if (!pmic)
1637 		return -ENOMEM;
1638 
1639 	if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1640 		palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1641 							TPS659038_REGEN2_CTRL;
1642 		palmas_ddata.has_regen3 = false;
1643 	}
1644 
1645 	pmic->dev = &pdev->dev;
1646 	pmic->palmas = palmas;
1647 	palmas->pmic = pmic;
1648 	platform_set_drvdata(pdev, pmic);
1649 	pmic->palmas->pmic_ddata = driver_data;
1650 
1651 	ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1652 	if (ret)
1653 		return ret;
1654 
1655 	ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
1656 	if (ret)
1657 		return ret;
1658 
1659 	if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
1660 		pmic->smps123 = 1;
1661 		pmic->smps12 = 1;
1662 	}
1663 
1664 	if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1665 		pmic->smps457 = 1;
1666 
1667 	config.regmap = palmas->regmap[REGULATOR_SLAVE];
1668 	config.dev = &pdev->dev;
1669 	config.driver_data = pmic;
1670 	pdev_name = pdev->name;
1671 
1672 	ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1673 					 config);
1674 	if (ret)
1675 		return ret;
1676 
1677 	ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1678 					config);
1679 
1680 	return ret;
1681 }
1682 
1683 static struct platform_driver palmas_driver = {
1684 	.driver = {
1685 		.name = "palmas-pmic",
1686 		.of_match_table = of_palmas_match_tbl,
1687 	},
1688 	.probe = palmas_regulators_probe,
1689 };
1690 
1691 static int __init palmas_init(void)
1692 {
1693 	return platform_driver_register(&palmas_driver);
1694 }
1695 subsys_initcall(palmas_init);
1696 
1697 static void __exit palmas_exit(void)
1698 {
1699 	platform_driver_unregister(&palmas_driver);
1700 }
1701 module_exit(palmas_exit);
1702 
1703 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1704 MODULE_DESCRIPTION("Palmas voltage regulator driver");
1705 MODULE_LICENSE("GPL");
1706 MODULE_ALIAS("platform:palmas-pmic");
1707 MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
1708