1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2014 MediaTek Inc.
4 // Author: Flora Fu <flora.fu@mediatek.com>
5 
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/platform_device.h>
9 #include <linux/regmap.h>
10 #include <linux/mfd/mt6397/core.h>
11 #include <linux/mfd/mt6397/registers.h>
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/machine.h>
14 #include <linux/regulator/mt6397-regulator.h>
15 #include <linux/regulator/of_regulator.h>
16 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
17 
18 /*
19  * MT6397 regulators' information
20  *
21  * @desc: standard fields of regulator description.
22  * @qi: Mask for query enable signal status of regulators
23  * @vselon_reg: Register sections for hardware control mode of bucks
24  * @vselctrl_reg: Register for controlling the buck control mode.
25  * @vselctrl_mask: Mask for query buck's voltage control mode.
26  */
27 struct mt6397_regulator_info {
28 	struct regulator_desc desc;
29 	u32 qi;
30 	u32 vselon_reg;
31 	u32 vselctrl_reg;
32 	u32 vselctrl_mask;
33 	u32 modeset_reg;
34 	u32 modeset_mask;
35 	u32 modeset_shift;
36 };
37 
38 #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg,	\
39 		vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg,	\
40 		_modeset_shift)					\
41 [MT6397_ID_##vreg] = {							\
42 	.desc = {							\
43 		.name = #vreg,						\
44 		.of_match = of_match_ptr(match),			\
45 		.ops = &mt6397_volt_range_ops,				\
46 		.type = REGULATOR_VOLTAGE,				\
47 		.id = MT6397_ID_##vreg,					\
48 		.owner = THIS_MODULE,					\
49 		.n_voltages = (max - min)/step + 1,			\
50 		.linear_ranges = volt_ranges,				\
51 		.n_linear_ranges = ARRAY_SIZE(volt_ranges),		\
52 		.vsel_reg = vosel,					\
53 		.vsel_mask = vosel_mask,				\
54 		.enable_reg = enreg,					\
55 		.enable_mask = BIT(0),					\
56 		.of_map_mode = mt6397_map_mode,				\
57 	},								\
58 	.qi = BIT(13),							\
59 	.vselon_reg = voselon,						\
60 	.vselctrl_reg = vosel_ctrl,					\
61 	.vselctrl_mask = BIT(1),					\
62 	.modeset_reg = _modeset_reg,					\
63 	.modeset_mask = BIT(_modeset_shift),				\
64 	.modeset_shift = _modeset_shift					\
65 }
66 
67 #define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel,	\
68 		vosel_mask)						\
69 [MT6397_ID_##vreg] = {							\
70 	.desc = {							\
71 		.name = #vreg,						\
72 		.of_match = of_match_ptr(match),			\
73 		.ops = &mt6397_volt_table_ops,				\
74 		.type = REGULATOR_VOLTAGE,				\
75 		.id = MT6397_ID_##vreg,					\
76 		.owner = THIS_MODULE,					\
77 		.n_voltages = ARRAY_SIZE(ldo_volt_table),		\
78 		.volt_table = ldo_volt_table,				\
79 		.vsel_reg = vosel,					\
80 		.vsel_mask = vosel_mask,				\
81 		.enable_reg = enreg,					\
82 		.enable_mask = BIT(enbit),				\
83 	},								\
84 	.qi = BIT(15),							\
85 }
86 
87 #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt)		\
88 [MT6397_ID_##vreg] = {							\
89 	.desc = {							\
90 		.name = #vreg,						\
91 		.of_match = of_match_ptr(match),			\
92 		.ops = &mt6397_volt_fixed_ops,				\
93 		.type = REGULATOR_VOLTAGE,				\
94 		.id = MT6397_ID_##vreg,					\
95 		.owner = THIS_MODULE,					\
96 		.n_voltages = 1,					\
97 		.enable_reg = enreg,					\
98 		.enable_mask = BIT(enbit),				\
99 		.min_uV = volt,						\
100 	},								\
101 	.qi = BIT(15),							\
102 }
103 
104 static const struct linear_range buck_volt_range1[] = {
105 	REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
106 };
107 
108 static const struct linear_range buck_volt_range2[] = {
109 	REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250),
110 };
111 
112 static const struct linear_range buck_volt_range3[] = {
113 	REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000),
114 };
115 
116 static const unsigned int ldo_volt_table1[] = {
117 	1500000, 1800000, 2500000, 2800000,
118 };
119 
120 static const unsigned int ldo_volt_table2[] = {
121 	1800000, 3300000,
122 };
123 
124 static const unsigned int ldo_volt_table3[] = {
125 	3000000, 3300000,
126 };
127 
128 static const unsigned int ldo_volt_table4[] = {
129 	1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
130 };
131 
132 static const unsigned int ldo_volt_table5[] = {
133 	1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
134 };
135 
136 static const unsigned int ldo_volt_table5_v2[] = {
137 	1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
138 };
139 
140 static const unsigned int ldo_volt_table6[] = {
141 	1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
142 };
143 
144 static const unsigned int ldo_volt_table7[] = {
145 	1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000,
146 };
147 
148 static unsigned int mt6397_map_mode(unsigned int mode)
149 {
150 	switch (mode) {
151 	case MT6397_BUCK_MODE_AUTO:
152 		return REGULATOR_MODE_NORMAL;
153 	case MT6397_BUCK_MODE_FORCE_PWM:
154 		return REGULATOR_MODE_FAST;
155 	default:
156 		return REGULATOR_MODE_INVALID;
157 	}
158 }
159 
160 static int mt6397_regulator_set_mode(struct regulator_dev *rdev,
161 				     unsigned int mode)
162 {
163 	struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
164 	int ret, val;
165 
166 	switch (mode) {
167 	case REGULATOR_MODE_FAST:
168 		val = MT6397_BUCK_MODE_FORCE_PWM;
169 		break;
170 	case REGULATOR_MODE_NORMAL:
171 		val = MT6397_BUCK_MODE_AUTO;
172 		break;
173 	default:
174 		ret = -EINVAL;
175 		goto err_mode;
176 	}
177 
178 	dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x, %#x\n",
179 		info->modeset_reg, info->modeset_mask,
180 		info->modeset_shift, val);
181 
182 	val <<= info->modeset_shift;
183 	ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
184 				 info->modeset_mask, val);
185 err_mode:
186 	if (ret != 0) {
187 		dev_err(&rdev->dev,
188 			"Failed to set mt6397 buck mode: %d\n", ret);
189 		return ret;
190 	}
191 
192 	return 0;
193 }
194 
195 static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev)
196 {
197 	struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
198 	int ret, regval;
199 
200 	ret = regmap_read(rdev->regmap, info->modeset_reg, &regval);
201 	if (ret != 0) {
202 		dev_err(&rdev->dev,
203 			"Failed to get mt6397 buck mode: %d\n", ret);
204 		return ret;
205 	}
206 
207 	switch ((regval & info->modeset_mask) >> info->modeset_shift) {
208 	case MT6397_BUCK_MODE_AUTO:
209 		return REGULATOR_MODE_NORMAL;
210 	case MT6397_BUCK_MODE_FORCE_PWM:
211 		return REGULATOR_MODE_FAST;
212 	default:
213 		return -EINVAL;
214 	}
215 }
216 
217 static int mt6397_get_status(struct regulator_dev *rdev)
218 {
219 	int ret;
220 	u32 regval;
221 	struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
222 
223 	ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
224 	if (ret != 0) {
225 		dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
226 		return ret;
227 	}
228 
229 	return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
230 }
231 
232 static const struct regulator_ops mt6397_volt_range_ops = {
233 	.list_voltage = regulator_list_voltage_linear_range,
234 	.map_voltage = regulator_map_voltage_linear_range,
235 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
236 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
237 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
238 	.enable = regulator_enable_regmap,
239 	.disable = regulator_disable_regmap,
240 	.is_enabled = regulator_is_enabled_regmap,
241 	.get_status = mt6397_get_status,
242 	.set_mode = mt6397_regulator_set_mode,
243 	.get_mode = mt6397_regulator_get_mode,
244 };
245 
246 static const struct regulator_ops mt6397_volt_table_ops = {
247 	.list_voltage = regulator_list_voltage_table,
248 	.map_voltage = regulator_map_voltage_iterate,
249 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
250 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
251 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
252 	.enable = regulator_enable_regmap,
253 	.disable = regulator_disable_regmap,
254 	.is_enabled = regulator_is_enabled_regmap,
255 	.get_status = mt6397_get_status,
256 };
257 
258 static const struct regulator_ops mt6397_volt_fixed_ops = {
259 	.list_voltage = regulator_list_voltage_linear,
260 	.enable = regulator_enable_regmap,
261 	.disable = regulator_disable_regmap,
262 	.is_enabled = regulator_is_enabled_regmap,
263 	.get_status = mt6397_get_status,
264 };
265 
266 /* The array is indexed by id(MT6397_ID_XXX) */
267 static struct mt6397_regulator_info mt6397_regulators[] = {
268 	MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250,
269 		buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f,
270 		MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11),
271 	MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250,
272 		buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f,
273 		MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8),
274 	MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250,
275 		buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9,
276 		0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5,
277 		MT6397_VSRMCA15_CON2, 8),
278 	MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250,
279 		buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9,
280 		0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5,
281 		MT6397_VSRMCA7_CON2, 8),
282 	MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250,
283 		buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f,
284 		MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8),
285 	MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1,
286 		MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f,
287 		MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8),
288 	MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2,
289 		MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f,
290 		MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8),
291 	MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000,
292 		buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f,
293 		MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8),
294 	MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000),
295 	MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000),
296 	MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1,
297 		MT6397_ANALDO_CON2, 15, MT6397_ANALDO_CON6, 0xC0),
298 	MT6397_REG_FIXED("ldo_vio28", VIO28, MT6397_DIGLDO_CON0, 14, 2800000),
299 	MT6397_REG_FIXED("ldo_vusb", VUSB, MT6397_DIGLDO_CON1, 14, 3300000),
300 	MT6397_LDO("ldo_vmc", VMC, ldo_volt_table2,
301 		MT6397_DIGLDO_CON2, 12, MT6397_DIGLDO_CON29, 0x10),
302 	MT6397_LDO("ldo_vmch", VMCH, ldo_volt_table3,
303 		MT6397_DIGLDO_CON3, 14, MT6397_DIGLDO_CON17, 0x80),
304 	MT6397_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table3,
305 		MT6397_DIGLDO_CON4, 14, MT6397_DIGLDO_CON18, 0x10),
306 	MT6397_LDO("ldo_vgp1", VGP1, ldo_volt_table4,
307 		MT6397_DIGLDO_CON5, 15, MT6397_DIGLDO_CON19, 0xE0),
308 	MT6397_LDO("ldo_vgp2", VGP2, ldo_volt_table5,
309 		MT6397_DIGLDO_CON6, 15, MT6397_DIGLDO_CON20, 0xE0),
310 	MT6397_LDO("ldo_vgp3", VGP3, ldo_volt_table5,
311 		MT6397_DIGLDO_CON7, 15, MT6397_DIGLDO_CON21, 0xE0),
312 	MT6397_LDO("ldo_vgp4", VGP4, ldo_volt_table5,
313 		MT6397_DIGLDO_CON8, 15, MT6397_DIGLDO_CON22, 0xE0),
314 	MT6397_LDO("ldo_vgp5", VGP5, ldo_volt_table6,
315 		MT6397_DIGLDO_CON9, 15, MT6397_DIGLDO_CON23, 0xE0),
316 	MT6397_LDO("ldo_vgp6", VGP6, ldo_volt_table5,
317 		MT6397_DIGLDO_CON10, 15, MT6397_DIGLDO_CON33, 0xE0),
318 	MT6397_LDO("ldo_vibr", VIBR, ldo_volt_table7,
319 		MT6397_DIGLDO_CON24, 15, MT6397_DIGLDO_CON25, 0xE00),
320 };
321 
322 static int mt6397_set_buck_vosel_reg(struct platform_device *pdev)
323 {
324 	struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
325 	int i;
326 	u32 regval;
327 
328 	for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
329 		if (mt6397_regulators[i].vselctrl_reg) {
330 			if (regmap_read(mt6397->regmap,
331 				mt6397_regulators[i].vselctrl_reg,
332 				&regval) < 0) {
333 				dev_err(&pdev->dev,
334 					"Failed to read buck ctrl\n");
335 				return -EIO;
336 			}
337 
338 			if (regval & mt6397_regulators[i].vselctrl_mask) {
339 				mt6397_regulators[i].desc.vsel_reg =
340 				mt6397_regulators[i].vselon_reg;
341 			}
342 		}
343 	}
344 
345 	return 0;
346 }
347 
348 static int mt6397_regulator_probe(struct platform_device *pdev)
349 {
350 	struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
351 	struct regulator_config config = {};
352 	struct regulator_dev *rdev;
353 	int i;
354 	u32 reg_value, version;
355 
356 	/* Query buck controller to select activated voltage register part */
357 	if (mt6397_set_buck_vosel_reg(pdev))
358 		return -EIO;
359 
360 	/* Read PMIC chip revision to update constraints and voltage table */
361 	if (regmap_read(mt6397->regmap, MT6397_CID, &reg_value) < 0) {
362 		dev_err(&pdev->dev, "Failed to read Chip ID\n");
363 		return -EIO;
364 	}
365 	dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
366 
367 	version = (reg_value & 0xFF);
368 	switch (version) {
369 	case MT6397_REGULATOR_ID91:
370 		mt6397_regulators[MT6397_ID_VGP2].desc.volt_table =
371 		ldo_volt_table5_v2;
372 		break;
373 	default:
374 		break;
375 	}
376 
377 	for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
378 		config.dev = &pdev->dev;
379 		config.driver_data = &mt6397_regulators[i];
380 		config.regmap = mt6397->regmap;
381 		rdev = devm_regulator_register(&pdev->dev,
382 				&mt6397_regulators[i].desc, &config);
383 		if (IS_ERR(rdev)) {
384 			dev_err(&pdev->dev, "failed to register %s\n",
385 				mt6397_regulators[i].desc.name);
386 			return PTR_ERR(rdev);
387 		}
388 	}
389 
390 	return 0;
391 }
392 
393 static const struct platform_device_id mt6397_platform_ids[] = {
394 	{"mt6397-regulator", 0},
395 	{ /* sentinel */ },
396 };
397 MODULE_DEVICE_TABLE(platform, mt6397_platform_ids);
398 
399 static const struct of_device_id mt6397_of_match[] = {
400 	{ .compatible = "mediatek,mt6397-regulator", },
401 	{ /* sentinel */ },
402 };
403 MODULE_DEVICE_TABLE(of, mt6397_of_match);
404 
405 static struct platform_driver mt6397_regulator_driver = {
406 	.driver = {
407 		.name = "mt6397-regulator",
408 		.of_match_table = of_match_ptr(mt6397_of_match),
409 	},
410 	.probe = mt6397_regulator_probe,
411 	.id_table = mt6397_platform_ids,
412 };
413 
414 module_platform_driver(mt6397_regulator_driver);
415 
416 MODULE_AUTHOR("Flora Fu <flora.fu@mediatek.com>");
417 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
418 MODULE_LICENSE("GPL");
419