1fe669cb9SAxel Lin // SPDX-License-Identifier: GPL-2.0
2fe669cb9SAxel Lin //
3fe669cb9SAxel Lin // Copyright (c) 2014 MediaTek Inc.
4fe669cb9SAxel Lin // Author: Flora Fu <flora.fu@mediatek.com>
50425e242SFlora Fu
60425e242SFlora Fu #include <linux/module.h>
70425e242SFlora Fu #include <linux/of.h>
80425e242SFlora Fu #include <linux/platform_device.h>
90425e242SFlora Fu #include <linux/regmap.h>
100425e242SFlora Fu #include <linux/mfd/mt6397/core.h>
110425e242SFlora Fu #include <linux/mfd/mt6397/registers.h>
120425e242SFlora Fu #include <linux/regulator/driver.h>
130425e242SFlora Fu #include <linux/regulator/machine.h>
140425e242SFlora Fu #include <linux/regulator/mt6397-regulator.h>
150425e242SFlora Fu #include <linux/regulator/of_regulator.h>
161c537b2dSAnand K Mistry #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
1705692513SHenry Chen
180425e242SFlora Fu /*
190425e242SFlora Fu * MT6397 regulators' information
200425e242SFlora Fu *
210425e242SFlora Fu * @desc: standard fields of regulator description.
220425e242SFlora Fu * @qi: Mask for query enable signal status of regulators
230425e242SFlora Fu * @vselon_reg: Register sections for hardware control mode of bucks
240425e242SFlora Fu * @vselctrl_reg: Register for controlling the buck control mode.
250425e242SFlora Fu * @vselctrl_mask: Mask for query buck's voltage control mode.
260425e242SFlora Fu */
270425e242SFlora Fu struct mt6397_regulator_info {
280425e242SFlora Fu struct regulator_desc desc;
290425e242SFlora Fu u32 qi;
300425e242SFlora Fu u32 vselon_reg;
310425e242SFlora Fu u32 vselctrl_reg;
320425e242SFlora Fu u32 vselctrl_mask;
3305692513SHenry Chen u32 modeset_reg;
3405692513SHenry Chen u32 modeset_mask;
350425e242SFlora Fu };
360425e242SFlora Fu
370425e242SFlora Fu #define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
3805692513SHenry Chen vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \
3905692513SHenry Chen _modeset_shift) \
400425e242SFlora Fu [MT6397_ID_##vreg] = { \
410425e242SFlora Fu .desc = { \
420425e242SFlora Fu .name = #vreg, \
430425e242SFlora Fu .of_match = of_match_ptr(match), \
440425e242SFlora Fu .ops = &mt6397_volt_range_ops, \
450425e242SFlora Fu .type = REGULATOR_VOLTAGE, \
460425e242SFlora Fu .id = MT6397_ID_##vreg, \
470425e242SFlora Fu .owner = THIS_MODULE, \
480425e242SFlora Fu .n_voltages = (max - min)/step + 1, \
490425e242SFlora Fu .linear_ranges = volt_ranges, \
500425e242SFlora Fu .n_linear_ranges = ARRAY_SIZE(volt_ranges), \
510425e242SFlora Fu .vsel_reg = vosel, \
520425e242SFlora Fu .vsel_mask = vosel_mask, \
530425e242SFlora Fu .enable_reg = enreg, \
540425e242SFlora Fu .enable_mask = BIT(0), \
558096236dSAnand K Mistry .of_map_mode = mt6397_map_mode, \
560425e242SFlora Fu }, \
570425e242SFlora Fu .qi = BIT(13), \
580425e242SFlora Fu .vselon_reg = voselon, \
590425e242SFlora Fu .vselctrl_reg = vosel_ctrl, \
600425e242SFlora Fu .vselctrl_mask = BIT(1), \
6105692513SHenry Chen .modeset_reg = _modeset_reg, \
6205692513SHenry Chen .modeset_mask = BIT(_modeset_shift), \
630425e242SFlora Fu }
640425e242SFlora Fu
650425e242SFlora Fu #define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
660425e242SFlora Fu vosel_mask) \
670425e242SFlora Fu [MT6397_ID_##vreg] = { \
680425e242SFlora Fu .desc = { \
690425e242SFlora Fu .name = #vreg, \
700425e242SFlora Fu .of_match = of_match_ptr(match), \
710425e242SFlora Fu .ops = &mt6397_volt_table_ops, \
720425e242SFlora Fu .type = REGULATOR_VOLTAGE, \
730425e242SFlora Fu .id = MT6397_ID_##vreg, \
740425e242SFlora Fu .owner = THIS_MODULE, \
750425e242SFlora Fu .n_voltages = ARRAY_SIZE(ldo_volt_table), \
760425e242SFlora Fu .volt_table = ldo_volt_table, \
770425e242SFlora Fu .vsel_reg = vosel, \
780425e242SFlora Fu .vsel_mask = vosel_mask, \
790425e242SFlora Fu .enable_reg = enreg, \
800425e242SFlora Fu .enable_mask = BIT(enbit), \
810425e242SFlora Fu }, \
820425e242SFlora Fu .qi = BIT(15), \
830425e242SFlora Fu }
840425e242SFlora Fu
850425e242SFlora Fu #define MT6397_REG_FIXED(match, vreg, enreg, enbit, volt) \
860425e242SFlora Fu [MT6397_ID_##vreg] = { \
870425e242SFlora Fu .desc = { \
880425e242SFlora Fu .name = #vreg, \
890425e242SFlora Fu .of_match = of_match_ptr(match), \
900425e242SFlora Fu .ops = &mt6397_volt_fixed_ops, \
910425e242SFlora Fu .type = REGULATOR_VOLTAGE, \
920425e242SFlora Fu .id = MT6397_ID_##vreg, \
930425e242SFlora Fu .owner = THIS_MODULE, \
940425e242SFlora Fu .n_voltages = 1, \
950425e242SFlora Fu .enable_reg = enreg, \
960425e242SFlora Fu .enable_mask = BIT(enbit), \
970425e242SFlora Fu .min_uV = volt, \
980425e242SFlora Fu }, \
990425e242SFlora Fu .qi = BIT(15), \
1000425e242SFlora Fu }
1010425e242SFlora Fu
10260ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range1[] = {
1030425e242SFlora Fu REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
1040425e242SFlora Fu };
1050425e242SFlora Fu
10660ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range2[] = {
1070425e242SFlora Fu REGULATOR_LINEAR_RANGE(800000, 0, 0x7f, 6250),
1080425e242SFlora Fu };
1090425e242SFlora Fu
11060ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range3[] = {
1110425e242SFlora Fu REGULATOR_LINEAR_RANGE(1500000, 0, 0x1f, 20000),
1120425e242SFlora Fu };
1130425e242SFlora Fu
114dc3b2881SAxel Lin static const unsigned int ldo_volt_table1[] = {
1150425e242SFlora Fu 1500000, 1800000, 2500000, 2800000,
1160425e242SFlora Fu };
1170425e242SFlora Fu
118dc3b2881SAxel Lin static const unsigned int ldo_volt_table2[] = {
1190425e242SFlora Fu 1800000, 3300000,
1200425e242SFlora Fu };
1210425e242SFlora Fu
122dc3b2881SAxel Lin static const unsigned int ldo_volt_table3[] = {
1230425e242SFlora Fu 3000000, 3300000,
1240425e242SFlora Fu };
1250425e242SFlora Fu
126dc3b2881SAxel Lin static const unsigned int ldo_volt_table4[] = {
1270425e242SFlora Fu 1220000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
1280425e242SFlora Fu };
1290425e242SFlora Fu
130dc3b2881SAxel Lin static const unsigned int ldo_volt_table5[] = {
1310425e242SFlora Fu 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
1320425e242SFlora Fu };
1330425e242SFlora Fu
134dc3b2881SAxel Lin static const unsigned int ldo_volt_table5_v2[] = {
1350425e242SFlora Fu 1200000, 1000000, 1500000, 1800000, 2500000, 2800000, 3000000, 3300000,
1360425e242SFlora Fu };
1370425e242SFlora Fu
138dc3b2881SAxel Lin static const unsigned int ldo_volt_table6[] = {
1390425e242SFlora Fu 1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
1400425e242SFlora Fu };
1410425e242SFlora Fu
142dc3b2881SAxel Lin static const unsigned int ldo_volt_table7[] = {
1430425e242SFlora Fu 1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000,
1440425e242SFlora Fu };
1450425e242SFlora Fu
mt6397_map_mode(unsigned int mode)1468096236dSAnand K Mistry static unsigned int mt6397_map_mode(unsigned int mode)
1478096236dSAnand K Mistry {
1488096236dSAnand K Mistry switch (mode) {
1498096236dSAnand K Mistry case MT6397_BUCK_MODE_AUTO:
1508096236dSAnand K Mistry return REGULATOR_MODE_NORMAL;
1518096236dSAnand K Mistry case MT6397_BUCK_MODE_FORCE_PWM:
1528096236dSAnand K Mistry return REGULATOR_MODE_FAST;
1538096236dSAnand K Mistry default:
1548096236dSAnand K Mistry return REGULATOR_MODE_INVALID;
1558096236dSAnand K Mistry }
1568096236dSAnand K Mistry }
1578096236dSAnand K Mistry
mt6397_regulator_set_mode(struct regulator_dev * rdev,unsigned int mode)15805692513SHenry Chen static int mt6397_regulator_set_mode(struct regulator_dev *rdev,
15905692513SHenry Chen unsigned int mode)
16005692513SHenry Chen {
16105692513SHenry Chen struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
16205692513SHenry Chen int ret, val;
16305692513SHenry Chen
16405692513SHenry Chen switch (mode) {
16505692513SHenry Chen case REGULATOR_MODE_FAST:
16605692513SHenry Chen val = MT6397_BUCK_MODE_FORCE_PWM;
16705692513SHenry Chen break;
16805692513SHenry Chen case REGULATOR_MODE_NORMAL:
16905692513SHenry Chen val = MT6397_BUCK_MODE_AUTO;
17005692513SHenry Chen break;
17105692513SHenry Chen default:
17205692513SHenry Chen ret = -EINVAL;
17305692513SHenry Chen goto err_mode;
17405692513SHenry Chen }
17505692513SHenry Chen
17612401a1cSAxel Lin dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x\n",
17712401a1cSAxel Lin info->modeset_reg, info->modeset_mask, val);
17805692513SHenry Chen
17912401a1cSAxel Lin val <<= ffs(info->modeset_mask) - 1;
18012401a1cSAxel Lin
18105692513SHenry Chen ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
18205692513SHenry Chen info->modeset_mask, val);
18305692513SHenry Chen err_mode:
18405692513SHenry Chen if (ret != 0) {
18505692513SHenry Chen dev_err(&rdev->dev,
18605692513SHenry Chen "Failed to set mt6397 buck mode: %d\n", ret);
18705692513SHenry Chen return ret;
18805692513SHenry Chen }
18905692513SHenry Chen
19005692513SHenry Chen return 0;
19105692513SHenry Chen }
19205692513SHenry Chen
mt6397_regulator_get_mode(struct regulator_dev * rdev)19305692513SHenry Chen static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev)
19405692513SHenry Chen {
19505692513SHenry Chen struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
19605692513SHenry Chen int ret, regval;
19705692513SHenry Chen
19805692513SHenry Chen ret = regmap_read(rdev->regmap, info->modeset_reg, ®val);
19905692513SHenry Chen if (ret != 0) {
20005692513SHenry Chen dev_err(&rdev->dev,
20105692513SHenry Chen "Failed to get mt6397 buck mode: %d\n", ret);
20205692513SHenry Chen return ret;
20305692513SHenry Chen }
20405692513SHenry Chen
20512401a1cSAxel Lin regval &= info->modeset_mask;
20612401a1cSAxel Lin regval >>= ffs(info->modeset_mask) - 1;
20712401a1cSAxel Lin
20812401a1cSAxel Lin switch (regval) {
20905692513SHenry Chen case MT6397_BUCK_MODE_AUTO:
21005692513SHenry Chen return REGULATOR_MODE_NORMAL;
21105692513SHenry Chen case MT6397_BUCK_MODE_FORCE_PWM:
21205692513SHenry Chen return REGULATOR_MODE_FAST;
21305692513SHenry Chen default:
21405692513SHenry Chen return -EINVAL;
21505692513SHenry Chen }
21605692513SHenry Chen }
21705692513SHenry Chen
mt6397_get_status(struct regulator_dev * rdev)2180425e242SFlora Fu static int mt6397_get_status(struct regulator_dev *rdev)
2190425e242SFlora Fu {
2200425e242SFlora Fu int ret;
2210425e242SFlora Fu u32 regval;
2220425e242SFlora Fu struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
2230425e242SFlora Fu
2240425e242SFlora Fu ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val);
2250425e242SFlora Fu if (ret != 0) {
2260425e242SFlora Fu dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
2270425e242SFlora Fu return ret;
2280425e242SFlora Fu }
2290425e242SFlora Fu
2300425e242SFlora Fu return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
2310425e242SFlora Fu }
2320425e242SFlora Fu
233fb69114bSHenry Chen static const struct regulator_ops mt6397_volt_range_ops = {
2340425e242SFlora Fu .list_voltage = regulator_list_voltage_linear_range,
2350425e242SFlora Fu .map_voltage = regulator_map_voltage_linear_range,
2360425e242SFlora Fu .set_voltage_sel = regulator_set_voltage_sel_regmap,
2370425e242SFlora Fu .get_voltage_sel = regulator_get_voltage_sel_regmap,
2380425e242SFlora Fu .set_voltage_time_sel = regulator_set_voltage_time_sel,
2390425e242SFlora Fu .enable = regulator_enable_regmap,
2400425e242SFlora Fu .disable = regulator_disable_regmap,
2410425e242SFlora Fu .is_enabled = regulator_is_enabled_regmap,
2420425e242SFlora Fu .get_status = mt6397_get_status,
24305692513SHenry Chen .set_mode = mt6397_regulator_set_mode,
24405692513SHenry Chen .get_mode = mt6397_regulator_get_mode,
2450425e242SFlora Fu };
2460425e242SFlora Fu
247fb69114bSHenry Chen static const struct regulator_ops mt6397_volt_table_ops = {
2480425e242SFlora Fu .list_voltage = regulator_list_voltage_table,
2490425e242SFlora Fu .map_voltage = regulator_map_voltage_iterate,
2500425e242SFlora Fu .set_voltage_sel = regulator_set_voltage_sel_regmap,
2510425e242SFlora Fu .get_voltage_sel = regulator_get_voltage_sel_regmap,
2520425e242SFlora Fu .set_voltage_time_sel = regulator_set_voltage_time_sel,
2530425e242SFlora Fu .enable = regulator_enable_regmap,
2540425e242SFlora Fu .disable = regulator_disable_regmap,
2550425e242SFlora Fu .is_enabled = regulator_is_enabled_regmap,
2560425e242SFlora Fu .get_status = mt6397_get_status,
2570425e242SFlora Fu };
2580425e242SFlora Fu
259fb69114bSHenry Chen static const struct regulator_ops mt6397_volt_fixed_ops = {
2600425e242SFlora Fu .list_voltage = regulator_list_voltage_linear,
2610425e242SFlora Fu .enable = regulator_enable_regmap,
2620425e242SFlora Fu .disable = regulator_disable_regmap,
2630425e242SFlora Fu .is_enabled = regulator_is_enabled_regmap,
2640425e242SFlora Fu .get_status = mt6397_get_status,
2650425e242SFlora Fu };
2660425e242SFlora Fu
2670425e242SFlora Fu /* The array is indexed by id(MT6397_ID_XXX) */
2680425e242SFlora Fu static struct mt6397_regulator_info mt6397_regulators[] = {
2690425e242SFlora Fu MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250,
2700425e242SFlora Fu buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f,
27105692513SHenry Chen MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11),
2720425e242SFlora Fu MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250,
2730425e242SFlora Fu buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f,
27405692513SHenry Chen MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8),
2750425e242SFlora Fu MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250,
2760425e242SFlora Fu buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9,
27705692513SHenry Chen 0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5,
27805692513SHenry Chen MT6397_VSRMCA15_CON2, 8),
2790425e242SFlora Fu MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250,
2800425e242SFlora Fu buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9,
28105692513SHenry Chen 0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5,
28205692513SHenry Chen MT6397_VSRMCA7_CON2, 8),
2830425e242SFlora Fu MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250,
2840425e242SFlora Fu buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f,
28505692513SHenry Chen MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8),
2860425e242SFlora Fu MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1,
2870425e242SFlora Fu MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f,
28805692513SHenry Chen MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8),
2890425e242SFlora Fu MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2,
2900425e242SFlora Fu MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f,
29105692513SHenry Chen MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8),
2920425e242SFlora Fu MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000,
2930425e242SFlora Fu buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f,
29405692513SHenry Chen MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8),
2950425e242SFlora Fu MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000),
2960425e242SFlora Fu MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000),
2970425e242SFlora Fu MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1,
2980425e242SFlora Fu MT6397_ANALDO_CON2, 15, MT6397_ANALDO_CON6, 0xC0),
2990425e242SFlora Fu MT6397_REG_FIXED("ldo_vio28", VIO28, MT6397_DIGLDO_CON0, 14, 2800000),
3000425e242SFlora Fu MT6397_REG_FIXED("ldo_vusb", VUSB, MT6397_DIGLDO_CON1, 14, 3300000),
3010425e242SFlora Fu MT6397_LDO("ldo_vmc", VMC, ldo_volt_table2,
3020425e242SFlora Fu MT6397_DIGLDO_CON2, 12, MT6397_DIGLDO_CON29, 0x10),
3030425e242SFlora Fu MT6397_LDO("ldo_vmch", VMCH, ldo_volt_table3,
3040425e242SFlora Fu MT6397_DIGLDO_CON3, 14, MT6397_DIGLDO_CON17, 0x80),
3050425e242SFlora Fu MT6397_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table3,
3060425e242SFlora Fu MT6397_DIGLDO_CON4, 14, MT6397_DIGLDO_CON18, 0x10),
3070425e242SFlora Fu MT6397_LDO("ldo_vgp1", VGP1, ldo_volt_table4,
3080425e242SFlora Fu MT6397_DIGLDO_CON5, 15, MT6397_DIGLDO_CON19, 0xE0),
3090425e242SFlora Fu MT6397_LDO("ldo_vgp2", VGP2, ldo_volt_table5,
3100425e242SFlora Fu MT6397_DIGLDO_CON6, 15, MT6397_DIGLDO_CON20, 0xE0),
3110425e242SFlora Fu MT6397_LDO("ldo_vgp3", VGP3, ldo_volt_table5,
3120425e242SFlora Fu MT6397_DIGLDO_CON7, 15, MT6397_DIGLDO_CON21, 0xE0),
3130425e242SFlora Fu MT6397_LDO("ldo_vgp4", VGP4, ldo_volt_table5,
3140425e242SFlora Fu MT6397_DIGLDO_CON8, 15, MT6397_DIGLDO_CON22, 0xE0),
3150425e242SFlora Fu MT6397_LDO("ldo_vgp5", VGP5, ldo_volt_table6,
3160425e242SFlora Fu MT6397_DIGLDO_CON9, 15, MT6397_DIGLDO_CON23, 0xE0),
3170425e242SFlora Fu MT6397_LDO("ldo_vgp6", VGP6, ldo_volt_table5,
3180425e242SFlora Fu MT6397_DIGLDO_CON10, 15, MT6397_DIGLDO_CON33, 0xE0),
3190425e242SFlora Fu MT6397_LDO("ldo_vibr", VIBR, ldo_volt_table7,
3200425e242SFlora Fu MT6397_DIGLDO_CON24, 15, MT6397_DIGLDO_CON25, 0xE00),
3210425e242SFlora Fu };
3220425e242SFlora Fu
mt6397_set_buck_vosel_reg(struct platform_device * pdev)3230425e242SFlora Fu static int mt6397_set_buck_vosel_reg(struct platform_device *pdev)
3240425e242SFlora Fu {
3250425e242SFlora Fu struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
3260425e242SFlora Fu int i;
3270425e242SFlora Fu u32 regval;
3280425e242SFlora Fu
3290425e242SFlora Fu for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
3300425e242SFlora Fu if (mt6397_regulators[i].vselctrl_reg) {
3310425e242SFlora Fu if (regmap_read(mt6397->regmap,
3320425e242SFlora Fu mt6397_regulators[i].vselctrl_reg,
3330425e242SFlora Fu ®val) < 0) {
3340425e242SFlora Fu dev_err(&pdev->dev,
3350425e242SFlora Fu "Failed to read buck ctrl\n");
3360425e242SFlora Fu return -EIO;
3370425e242SFlora Fu }
3380425e242SFlora Fu
3390425e242SFlora Fu if (regval & mt6397_regulators[i].vselctrl_mask) {
3400425e242SFlora Fu mt6397_regulators[i].desc.vsel_reg =
3410425e242SFlora Fu mt6397_regulators[i].vselon_reg;
3420425e242SFlora Fu }
3430425e242SFlora Fu }
3440425e242SFlora Fu }
3450425e242SFlora Fu
3460425e242SFlora Fu return 0;
3470425e242SFlora Fu }
3480425e242SFlora Fu
mt6397_regulator_probe(struct platform_device * pdev)3490425e242SFlora Fu static int mt6397_regulator_probe(struct platform_device *pdev)
3500425e242SFlora Fu {
3510425e242SFlora Fu struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
3520425e242SFlora Fu struct regulator_config config = {};
3530425e242SFlora Fu struct regulator_dev *rdev;
3540425e242SFlora Fu int i;
3550425e242SFlora Fu u32 reg_value, version;
3560425e242SFlora Fu
3570425e242SFlora Fu /* Query buck controller to select activated voltage register part */
3580425e242SFlora Fu if (mt6397_set_buck_vosel_reg(pdev))
3590425e242SFlora Fu return -EIO;
3600425e242SFlora Fu
3610425e242SFlora Fu /* Read PMIC chip revision to update constraints and voltage table */
3620425e242SFlora Fu if (regmap_read(mt6397->regmap, MT6397_CID, ®_value) < 0) {
3630425e242SFlora Fu dev_err(&pdev->dev, "Failed to read Chip ID\n");
3640425e242SFlora Fu return -EIO;
3650425e242SFlora Fu }
3660425e242SFlora Fu dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
3670425e242SFlora Fu
3680425e242SFlora Fu version = (reg_value & 0xFF);
3690425e242SFlora Fu switch (version) {
3700425e242SFlora Fu case MT6397_REGULATOR_ID91:
3710425e242SFlora Fu mt6397_regulators[MT6397_ID_VGP2].desc.volt_table =
3720425e242SFlora Fu ldo_volt_table5_v2;
3730425e242SFlora Fu break;
3740425e242SFlora Fu default:
3750425e242SFlora Fu break;
3760425e242SFlora Fu }
3770425e242SFlora Fu
3780425e242SFlora Fu for (i = 0; i < MT6397_MAX_REGULATOR; i++) {
3790425e242SFlora Fu config.dev = &pdev->dev;
3800425e242SFlora Fu config.driver_data = &mt6397_regulators[i];
3810425e242SFlora Fu config.regmap = mt6397->regmap;
3820425e242SFlora Fu rdev = devm_regulator_register(&pdev->dev,
3830425e242SFlora Fu &mt6397_regulators[i].desc, &config);
3840425e242SFlora Fu if (IS_ERR(rdev)) {
3850425e242SFlora Fu dev_err(&pdev->dev, "failed to register %s\n",
3860425e242SFlora Fu mt6397_regulators[i].desc.name);
3870425e242SFlora Fu return PTR_ERR(rdev);
3880425e242SFlora Fu }
3890425e242SFlora Fu }
3900425e242SFlora Fu
3910425e242SFlora Fu return 0;
3920425e242SFlora Fu }
3930425e242SFlora Fu
394288a89bfSJavier Martinez Canillas static const struct platform_device_id mt6397_platform_ids[] = {
395288a89bfSJavier Martinez Canillas {"mt6397-regulator", 0},
396288a89bfSJavier Martinez Canillas { /* sentinel */ },
397288a89bfSJavier Martinez Canillas };
398288a89bfSJavier Martinez Canillas MODULE_DEVICE_TABLE(platform, mt6397_platform_ids);
399288a89bfSJavier Martinez Canillas
40038cc873cSKrzysztof Kozlowski static const struct of_device_id mt6397_of_match[] __maybe_unused = {
401abbf043bSJavier Martinez Canillas { .compatible = "mediatek,mt6397-regulator", },
402abbf043bSJavier Martinez Canillas { /* sentinel */ },
403abbf043bSJavier Martinez Canillas };
404abbf043bSJavier Martinez Canillas MODULE_DEVICE_TABLE(of, mt6397_of_match);
405abbf043bSJavier Martinez Canillas
4060425e242SFlora Fu static struct platform_driver mt6397_regulator_driver = {
4070425e242SFlora Fu .driver = {
4080425e242SFlora Fu .name = "mt6397-regulator",
409*259b93b2SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS,
410abbf043bSJavier Martinez Canillas .of_match_table = of_match_ptr(mt6397_of_match),
4110425e242SFlora Fu },
4120425e242SFlora Fu .probe = mt6397_regulator_probe,
413288a89bfSJavier Martinez Canillas .id_table = mt6397_platform_ids,
4140425e242SFlora Fu };
4150425e242SFlora Fu
4160425e242SFlora Fu module_platform_driver(mt6397_regulator_driver);
4170425e242SFlora Fu
4180425e242SFlora Fu MODULE_AUTHOR("Flora Fu <flora.fu@mediatek.com>");
4190425e242SFlora Fu MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6397 PMIC");
4200425e242SFlora Fu MODULE_LICENSE("GPL");
421