1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (c) 2019 MediaTek Inc. 4 5 #include <linux/mfd/mt6358/registers.h> 6 #include <linux/mfd/mt6397/core.h> 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/platform_device.h> 10 #include <linux/regmap.h> 11 #include <linux/regulator/driver.h> 12 #include <linux/regulator/machine.h> 13 #include <linux/regulator/mt6358-regulator.h> 14 #include <linux/regulator/of_regulator.h> 15 16 #define MT6358_BUCK_MODE_AUTO 0 17 #define MT6358_BUCK_MODE_FORCE_PWM 1 18 19 /* 20 * MT6358 regulators' information 21 * 22 * @desc: standard fields of regulator description. 23 * @qi: Mask for query enable signal status of regulators 24 */ 25 struct mt6358_regulator_info { 26 struct regulator_desc desc; 27 u32 status_reg; 28 u32 qi; 29 const u32 *index_table; 30 unsigned int n_table; 31 u32 da_vsel_reg; 32 u32 da_vsel_mask; 33 u32 modeset_reg; 34 u32 modeset_mask; 35 }; 36 37 #define MT6358_BUCK(match, vreg, min, max, step, \ 38 volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \ 39 _modeset_reg, _modeset_shift) \ 40 [MT6358_ID_##vreg] = { \ 41 .desc = { \ 42 .name = #vreg, \ 43 .of_match = of_match_ptr(match), \ 44 .ops = &mt6358_volt_range_ops, \ 45 .type = REGULATOR_VOLTAGE, \ 46 .id = MT6358_ID_##vreg, \ 47 .owner = THIS_MODULE, \ 48 .n_voltages = ((max) - (min)) / (step) + 1, \ 49 .linear_ranges = volt_ranges, \ 50 .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 51 .vsel_reg = MT6358_BUCK_##vreg##_ELR0, \ 52 .vsel_mask = vosel_mask, \ 53 .enable_reg = MT6358_BUCK_##vreg##_CON0, \ 54 .enable_mask = BIT(0), \ 55 .of_map_mode = mt6358_map_mode, \ 56 }, \ 57 .status_reg = MT6358_BUCK_##vreg##_DBG1, \ 58 .qi = BIT(0), \ 59 .da_vsel_reg = _da_vsel_reg, \ 60 .da_vsel_mask = _da_vsel_mask, \ 61 .modeset_reg = _modeset_reg, \ 62 .modeset_mask = BIT(_modeset_shift), \ 63 } 64 65 #define MT6358_LDO(match, vreg, ldo_volt_table, \ 66 ldo_index_table, enreg, enbit, vosel, \ 67 vosel_mask) \ 68 [MT6358_ID_##vreg] = { \ 69 .desc = { \ 70 .name = #vreg, \ 71 .of_match = of_match_ptr(match), \ 72 .ops = &mt6358_volt_table_ops, \ 73 .type = REGULATOR_VOLTAGE, \ 74 .id = MT6358_ID_##vreg, \ 75 .owner = THIS_MODULE, \ 76 .n_voltages = ARRAY_SIZE(ldo_volt_table), \ 77 .volt_table = ldo_volt_table, \ 78 .vsel_reg = vosel, \ 79 .vsel_mask = vosel_mask, \ 80 .enable_reg = enreg, \ 81 .enable_mask = BIT(enbit), \ 82 }, \ 83 .status_reg = MT6358_LDO_##vreg##_CON1, \ 84 .qi = BIT(15), \ 85 .index_table = ldo_index_table, \ 86 .n_table = ARRAY_SIZE(ldo_index_table), \ 87 } 88 89 #define MT6358_LDO1(match, vreg, min, max, step, \ 90 volt_ranges, _da_vsel_reg, _da_vsel_mask, \ 91 vosel, vosel_mask) \ 92 [MT6358_ID_##vreg] = { \ 93 .desc = { \ 94 .name = #vreg, \ 95 .of_match = of_match_ptr(match), \ 96 .ops = &mt6358_volt_range_ops, \ 97 .type = REGULATOR_VOLTAGE, \ 98 .id = MT6358_ID_##vreg, \ 99 .owner = THIS_MODULE, \ 100 .n_voltages = ((max) - (min)) / (step) + 1, \ 101 .linear_ranges = volt_ranges, \ 102 .n_linear_ranges = ARRAY_SIZE(volt_ranges), \ 103 .vsel_reg = vosel, \ 104 .vsel_mask = vosel_mask, \ 105 .enable_reg = MT6358_LDO_##vreg##_CON0, \ 106 .enable_mask = BIT(0), \ 107 }, \ 108 .da_vsel_reg = _da_vsel_reg, \ 109 .da_vsel_mask = _da_vsel_mask, \ 110 .status_reg = MT6358_LDO_##vreg##_DBG1, \ 111 .qi = BIT(0), \ 112 } 113 114 #define MT6358_REG_FIXED(match, vreg, \ 115 enreg, enbit, volt) \ 116 [MT6358_ID_##vreg] = { \ 117 .desc = { \ 118 .name = #vreg, \ 119 .of_match = of_match_ptr(match), \ 120 .ops = &mt6358_volt_fixed_ops, \ 121 .type = REGULATOR_VOLTAGE, \ 122 .id = MT6358_ID_##vreg, \ 123 .owner = THIS_MODULE, \ 124 .n_voltages = 1, \ 125 .enable_reg = enreg, \ 126 .enable_mask = BIT(enbit), \ 127 .min_uV = volt, \ 128 }, \ 129 .status_reg = MT6358_LDO_##vreg##_CON1, \ 130 .qi = BIT(15), \ 131 } 132 133 static const struct linear_range buck_volt_range1[] = { 134 REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250), 135 }; 136 137 static const struct linear_range buck_volt_range2[] = { 138 REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 12500), 139 }; 140 141 static const struct linear_range buck_volt_range3[] = { 142 REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000), 143 }; 144 145 static const struct linear_range buck_volt_range4[] = { 146 REGULATOR_LINEAR_RANGE(1000000, 0, 0x7f, 12500), 147 }; 148 149 static const unsigned int vdram2_voltages[] = { 150 600000, 1800000, 151 }; 152 153 static const unsigned int vsim_voltages[] = { 154 1700000, 1800000, 2700000, 3000000, 3100000, 155 }; 156 157 static const unsigned int vibr_voltages[] = { 158 1200000, 1300000, 1500000, 1800000, 159 2000000, 2800000, 3000000, 3300000, 160 }; 161 162 static const unsigned int vusb_voltages[] = { 163 3000000, 3100000, 164 }; 165 166 static const unsigned int vcamd_voltages[] = { 167 900000, 1000000, 1100000, 1200000, 168 1300000, 1500000, 1800000, 169 }; 170 171 static const unsigned int vefuse_voltages[] = { 172 1700000, 1800000, 1900000, 173 }; 174 175 static const unsigned int vmch_vemc_voltages[] = { 176 2900000, 3000000, 3300000, 177 }; 178 179 static const unsigned int vcama_voltages[] = { 180 1800000, 2500000, 2700000, 181 2800000, 2900000, 3000000, 182 }; 183 184 static const unsigned int vcn33_bt_wifi_voltages[] = { 185 3300000, 3400000, 3500000, 186 }; 187 188 static const unsigned int vmc_voltages[] = { 189 1800000, 2900000, 3000000, 3300000, 190 }; 191 192 static const unsigned int vldo28_voltages[] = { 193 2800000, 3000000, 194 }; 195 196 static const u32 vdram2_idx[] = { 197 0, 12, 198 }; 199 200 static const u32 vsim_idx[] = { 201 3, 4, 8, 11, 12, 202 }; 203 204 static const u32 vibr_idx[] = { 205 0, 1, 2, 4, 5, 9, 11, 13, 206 }; 207 208 static const u32 vusb_idx[] = { 209 3, 4, 210 }; 211 212 static const u32 vcamd_idx[] = { 213 3, 4, 5, 6, 7, 9, 12, 214 }; 215 216 static const u32 vefuse_idx[] = { 217 11, 12, 13, 218 }; 219 220 static const u32 vmch_vemc_idx[] = { 221 2, 3, 5, 222 }; 223 224 static const u32 vcama_idx[] = { 225 0, 7, 9, 10, 11, 12, 226 }; 227 228 static const u32 vcn33_bt_wifi_idx[] = { 229 1, 2, 3, 230 }; 231 232 static const u32 vmc_idx[] = { 233 4, 10, 11, 13, 234 }; 235 236 static const u32 vldo28_idx[] = { 237 1, 3, 238 }; 239 240 static unsigned int mt6358_map_mode(unsigned int mode) 241 { 242 return mode == MT6358_BUCK_MODE_AUTO ? 243 REGULATOR_MODE_NORMAL : REGULATOR_MODE_FAST; 244 } 245 246 static int mt6358_set_voltage_sel(struct regulator_dev *rdev, 247 unsigned int selector) 248 { 249 int idx, ret; 250 const u32 *pvol; 251 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 252 253 pvol = info->index_table; 254 255 idx = pvol[selector]; 256 idx <<= ffs(info->desc.vsel_mask) - 1; 257 ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg, 258 info->desc.vsel_mask, idx); 259 260 return ret; 261 } 262 263 static int mt6358_get_voltage_sel(struct regulator_dev *rdev) 264 { 265 int idx, ret; 266 u32 selector; 267 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 268 const u32 *pvol; 269 270 ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector); 271 if (ret != 0) { 272 dev_info(&rdev->dev, 273 "Failed to get mt6358 %s vsel reg: %d\n", 274 info->desc.name, ret); 275 return ret; 276 } 277 278 selector = (selector & info->desc.vsel_mask) >> 279 (ffs(info->desc.vsel_mask) - 1); 280 pvol = info->index_table; 281 for (idx = 0; idx < info->desc.n_voltages; idx++) { 282 if (pvol[idx] == selector) 283 return idx; 284 } 285 286 return -EINVAL; 287 } 288 289 static int mt6358_get_buck_voltage_sel(struct regulator_dev *rdev) 290 { 291 int ret, regval; 292 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 293 294 ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val); 295 if (ret != 0) { 296 dev_err(&rdev->dev, 297 "Failed to get mt6358 Buck %s vsel reg: %d\n", 298 info->desc.name, ret); 299 return ret; 300 } 301 302 ret = (regval & info->da_vsel_mask) >> (ffs(info->da_vsel_mask) - 1); 303 304 return ret; 305 } 306 307 static int mt6358_get_status(struct regulator_dev *rdev) 308 { 309 int ret; 310 u32 regval; 311 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 312 313 ret = regmap_read(rdev->regmap, info->status_reg, ®val); 314 if (ret != 0) { 315 dev_info(&rdev->dev, "Failed to get enable reg: %d\n", ret); 316 return ret; 317 } 318 319 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; 320 } 321 322 static int mt6358_regulator_set_mode(struct regulator_dev *rdev, 323 unsigned int mode) 324 { 325 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 326 int val; 327 328 switch (mode) { 329 case REGULATOR_MODE_FAST: 330 val = MT6358_BUCK_MODE_FORCE_PWM; 331 break; 332 case REGULATOR_MODE_NORMAL: 333 val = MT6358_BUCK_MODE_AUTO; 334 break; 335 default: 336 return -EINVAL; 337 } 338 339 dev_dbg(&rdev->dev, "mt6358 buck set_mode %#x, %#x, %#x\n", 340 info->modeset_reg, info->modeset_mask, val); 341 342 val <<= ffs(info->modeset_mask) - 1; 343 344 return regmap_update_bits(rdev->regmap, info->modeset_reg, 345 info->modeset_mask, val); 346 } 347 348 static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev) 349 { 350 struct mt6358_regulator_info *info = rdev_get_drvdata(rdev); 351 int ret, regval; 352 353 ret = regmap_read(rdev->regmap, info->modeset_reg, ®val); 354 if (ret != 0) { 355 dev_err(&rdev->dev, 356 "Failed to get mt6358 buck mode: %d\n", ret); 357 return ret; 358 } 359 360 switch ((regval & info->modeset_mask) >> (ffs(info->modeset_mask) - 1)) { 361 case MT6358_BUCK_MODE_AUTO: 362 return REGULATOR_MODE_NORMAL; 363 case MT6358_BUCK_MODE_FORCE_PWM: 364 return REGULATOR_MODE_FAST; 365 default: 366 return -EINVAL; 367 } 368 } 369 370 static const struct regulator_ops mt6358_volt_range_ops = { 371 .list_voltage = regulator_list_voltage_linear_range, 372 .map_voltage = regulator_map_voltage_linear_range, 373 .set_voltage_sel = regulator_set_voltage_sel_regmap, 374 .get_voltage_sel = mt6358_get_buck_voltage_sel, 375 .set_voltage_time_sel = regulator_set_voltage_time_sel, 376 .enable = regulator_enable_regmap, 377 .disable = regulator_disable_regmap, 378 .is_enabled = regulator_is_enabled_regmap, 379 .get_status = mt6358_get_status, 380 .set_mode = mt6358_regulator_set_mode, 381 .get_mode = mt6358_regulator_get_mode, 382 }; 383 384 static const struct regulator_ops mt6358_volt_table_ops = { 385 .list_voltage = regulator_list_voltage_table, 386 .map_voltage = regulator_map_voltage_iterate, 387 .set_voltage_sel = mt6358_set_voltage_sel, 388 .get_voltage_sel = mt6358_get_voltage_sel, 389 .set_voltage_time_sel = regulator_set_voltage_time_sel, 390 .enable = regulator_enable_regmap, 391 .disable = regulator_disable_regmap, 392 .is_enabled = regulator_is_enabled_regmap, 393 .get_status = mt6358_get_status, 394 }; 395 396 static const struct regulator_ops mt6358_volt_fixed_ops = { 397 .list_voltage = regulator_list_voltage_linear, 398 .enable = regulator_enable_regmap, 399 .disable = regulator_disable_regmap, 400 .is_enabled = regulator_is_enabled_regmap, 401 .get_status = mt6358_get_status, 402 }; 403 404 /* The array is indexed by id(MT6358_ID_XXX) */ 405 static struct mt6358_regulator_info mt6358_regulators[] = { 406 MT6358_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500, 407 buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f, 408 MT6358_VDRAM1_ANA_CON0, 8), 409 MT6358_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250, 410 buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f, 411 MT6358_VCORE_VGPU_ANA_CON0, 1), 412 MT6358_BUCK("buck_vpa", VPA, 500000, 3650000, 50000, 413 buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f, 414 MT6358_VPA_ANA_CON0, 3), 415 MT6358_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250, 416 buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f, 417 MT6358_VPROC_ANA_CON0, 1), 418 MT6358_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250, 419 buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f, 420 MT6358_VPROC_ANA_CON0, 2), 421 MT6358_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250, 422 buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f, 423 MT6358_VCORE_VGPU_ANA_CON0, 2), 424 MT6358_BUCK("buck_vs2", VS2, 500000, 2087500, 12500, 425 buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f, 426 MT6358_VS2_ANA_CON0, 8), 427 MT6358_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250, 428 buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, 429 MT6358_VMODEM_ANA_CON0, 8), 430 MT6358_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500, 431 buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, 432 MT6358_VS1_ANA_CON0, 8), 433 MT6358_REG_FIXED("ldo_vrf12", VRF12, 434 MT6358_LDO_VRF12_CON0, 0, 1200000), 435 MT6358_REG_FIXED("ldo_vio18", VIO18, 436 MT6358_LDO_VIO18_CON0, 0, 1800000), 437 MT6358_REG_FIXED("ldo_vcamio", VCAMIO, 438 MT6358_LDO_VCAMIO_CON0, 0, 1800000), 439 MT6358_REG_FIXED("ldo_vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000), 440 MT6358_REG_FIXED("ldo_vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), 441 MT6358_REG_FIXED("ldo_vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), 442 MT6358_REG_FIXED("ldo_vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), 443 MT6358_REG_FIXED("ldo_vaux18", VAUX18, 444 MT6358_LDO_VAUX18_CON0, 0, 1800000), 445 MT6358_REG_FIXED("ldo_vbif28", VBIF28, 446 MT6358_LDO_VBIF28_CON0, 0, 2800000), 447 MT6358_REG_FIXED("ldo_vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), 448 MT6358_REG_FIXED("ldo_va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), 449 MT6358_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), 450 MT6358_REG_FIXED("ldo_vaud28", VAUD28, 451 MT6358_LDO_VAUD28_CON0, 0, 2800000), 452 MT6358_LDO("ldo_vdram2", VDRAM2, vdram2_voltages, vdram2_idx, 453 MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0xf), 454 MT6358_LDO("ldo_vsim1", VSIM1, vsim_voltages, vsim_idx, 455 MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), 456 MT6358_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx, 457 MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), 458 MT6358_LDO("ldo_vusb", VUSB, vusb_voltages, vusb_idx, 459 MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), 460 MT6358_LDO("ldo_vcamd", VCAMD, vcamd_voltages, vcamd_idx, 461 MT6358_LDO_VCAMD_CON0, 0, MT6358_VCAMD_ANA_CON0, 0xf00), 462 MT6358_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx, 463 MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), 464 MT6358_LDO("ldo_vmch", VMCH, vmch_vemc_voltages, vmch_vemc_idx, 465 MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), 466 MT6358_LDO("ldo_vcama1", VCAMA1, vcama_voltages, vcama_idx, 467 MT6358_LDO_VCAMA1_CON0, 0, MT6358_VCAMA1_ANA_CON0, 0xf00), 468 MT6358_LDO("ldo_vemc", VEMC, vmch_vemc_voltages, vmch_vemc_idx, 469 MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), 470 MT6358_LDO("ldo_vcn33_bt", VCN33_BT, vcn33_bt_wifi_voltages, 471 vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_0, 472 0, MT6358_VCN33_ANA_CON0, 0x300), 473 MT6358_LDO("ldo_vcn33_wifi", VCN33_WIFI, vcn33_bt_wifi_voltages, 474 vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_1, 475 0, MT6358_VCN33_ANA_CON0, 0x300), 476 MT6358_LDO("ldo_vcama2", VCAMA2, vcama_voltages, vcama_idx, 477 MT6358_LDO_VCAMA2_CON0, 0, MT6358_VCAMA2_ANA_CON0, 0xf00), 478 MT6358_LDO("ldo_vmc", VMC, vmc_voltages, vmc_idx, 479 MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), 480 MT6358_LDO("ldo_vldo28", VLDO28, vldo28_voltages, vldo28_idx, 481 MT6358_LDO_VLDO28_CON0_0, 0, 482 MT6358_VLDO28_ANA_CON0, 0x300), 483 MT6358_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx, 484 MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), 485 MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250, 486 buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, 487 MT6358_LDO_VSRAM_CON0, 0x7f), 488 MT6358_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250, 489 buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, 490 MT6358_LDO_VSRAM_CON2, 0x7f), 491 MT6358_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250, 492 buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, 493 MT6358_LDO_VSRAM_CON3, 0x7f), 494 MT6358_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250, 495 buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, 496 MT6358_LDO_VSRAM_CON1, 0x7f), 497 }; 498 499 static int mt6358_regulator_probe(struct platform_device *pdev) 500 { 501 struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent); 502 struct regulator_config config = {}; 503 struct regulator_dev *rdev; 504 int i; 505 506 for (i = 0; i < MT6358_MAX_REGULATOR; i++) { 507 config.dev = &pdev->dev; 508 config.driver_data = &mt6358_regulators[i]; 509 config.regmap = mt6397->regmap; 510 511 rdev = devm_regulator_register(&pdev->dev, 512 &mt6358_regulators[i].desc, 513 &config); 514 if (IS_ERR(rdev)) { 515 dev_err(&pdev->dev, "failed to register %s\n", 516 mt6358_regulators[i].desc.name); 517 return PTR_ERR(rdev); 518 } 519 } 520 521 return 0; 522 } 523 524 static const struct platform_device_id mt6358_platform_ids[] = { 525 {"mt6358-regulator", 0}, 526 { /* sentinel */ }, 527 }; 528 MODULE_DEVICE_TABLE(platform, mt6358_platform_ids); 529 530 static struct platform_driver mt6358_regulator_driver = { 531 .driver = { 532 .name = "mt6358-regulator", 533 }, 534 .probe = mt6358_regulator_probe, 535 .id_table = mt6358_platform_ids, 536 }; 537 538 module_platform_driver(mt6358_regulator_driver); 539 540 MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>"); 541 MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6358 PMIC"); 542 MODULE_LICENSE("GPL"); 543