1fe669cb9SAxel Lin // SPDX-License-Identifier: GPL-2.0
2fe669cb9SAxel Lin //
3fe669cb9SAxel Lin // Copyright (c) 2016 MediaTek Inc.
4fe669cb9SAxel Lin // Author: Chen Zhong <chen.zhong@mediatek.com>
52fdf8292SChen Zhong 
62fdf8292SChen Zhong #include <linux/module.h>
72fdf8292SChen Zhong #include <linux/of.h>
82fdf8292SChen Zhong #include <linux/platform_device.h>
92fdf8292SChen Zhong #include <linux/regmap.h>
102fdf8292SChen Zhong #include <linux/mfd/mt6397/core.h>
112fdf8292SChen Zhong #include <linux/mfd/mt6323/registers.h>
122fdf8292SChen Zhong #include <linux/regulator/driver.h>
132fdf8292SChen Zhong #include <linux/regulator/machine.h>
142fdf8292SChen Zhong #include <linux/regulator/mt6323-regulator.h>
152fdf8292SChen Zhong #include <linux/regulator/of_regulator.h>
162fdf8292SChen Zhong 
172fdf8292SChen Zhong #define MT6323_LDO_MODE_NORMAL	0
182fdf8292SChen Zhong #define MT6323_LDO_MODE_LP	1
192fdf8292SChen Zhong 
202fdf8292SChen Zhong /*
212fdf8292SChen Zhong  * MT6323 regulators' information
222fdf8292SChen Zhong  *
232fdf8292SChen Zhong  * @desc: standard fields of regulator description.
242fdf8292SChen Zhong  * @qi: Mask for query enable signal status of regulators
252fdf8292SChen Zhong  * @vselon_reg: Register sections for hardware control mode of bucks
262fdf8292SChen Zhong  * @vselctrl_reg: Register for controlling the buck control mode.
272fdf8292SChen Zhong  * @vselctrl_mask: Mask for query buck's voltage control mode.
282fdf8292SChen Zhong  */
292fdf8292SChen Zhong struct mt6323_regulator_info {
302fdf8292SChen Zhong 	struct regulator_desc desc;
312fdf8292SChen Zhong 	u32 qi;
322fdf8292SChen Zhong 	u32 vselon_reg;
332fdf8292SChen Zhong 	u32 vselctrl_reg;
342fdf8292SChen Zhong 	u32 vselctrl_mask;
352fdf8292SChen Zhong 	u32 modeset_reg;
362fdf8292SChen Zhong 	u32 modeset_mask;
372fdf8292SChen Zhong };
382fdf8292SChen Zhong 
392fdf8292SChen Zhong #define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg,	\
402fdf8292SChen Zhong 		vosel, vosel_mask, voselon, vosel_ctrl)			\
412fdf8292SChen Zhong [MT6323_ID_##vreg] = {							\
422fdf8292SChen Zhong 	.desc = {							\
432fdf8292SChen Zhong 		.name = #vreg,						\
442fdf8292SChen Zhong 		.of_match = of_match_ptr(match),			\
452fdf8292SChen Zhong 		.ops = &mt6323_volt_range_ops,				\
462fdf8292SChen Zhong 		.type = REGULATOR_VOLTAGE,				\
472fdf8292SChen Zhong 		.id = MT6323_ID_##vreg,					\
482fdf8292SChen Zhong 		.owner = THIS_MODULE,					\
492fdf8292SChen Zhong 		.n_voltages = (max - min)/step + 1,			\
502fdf8292SChen Zhong 		.linear_ranges = volt_ranges,				\
512fdf8292SChen Zhong 		.n_linear_ranges = ARRAY_SIZE(volt_ranges),		\
522fdf8292SChen Zhong 		.vsel_reg = vosel,					\
532fdf8292SChen Zhong 		.vsel_mask = vosel_mask,				\
542fdf8292SChen Zhong 		.enable_reg = enreg,					\
552fdf8292SChen Zhong 		.enable_mask = BIT(0),					\
562fdf8292SChen Zhong 	},								\
572fdf8292SChen Zhong 	.qi = BIT(13),							\
582fdf8292SChen Zhong 	.vselon_reg = voselon,						\
592fdf8292SChen Zhong 	.vselctrl_reg = vosel_ctrl,					\
602fdf8292SChen Zhong 	.vselctrl_mask = BIT(1),					\
612fdf8292SChen Zhong }
622fdf8292SChen Zhong 
632fdf8292SChen Zhong #define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel,	\
642fdf8292SChen Zhong 		vosel_mask, _modeset_reg, _modeset_mask)		\
652fdf8292SChen Zhong [MT6323_ID_##vreg] = {							\
662fdf8292SChen Zhong 	.desc = {							\
672fdf8292SChen Zhong 		.name = #vreg,						\
682fdf8292SChen Zhong 		.of_match = of_match_ptr(match),			\
692fdf8292SChen Zhong 		.ops = &mt6323_volt_table_ops,				\
702fdf8292SChen Zhong 		.type = REGULATOR_VOLTAGE,				\
712fdf8292SChen Zhong 		.id = MT6323_ID_##vreg,					\
722fdf8292SChen Zhong 		.owner = THIS_MODULE,					\
732fdf8292SChen Zhong 		.n_voltages = ARRAY_SIZE(ldo_volt_table),		\
742fdf8292SChen Zhong 		.volt_table = ldo_volt_table,				\
752fdf8292SChen Zhong 		.vsel_reg = vosel,					\
762fdf8292SChen Zhong 		.vsel_mask = vosel_mask,				\
772fdf8292SChen Zhong 		.enable_reg = enreg,					\
782fdf8292SChen Zhong 		.enable_mask = BIT(enbit),				\
792fdf8292SChen Zhong 	},								\
802fdf8292SChen Zhong 	.qi = BIT(15),							\
812fdf8292SChen Zhong 	.modeset_reg = _modeset_reg,					\
822fdf8292SChen Zhong 	.modeset_mask = _modeset_mask,					\
832fdf8292SChen Zhong }
842fdf8292SChen Zhong 
852fdf8292SChen Zhong #define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt,		\
862fdf8292SChen Zhong 		_modeset_reg, _modeset_mask)				\
872fdf8292SChen Zhong [MT6323_ID_##vreg] = {							\
882fdf8292SChen Zhong 	.desc = {							\
892fdf8292SChen Zhong 		.name = #vreg,						\
902fdf8292SChen Zhong 		.of_match = of_match_ptr(match),			\
912fdf8292SChen Zhong 		.ops = &mt6323_volt_fixed_ops,				\
922fdf8292SChen Zhong 		.type = REGULATOR_VOLTAGE,				\
932fdf8292SChen Zhong 		.id = MT6323_ID_##vreg,					\
942fdf8292SChen Zhong 		.owner = THIS_MODULE,					\
952fdf8292SChen Zhong 		.n_voltages = 1,					\
962fdf8292SChen Zhong 		.enable_reg = enreg,					\
972fdf8292SChen Zhong 		.enable_mask = BIT(enbit),				\
982fdf8292SChen Zhong 		.min_uV = volt,						\
992fdf8292SChen Zhong 	},								\
1002fdf8292SChen Zhong 	.qi = BIT(15),							\
1012fdf8292SChen Zhong 	.modeset_reg = _modeset_reg,					\
1022fdf8292SChen Zhong 	.modeset_mask = _modeset_mask,					\
1032fdf8292SChen Zhong }
1042fdf8292SChen Zhong 
10560ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range1[] = {
1062fdf8292SChen Zhong 	REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
1072fdf8292SChen Zhong };
1082fdf8292SChen Zhong 
10960ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range2[] = {
1102fdf8292SChen Zhong 	REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500),
1112fdf8292SChen Zhong };
1122fdf8292SChen Zhong 
11360ab7f41SMatti Vaittinen static const struct linear_range buck_volt_range3[] = {
1142fdf8292SChen Zhong 	REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
1152fdf8292SChen Zhong };
1162fdf8292SChen Zhong 
117dad110a0SAxel Lin static const unsigned int ldo_volt_table1[] = {
1182fdf8292SChen Zhong 	3300000, 3400000, 3500000, 3600000,
1192fdf8292SChen Zhong };
1202fdf8292SChen Zhong 
121dad110a0SAxel Lin static const unsigned int ldo_volt_table2[] = {
1222fdf8292SChen Zhong 	1500000, 1800000, 2500000, 2800000,
1232fdf8292SChen Zhong };
1242fdf8292SChen Zhong 
125dad110a0SAxel Lin static const unsigned int ldo_volt_table3[] = {
1262fdf8292SChen Zhong 	1800000, 3300000,
1272fdf8292SChen Zhong };
1282fdf8292SChen Zhong 
129dad110a0SAxel Lin static const unsigned int ldo_volt_table4[] = {
1302fdf8292SChen Zhong 	3000000, 3300000,
1312fdf8292SChen Zhong };
1322fdf8292SChen Zhong 
133dad110a0SAxel Lin static const unsigned int ldo_volt_table5[] = {
1342fdf8292SChen Zhong 	1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
1352fdf8292SChen Zhong };
1362fdf8292SChen Zhong 
137dad110a0SAxel Lin static const unsigned int ldo_volt_table6[] = {
1382fdf8292SChen Zhong 	1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
1392fdf8292SChen Zhong };
1402fdf8292SChen Zhong 
141dad110a0SAxel Lin static const unsigned int ldo_volt_table7[] = {
1422fdf8292SChen Zhong 	1200000, 1300000, 1500000, 1800000,
1432fdf8292SChen Zhong };
1442fdf8292SChen Zhong 
145dad110a0SAxel Lin static const unsigned int ldo_volt_table8[] = {
1462fdf8292SChen Zhong 	1800000, 3000000,
1472fdf8292SChen Zhong };
1482fdf8292SChen Zhong 
149dad110a0SAxel Lin static const unsigned int ldo_volt_table9[] = {
1502fdf8292SChen Zhong 	1200000, 1350000, 1500000, 1800000,
1512fdf8292SChen Zhong };
1522fdf8292SChen Zhong 
153dad110a0SAxel Lin static const unsigned int ldo_volt_table10[] = {
1542fdf8292SChen Zhong 	1200000, 1300000, 1500000, 1800000,
1552fdf8292SChen Zhong };
1562fdf8292SChen Zhong 
mt6323_get_status(struct regulator_dev * rdev)1572fdf8292SChen Zhong static int mt6323_get_status(struct regulator_dev *rdev)
1582fdf8292SChen Zhong {
1592fdf8292SChen Zhong 	int ret;
1602fdf8292SChen Zhong 	u32 regval;
1612fdf8292SChen Zhong 	struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
1622fdf8292SChen Zhong 
1632fdf8292SChen Zhong 	ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval);
1642fdf8292SChen Zhong 	if (ret != 0) {
1652fdf8292SChen Zhong 		dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
1662fdf8292SChen Zhong 		return ret;
1672fdf8292SChen Zhong 	}
1682fdf8292SChen Zhong 
1692fdf8292SChen Zhong 	return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
1702fdf8292SChen Zhong }
1712fdf8292SChen Zhong 
mt6323_ldo_set_mode(struct regulator_dev * rdev,unsigned int mode)1722fdf8292SChen Zhong static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
1732fdf8292SChen Zhong {
1742fdf8292SChen Zhong 	int ret, val = 0;
1752fdf8292SChen Zhong 	struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
1762fdf8292SChen Zhong 
1772fdf8292SChen Zhong 	if (!info->modeset_mask) {
1782fdf8292SChen Zhong 		dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n",
1792fdf8292SChen Zhong 			info->desc.name);
1802fdf8292SChen Zhong 		return -EINVAL;
1812fdf8292SChen Zhong 	}
1822fdf8292SChen Zhong 
1832fdf8292SChen Zhong 	switch (mode) {
1842fdf8292SChen Zhong 	case REGULATOR_MODE_STANDBY:
1852fdf8292SChen Zhong 		val = MT6323_LDO_MODE_LP;
1862fdf8292SChen Zhong 		break;
1872fdf8292SChen Zhong 	case REGULATOR_MODE_NORMAL:
1882fdf8292SChen Zhong 		val = MT6323_LDO_MODE_NORMAL;
1892fdf8292SChen Zhong 		break;
1902fdf8292SChen Zhong 	default:
1912fdf8292SChen Zhong 		return -EINVAL;
1922fdf8292SChen Zhong 	}
1932fdf8292SChen Zhong 
1942fdf8292SChen Zhong 	val <<= ffs(info->modeset_mask) - 1;
1952fdf8292SChen Zhong 
1962fdf8292SChen Zhong 	ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
1972fdf8292SChen Zhong 				  info->modeset_mask, val);
1982fdf8292SChen Zhong 
1992fdf8292SChen Zhong 	return ret;
2002fdf8292SChen Zhong }
2012fdf8292SChen Zhong 
mt6323_ldo_get_mode(struct regulator_dev * rdev)2022fdf8292SChen Zhong static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev)
2032fdf8292SChen Zhong {
2042fdf8292SChen Zhong 	unsigned int val;
2052fdf8292SChen Zhong 	unsigned int mode;
2062fdf8292SChen Zhong 	int ret;
2072fdf8292SChen Zhong 	struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
2082fdf8292SChen Zhong 
2092fdf8292SChen Zhong 	if (!info->modeset_mask) {
2102fdf8292SChen Zhong 		dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n",
2112fdf8292SChen Zhong 			info->desc.name);
2122fdf8292SChen Zhong 		return -EINVAL;
2132fdf8292SChen Zhong 	}
2142fdf8292SChen Zhong 
2152fdf8292SChen Zhong 	ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
2162fdf8292SChen Zhong 	if (ret < 0)
2172fdf8292SChen Zhong 		return ret;
2182fdf8292SChen Zhong 
2192fdf8292SChen Zhong 	val &= info->modeset_mask;
2202fdf8292SChen Zhong 	val >>= ffs(info->modeset_mask) - 1;
2212fdf8292SChen Zhong 
2222fdf8292SChen Zhong 	if (val & 0x1)
2232fdf8292SChen Zhong 		mode = REGULATOR_MODE_STANDBY;
2242fdf8292SChen Zhong 	else
2252fdf8292SChen Zhong 		mode = REGULATOR_MODE_NORMAL;
2262fdf8292SChen Zhong 
2272fdf8292SChen Zhong 	return mode;
2282fdf8292SChen Zhong }
2292fdf8292SChen Zhong 
230634f41dcSAxel Lin static const struct regulator_ops mt6323_volt_range_ops = {
2312fdf8292SChen Zhong 	.list_voltage = regulator_list_voltage_linear_range,
2322fdf8292SChen Zhong 	.map_voltage = regulator_map_voltage_linear_range,
2332fdf8292SChen Zhong 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
2342fdf8292SChen Zhong 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
2352fdf8292SChen Zhong 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
2362fdf8292SChen Zhong 	.enable = regulator_enable_regmap,
2372fdf8292SChen Zhong 	.disable = regulator_disable_regmap,
2382fdf8292SChen Zhong 	.is_enabled = regulator_is_enabled_regmap,
2392fdf8292SChen Zhong 	.get_status = mt6323_get_status,
2402fdf8292SChen Zhong };
2412fdf8292SChen Zhong 
242634f41dcSAxel Lin static const struct regulator_ops mt6323_volt_table_ops = {
2432fdf8292SChen Zhong 	.list_voltage = regulator_list_voltage_table,
2442fdf8292SChen Zhong 	.map_voltage = regulator_map_voltage_iterate,
2452fdf8292SChen Zhong 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
2462fdf8292SChen Zhong 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
2472fdf8292SChen Zhong 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
2482fdf8292SChen Zhong 	.enable = regulator_enable_regmap,
2492fdf8292SChen Zhong 	.disable = regulator_disable_regmap,
2502fdf8292SChen Zhong 	.is_enabled = regulator_is_enabled_regmap,
2512fdf8292SChen Zhong 	.get_status = mt6323_get_status,
2522fdf8292SChen Zhong 	.set_mode = mt6323_ldo_set_mode,
2532fdf8292SChen Zhong 	.get_mode = mt6323_ldo_get_mode,
2542fdf8292SChen Zhong };
2552fdf8292SChen Zhong 
256634f41dcSAxel Lin static const struct regulator_ops mt6323_volt_fixed_ops = {
2572fdf8292SChen Zhong 	.list_voltage = regulator_list_voltage_linear,
2582fdf8292SChen Zhong 	.enable = regulator_enable_regmap,
2592fdf8292SChen Zhong 	.disable = regulator_disable_regmap,
2602fdf8292SChen Zhong 	.is_enabled = regulator_is_enabled_regmap,
2612fdf8292SChen Zhong 	.get_status = mt6323_get_status,
2622fdf8292SChen Zhong 	.set_mode = mt6323_ldo_set_mode,
2632fdf8292SChen Zhong 	.get_mode = mt6323_ldo_get_mode,
2642fdf8292SChen Zhong };
2652fdf8292SChen Zhong 
2662fdf8292SChen Zhong /* The array is indexed by id(MT6323_ID_XXX) */
2672fdf8292SChen Zhong static struct mt6323_regulator_info mt6323_regulators[] = {
2682fdf8292SChen Zhong 	MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250,
2692fdf8292SChen Zhong 		buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f,
2702fdf8292SChen Zhong 		MT6323_VPROC_CON10, MT6323_VPROC_CON5),
2712fdf8292SChen Zhong 	MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500,
2722fdf8292SChen Zhong 		buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f,
2732fdf8292SChen Zhong 		MT6323_VSYS_CON10, MT6323_VSYS_CON5),
2742fdf8292SChen Zhong 	MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
2752fdf8292SChen Zhong 		buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9,
2762fdf8292SChen Zhong 		0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5),
2772fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000,
2782fdf8292SChen Zhong 		MT6323_ANALDO_CON1, 0x2),
2792fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000,
2802fdf8292SChen Zhong 		MT6323_ANALDO_CON20, 0x2),
2812fdf8292SChen Zhong 	MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1,
2822fdf8292SChen Zhong 		MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC,
2832fdf8292SChen Zhong 		MT6323_ANALDO_CON21, 0x2),
2842fdf8292SChen Zhong 	MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1,
2852fdf8292SChen Zhong 		MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC,
2862fdf8292SChen Zhong 		MT6323_ANALDO_CON21, 0x2),
2872fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000,
2882fdf8292SChen Zhong 		MT6323_ANALDO_CON2, 0x2),
2892fdf8292SChen Zhong 	MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2,
2902fdf8292SChen Zhong 		MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0),
2912fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000,
2922fdf8292SChen Zhong 		MT6323_DIGLDO_CON0, 0x2),
2932fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000,
2942fdf8292SChen Zhong 		MT6323_DIGLDO_CON2, 0x2),
2952fdf8292SChen Zhong 	MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3,
2962fdf8292SChen Zhong 		MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10,
2972fdf8292SChen Zhong 		MT6323_DIGLDO_CON3, 0x2),
2982fdf8292SChen Zhong 	MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4,
2992fdf8292SChen Zhong 		MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80,
3002fdf8292SChen Zhong 		MT6323_DIGLDO_CON5, 0x2),
3012fdf8292SChen Zhong 	MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4,
3022fdf8292SChen Zhong 		MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80,
3032fdf8292SChen Zhong 		MT6323_DIGLDO_CON6, 0x2),
3042fdf8292SChen Zhong 	MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5,
3052fdf8292SChen Zhong 		MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0,
3062fdf8292SChen Zhong 		MT6323_DIGLDO_CON7, 0x2),
3072fdf8292SChen Zhong 	MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6,
3082fdf8292SChen Zhong 		MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0,
3092fdf8292SChen Zhong 		MT6323_DIGLDO_CON8, 0x2),
3102fdf8292SChen Zhong 	MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7,
3112fdf8292SChen Zhong 		MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60,
3122fdf8292SChen Zhong 		MT6323_DIGLDO_CON9, 0x2),
3132fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000,
3142fdf8292SChen Zhong 		MT6323_DIGLDO_CON11, 0x2),
3152fdf8292SChen Zhong 	MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8,
3162fdf8292SChen Zhong 		MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20,
3172fdf8292SChen Zhong 		MT6323_DIGLDO_CON13, 0x2),
3182fdf8292SChen Zhong 	MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8,
3192fdf8292SChen Zhong 		MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20,
3202fdf8292SChen Zhong 		MT6323_DIGLDO_CON14, 0x2),
3212fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000,
3222fdf8292SChen Zhong 		-1, 0),
3232fdf8292SChen Zhong 	MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5,
3242fdf8292SChen Zhong 		MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0,
3252fdf8292SChen Zhong 		MT6323_DIGLDO_CON31, 0x2),
3262fdf8292SChen Zhong 	MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5,
3272fdf8292SChen Zhong 		MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0,
3282fdf8292SChen Zhong 		MT6323_DIGLDO_CON39, 0x2),
3292fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000,
3302fdf8292SChen Zhong 		MT6323_DIGLDO_CON45, 0x2),
3312fdf8292SChen Zhong 	MT6323_LDO("ldo_vm", VM, ldo_volt_table9,
3322fdf8292SChen Zhong 		MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30,
3332fdf8292SChen Zhong 		MT6323_DIGLDO_CON47, 0x2),
3342fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000,
3352fdf8292SChen Zhong 		MT6323_DIGLDO_CON49, 0x2),
3362fdf8292SChen Zhong 	MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10,
3372fdf8292SChen Zhong 		MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60,
3382fdf8292SChen Zhong 		MT6323_DIGLDO_CON51, 0x2),
3392fdf8292SChen Zhong 	MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000,
3402fdf8292SChen Zhong 		MT6323_DIGLDO_CON53, 0x2),
3412fdf8292SChen Zhong };
3422fdf8292SChen Zhong 
mt6323_set_buck_vosel_reg(struct platform_device * pdev)3432fdf8292SChen Zhong static int mt6323_set_buck_vosel_reg(struct platform_device *pdev)
3442fdf8292SChen Zhong {
3452fdf8292SChen Zhong 	struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
3462fdf8292SChen Zhong 	int i;
3472fdf8292SChen Zhong 	u32 regval;
3482fdf8292SChen Zhong 
3492fdf8292SChen Zhong 	for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
3502fdf8292SChen Zhong 		if (mt6323_regulators[i].vselctrl_reg) {
3512fdf8292SChen Zhong 			if (regmap_read(mt6323->regmap,
3522fdf8292SChen Zhong 				mt6323_regulators[i].vselctrl_reg,
3532fdf8292SChen Zhong 				&regval) < 0) {
3542fdf8292SChen Zhong 				dev_err(&pdev->dev,
3552fdf8292SChen Zhong 					"Failed to read buck ctrl\n");
3562fdf8292SChen Zhong 				return -EIO;
3572fdf8292SChen Zhong 			}
3582fdf8292SChen Zhong 
3592fdf8292SChen Zhong 			if (regval & mt6323_regulators[i].vselctrl_mask) {
3602fdf8292SChen Zhong 				mt6323_regulators[i].desc.vsel_reg =
3612fdf8292SChen Zhong 				mt6323_regulators[i].vselon_reg;
3622fdf8292SChen Zhong 			}
3632fdf8292SChen Zhong 		}
3642fdf8292SChen Zhong 	}
3652fdf8292SChen Zhong 
3662fdf8292SChen Zhong 	return 0;
3672fdf8292SChen Zhong }
3682fdf8292SChen Zhong 
mt6323_regulator_probe(struct platform_device * pdev)3692fdf8292SChen Zhong static int mt6323_regulator_probe(struct platform_device *pdev)
3702fdf8292SChen Zhong {
3712fdf8292SChen Zhong 	struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
3722fdf8292SChen Zhong 	struct regulator_config config = {};
3732fdf8292SChen Zhong 	struct regulator_dev *rdev;
3742fdf8292SChen Zhong 	int i;
3752fdf8292SChen Zhong 	u32 reg_value;
3762fdf8292SChen Zhong 
3772fdf8292SChen Zhong 	/* Query buck controller to select activated voltage register part */
3782fdf8292SChen Zhong 	if (mt6323_set_buck_vosel_reg(pdev))
3792fdf8292SChen Zhong 		return -EIO;
3802fdf8292SChen Zhong 
3812fdf8292SChen Zhong 	/* Read PMIC chip revision to update constraints and voltage table */
3822fdf8292SChen Zhong 	if (regmap_read(mt6323->regmap, MT6323_CID, &reg_value) < 0) {
3832fdf8292SChen Zhong 		dev_err(&pdev->dev, "Failed to read Chip ID\n");
3842fdf8292SChen Zhong 		return -EIO;
3852fdf8292SChen Zhong 	}
3862fdf8292SChen Zhong 	dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
3872fdf8292SChen Zhong 
3882fdf8292SChen Zhong 	for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
3892fdf8292SChen Zhong 		config.dev = &pdev->dev;
3902fdf8292SChen Zhong 		config.driver_data = &mt6323_regulators[i];
3912fdf8292SChen Zhong 		config.regmap = mt6323->regmap;
3922fdf8292SChen Zhong 		rdev = devm_regulator_register(&pdev->dev,
3932fdf8292SChen Zhong 				&mt6323_regulators[i].desc, &config);
3942fdf8292SChen Zhong 		if (IS_ERR(rdev)) {
3952fdf8292SChen Zhong 			dev_err(&pdev->dev, "failed to register %s\n",
3962fdf8292SChen Zhong 				mt6323_regulators[i].desc.name);
3972fdf8292SChen Zhong 			return PTR_ERR(rdev);
3982fdf8292SChen Zhong 		}
3992fdf8292SChen Zhong 	}
4002fdf8292SChen Zhong 	return 0;
4012fdf8292SChen Zhong }
4022fdf8292SChen Zhong 
4032fdf8292SChen Zhong static const struct platform_device_id mt6323_platform_ids[] = {
4042fdf8292SChen Zhong 	{"mt6323-regulator", 0},
4052fdf8292SChen Zhong 	{ /* sentinel */ },
4062fdf8292SChen Zhong };
4072fdf8292SChen Zhong MODULE_DEVICE_TABLE(platform, mt6323_platform_ids);
4082fdf8292SChen Zhong 
4092fdf8292SChen Zhong static struct platform_driver mt6323_regulator_driver = {
4102fdf8292SChen Zhong 	.driver = {
4112fdf8292SChen Zhong 		.name = "mt6323-regulator",
412*259b93b2SDouglas Anderson 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
4132fdf8292SChen Zhong 	},
4142fdf8292SChen Zhong 	.probe = mt6323_regulator_probe,
4152fdf8292SChen Zhong 	.id_table = mt6323_platform_ids,
4162fdf8292SChen Zhong };
4172fdf8292SChen Zhong 
4182fdf8292SChen Zhong module_platform_driver(mt6323_regulator_driver);
4192fdf8292SChen Zhong 
4202fdf8292SChen Zhong MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
42115b1dc98SAxel Lin MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6323 PMIC");
4222fdf8292SChen Zhong MODULE_LICENSE("GPL v2");
423