1 /* 2 * Maxim MAX77620 Regulator driver 3 * 4 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 5 * 6 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com> 7 * Laxman Dewangan <ldewangan@nvidia.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms and conditions of the GNU General Public License, 11 * version 2, as published by the Free Software Foundation. 12 */ 13 14 #include <linux/init.h> 15 #include <linux/mfd/max77620.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/platform_device.h> 19 #include <linux/regmap.h> 20 #include <linux/regulator/driver.h> 21 #include <linux/regulator/machine.h> 22 #include <linux/regulator/of_regulator.h> 23 24 #define max77620_rails(_name) "max77620-"#_name 25 26 /* Power Mode */ 27 #define MAX77620_POWER_MODE_NORMAL 3 28 #define MAX77620_POWER_MODE_LPM 2 29 #define MAX77620_POWER_MODE_GLPM 1 30 #define MAX77620_POWER_MODE_DISABLE 0 31 32 /* SD Slew Rate */ 33 #define MAX77620_SD_SR_13_75 0 34 #define MAX77620_SD_SR_27_5 1 35 #define MAX77620_SD_SR_55 2 36 #define MAX77620_SD_SR_100 3 37 38 enum max77620_regulators { 39 MAX77620_REGULATOR_ID_SD0, 40 MAX77620_REGULATOR_ID_SD1, 41 MAX77620_REGULATOR_ID_SD2, 42 MAX77620_REGULATOR_ID_SD3, 43 MAX77620_REGULATOR_ID_SD4, 44 MAX77620_REGULATOR_ID_LDO0, 45 MAX77620_REGULATOR_ID_LDO1, 46 MAX77620_REGULATOR_ID_LDO2, 47 MAX77620_REGULATOR_ID_LDO3, 48 MAX77620_REGULATOR_ID_LDO4, 49 MAX77620_REGULATOR_ID_LDO5, 50 MAX77620_REGULATOR_ID_LDO6, 51 MAX77620_REGULATOR_ID_LDO7, 52 MAX77620_REGULATOR_ID_LDO8, 53 MAX77620_NUM_REGS, 54 }; 55 56 /* Regulator types */ 57 enum max77620_regulator_type { 58 MAX77620_REGULATOR_TYPE_SD, 59 MAX77620_REGULATOR_TYPE_LDO_N, 60 MAX77620_REGULATOR_TYPE_LDO_P, 61 }; 62 63 struct max77620_regulator_info { 64 u8 type; 65 u8 fps_addr; 66 u8 volt_addr; 67 u8 cfg_addr; 68 u8 power_mode_mask; 69 u8 power_mode_shift; 70 u8 remote_sense_addr; 71 u8 remote_sense_mask; 72 struct regulator_desc desc; 73 }; 74 75 struct max77620_regulator_pdata { 76 struct regulator_init_data *reg_idata; 77 int active_fps_src; 78 int active_fps_pd_slot; 79 int active_fps_pu_slot; 80 int suspend_fps_src; 81 int suspend_fps_pd_slot; 82 int suspend_fps_pu_slot; 83 int current_mode; 84 }; 85 86 struct max77620_regulator { 87 struct device *dev; 88 struct regmap *rmap; 89 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS]; 90 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS]; 91 int enable_power_mode[MAX77620_NUM_REGS]; 92 int current_power_mode[MAX77620_NUM_REGS]; 93 int active_fps_src[MAX77620_NUM_REGS]; 94 }; 95 96 #define fps_src_name(fps_src) \ 97 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \ 98 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \ 99 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE") 100 101 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic, 102 int id) 103 { 104 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 105 unsigned int val; 106 int ret; 107 108 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); 109 if (ret < 0) { 110 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", 111 rinfo->fps_addr, ret); 112 return ret; 113 } 114 115 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; 116 } 117 118 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, 119 int fps_src, int id) 120 { 121 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 122 unsigned int val; 123 int ret; 124 125 switch (fps_src) { 126 case MAX77620_FPS_SRC_0: 127 case MAX77620_FPS_SRC_1: 128 case MAX77620_FPS_SRC_2: 129 case MAX77620_FPS_SRC_NONE: 130 break; 131 132 case MAX77620_FPS_SRC_DEF: 133 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); 134 if (ret < 0) { 135 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", 136 rinfo->fps_addr, ret); 137 return ret; 138 } 139 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; 140 pmic->active_fps_src[id] = ret; 141 return 0; 142 143 default: 144 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n", 145 fps_src, id); 146 return -EINVAL; 147 } 148 149 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, 150 MAX77620_FPS_SRC_MASK, 151 fps_src << MAX77620_FPS_SRC_SHIFT); 152 if (ret < 0) { 153 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n", 154 rinfo->fps_addr, ret); 155 return ret; 156 } 157 pmic->active_fps_src[id] = fps_src; 158 159 return 0; 160 } 161 162 static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic, 163 int id, bool is_suspend) 164 { 165 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 166 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 167 unsigned int val = 0; 168 unsigned int mask = 0; 169 int pu = rpdata->active_fps_pu_slot; 170 int pd = rpdata->active_fps_pd_slot; 171 int ret = 0; 172 173 if (is_suspend) { 174 pu = rpdata->suspend_fps_pu_slot; 175 pd = rpdata->suspend_fps_pd_slot; 176 } 177 178 /* FPS power up period setting */ 179 if (pu >= 0) { 180 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT); 181 mask |= MAX77620_FPS_PU_PERIOD_MASK; 182 } 183 184 /* FPS power down period setting */ 185 if (pd >= 0) { 186 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT); 187 mask |= MAX77620_FPS_PD_PERIOD_MASK; 188 } 189 190 if (mask) { 191 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, 192 mask, val); 193 if (ret < 0) { 194 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", 195 rinfo->fps_addr, ret); 196 return ret; 197 } 198 } 199 200 return ret; 201 } 202 203 static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic, 204 int power_mode, int id) 205 { 206 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 207 u8 mask = rinfo->power_mode_mask; 208 u8 shift = rinfo->power_mode_shift; 209 u8 addr; 210 int ret; 211 212 switch (rinfo->type) { 213 case MAX77620_REGULATOR_TYPE_SD: 214 addr = rinfo->cfg_addr; 215 break; 216 default: 217 addr = rinfo->volt_addr; 218 break; 219 } 220 221 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift); 222 if (ret < 0) { 223 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n", 224 id, ret); 225 return ret; 226 } 227 pmic->current_power_mode[id] = power_mode; 228 229 return ret; 230 } 231 232 static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic, 233 int id) 234 { 235 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 236 unsigned int val, addr; 237 u8 mask = rinfo->power_mode_mask; 238 u8 shift = rinfo->power_mode_shift; 239 int ret; 240 241 switch (rinfo->type) { 242 case MAX77620_REGULATOR_TYPE_SD: 243 addr = rinfo->cfg_addr; 244 break; 245 default: 246 addr = rinfo->volt_addr; 247 break; 248 } 249 250 ret = regmap_read(pmic->rmap, addr, &val); 251 if (ret < 0) { 252 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n", 253 id, addr, ret); 254 return ret; 255 } 256 257 return (val & mask) >> shift; 258 } 259 260 static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id) 261 { 262 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 263 unsigned int rval; 264 int slew_rate; 265 int ret; 266 267 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval); 268 if (ret < 0) { 269 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n", 270 rinfo->cfg_addr, ret); 271 return ret; 272 } 273 274 switch (rinfo->type) { 275 case MAX77620_REGULATOR_TYPE_SD: 276 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3; 277 switch (slew_rate) { 278 case 0: 279 slew_rate = 13750; 280 break; 281 case 1: 282 slew_rate = 27500; 283 break; 284 case 2: 285 slew_rate = 55000; 286 break; 287 case 3: 288 slew_rate = 100000; 289 break; 290 } 291 rinfo->desc.ramp_delay = slew_rate; 292 break; 293 default: 294 slew_rate = rval & 0x1; 295 switch (slew_rate) { 296 case 0: 297 slew_rate = 100000; 298 break; 299 case 1: 300 slew_rate = 5000; 301 break; 302 } 303 rinfo->desc.ramp_delay = slew_rate; 304 break; 305 } 306 307 return 0; 308 } 309 310 static int max77620_init_pmic(struct max77620_regulator *pmic, int id) 311 { 312 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 313 int ret; 314 315 /* Update power mode */ 316 ret = max77620_regulator_get_power_mode(pmic, id); 317 if (ret < 0) 318 return ret; 319 320 pmic->current_power_mode[id] = ret; 321 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; 322 323 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) { 324 ret = max77620_regulator_get_fps_src(pmic, id); 325 if (ret < 0) 326 return ret; 327 rpdata->active_fps_src = ret; 328 } 329 330 /* If rails are externally control of FPS then enable it always. */ 331 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) { 332 ret = max77620_regulator_set_power_mode(pmic, 333 pmic->enable_power_mode[id], id); 334 if (ret < 0) 335 return ret; 336 } else { 337 if (pmic->current_power_mode[id] != 338 pmic->enable_power_mode[id]) { 339 ret = max77620_regulator_set_power_mode(pmic, 340 pmic->enable_power_mode[id], id); 341 if (ret < 0) 342 return ret; 343 } 344 } 345 346 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id); 347 if (ret < 0) 348 return ret; 349 350 ret = max77620_regulator_set_fps_slots(pmic, id, false); 351 if (ret < 0) 352 return ret; 353 354 return 0; 355 } 356 357 static int max77620_regulator_enable(struct regulator_dev *rdev) 358 { 359 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 360 int id = rdev_get_id(rdev); 361 362 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 363 return 0; 364 365 return max77620_regulator_set_power_mode(pmic, 366 pmic->enable_power_mode[id], id); 367 } 368 369 static int max77620_regulator_disable(struct regulator_dev *rdev) 370 { 371 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 372 int id = rdev_get_id(rdev); 373 374 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 375 return 0; 376 377 return max77620_regulator_set_power_mode(pmic, 378 MAX77620_POWER_MODE_DISABLE, id); 379 } 380 381 static int max77620_regulator_is_enabled(struct regulator_dev *rdev) 382 { 383 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 384 int id = rdev_get_id(rdev); 385 int ret = 1; 386 387 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 388 return 1; 389 390 ret = max77620_regulator_get_power_mode(pmic, id); 391 if (ret < 0) 392 return ret; 393 394 if (ret != MAX77620_POWER_MODE_DISABLE) 395 return 1; 396 397 return 0; 398 } 399 400 static int max77620_regulator_set_mode(struct regulator_dev *rdev, 401 unsigned int mode) 402 { 403 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 404 int id = rdev_get_id(rdev); 405 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 406 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 407 bool fpwm = false; 408 int power_mode; 409 int ret; 410 u8 val; 411 412 switch (mode) { 413 case REGULATOR_MODE_FAST: 414 fpwm = true; 415 power_mode = MAX77620_POWER_MODE_NORMAL; 416 break; 417 418 case REGULATOR_MODE_NORMAL: 419 power_mode = MAX77620_POWER_MODE_NORMAL; 420 break; 421 422 case REGULATOR_MODE_IDLE: 423 power_mode = MAX77620_POWER_MODE_LPM; 424 break; 425 426 default: 427 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n", 428 id, mode); 429 return -EINVAL; 430 } 431 432 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD) 433 goto skip_fpwm; 434 435 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0; 436 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, 437 MAX77620_SD_FPWM_MASK, val); 438 if (ret < 0) { 439 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", 440 rinfo->cfg_addr, ret); 441 return ret; 442 } 443 rpdata->current_mode = mode; 444 445 skip_fpwm: 446 ret = max77620_regulator_set_power_mode(pmic, power_mode, id); 447 if (ret < 0) 448 return ret; 449 450 pmic->enable_power_mode[id] = power_mode; 451 452 return 0; 453 } 454 455 static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev) 456 { 457 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 458 int id = rdev_get_id(rdev); 459 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 460 int fpwm = 0; 461 int ret; 462 int pm_mode, reg_mode; 463 unsigned int val; 464 465 ret = max77620_regulator_get_power_mode(pmic, id); 466 if (ret < 0) 467 return 0; 468 469 pm_mode = ret; 470 471 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { 472 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val); 473 if (ret < 0) { 474 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n", 475 rinfo->cfg_addr, ret); 476 return ret; 477 } 478 fpwm = !!(val & MAX77620_SD_FPWM_MASK); 479 } 480 481 switch (pm_mode) { 482 case MAX77620_POWER_MODE_NORMAL: 483 case MAX77620_POWER_MODE_DISABLE: 484 if (fpwm) 485 reg_mode = REGULATOR_MODE_FAST; 486 else 487 reg_mode = REGULATOR_MODE_NORMAL; 488 break; 489 case MAX77620_POWER_MODE_LPM: 490 case MAX77620_POWER_MODE_GLPM: 491 reg_mode = REGULATOR_MODE_IDLE; 492 break; 493 default: 494 return 0; 495 } 496 497 return reg_mode; 498 } 499 500 static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev, 501 int ramp_delay) 502 { 503 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 504 int id = rdev_get_id(rdev); 505 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 506 int ret, val; 507 u8 mask; 508 509 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { 510 if (ramp_delay <= 13750) 511 val = 0; 512 else if (ramp_delay <= 27500) 513 val = 1; 514 else if (ramp_delay <= 55000) 515 val = 2; 516 else 517 val = 3; 518 val <<= MAX77620_SD_SR_SHIFT; 519 mask = MAX77620_SD_SR_MASK; 520 } else { 521 if (ramp_delay <= 5000) 522 val = 1; 523 else 524 val = 0; 525 mask = MAX77620_LDO_SLEW_RATE_MASK; 526 } 527 528 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val); 529 if (ret < 0) 530 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", 531 rinfo->cfg_addr, ret); 532 533 return ret; 534 } 535 536 static int max77620_of_parse_cb(struct device_node *np, 537 const struct regulator_desc *desc, 538 struct regulator_config *config) 539 { 540 struct max77620_regulator *pmic = config->driver_data; 541 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id]; 542 u32 pval; 543 int ret; 544 545 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval); 546 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF; 547 548 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval); 549 rpdata->active_fps_pu_slot = (!ret) ? pval : -1; 550 551 ret = of_property_read_u32( 552 np, "maxim,active-fps-power-down-slot", &pval); 553 rpdata->active_fps_pd_slot = (!ret) ? pval : -1; 554 555 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval); 556 rpdata->suspend_fps_src = (!ret) ? pval : -1; 557 558 ret = of_property_read_u32( 559 np, "maxim,suspend-fps-power-up-slot", &pval); 560 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1; 561 562 ret = of_property_read_u32( 563 np, "maxim,suspend-fps-power-down-slot", &pval); 564 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1; 565 566 return max77620_init_pmic(pmic, desc->id); 567 } 568 569 static struct regulator_ops max77620_regulator_ops = { 570 .is_enabled = max77620_regulator_is_enabled, 571 .enable = max77620_regulator_enable, 572 .disable = max77620_regulator_disable, 573 .list_voltage = regulator_list_voltage_linear, 574 .map_voltage = regulator_map_voltage_linear, 575 .get_voltage_sel = regulator_get_voltage_sel_regmap, 576 .set_voltage_sel = regulator_set_voltage_sel_regmap, 577 .set_mode = max77620_regulator_set_mode, 578 .get_mode = max77620_regulator_get_mode, 579 .set_ramp_delay = max77620_regulator_set_ramp_delay, 580 .set_voltage_time_sel = regulator_set_voltage_time_sel, 581 .set_active_discharge = regulator_set_active_discharge_regmap, 582 }; 583 584 #define MAX77620_SD_CNF2_ROVS_EN_NONE 0 585 #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \ 586 _step_uV, _rs_add, _rs_mask) \ 587 [MAX77620_REGULATOR_ID_##_id] = { \ 588 .type = MAX77620_REGULATOR_TYPE_SD, \ 589 .volt_addr = MAX77620_REG_##_id, \ 590 .cfg_addr = MAX77620_REG_##_id##_CFG, \ 591 .fps_addr = MAX77620_REG_FPS_##_id, \ 592 .remote_sense_addr = _rs_add, \ 593 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \ 594 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \ 595 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \ 596 .desc = { \ 597 .name = max77620_rails(_name), \ 598 .of_match = of_match_ptr(#_name), \ 599 .regulators_node = of_match_ptr("regulators"), \ 600 .of_parse_cb = max77620_of_parse_cb, \ 601 .supply_name = _sname, \ 602 .id = MAX77620_REGULATOR_ID_##_id, \ 603 .ops = &max77620_regulator_ops, \ 604 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ 605 .min_uV = _min_uV, \ 606 .uV_step = _step_uV, \ 607 .enable_time = 500, \ 608 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \ 609 .vsel_reg = MAX77620_REG_##_id, \ 610 .active_discharge_off = 0, \ 611 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \ 612 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \ 613 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \ 614 .type = REGULATOR_VOLTAGE, \ 615 }, \ 616 } 617 618 #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \ 619 [MAX77620_REGULATOR_ID_##_id] = { \ 620 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \ 621 .volt_addr = MAX77620_REG_##_id##_CFG, \ 622 .cfg_addr = MAX77620_REG_##_id##_CFG2, \ 623 .fps_addr = MAX77620_REG_FPS_##_id, \ 624 .remote_sense_addr = 0xFF, \ 625 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \ 626 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \ 627 .desc = { \ 628 .name = max77620_rails(_name), \ 629 .of_match = of_match_ptr(#_name), \ 630 .regulators_node = of_match_ptr("regulators"), \ 631 .of_parse_cb = max77620_of_parse_cb, \ 632 .supply_name = _sname, \ 633 .id = MAX77620_REGULATOR_ID_##_id, \ 634 .ops = &max77620_regulator_ops, \ 635 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ 636 .min_uV = _min_uV, \ 637 .uV_step = _step_uV, \ 638 .enable_time = 500, \ 639 .vsel_mask = MAX77620_LDO_VOLT_MASK, \ 640 .vsel_reg = MAX77620_REG_##_id##_CFG, \ 641 .active_discharge_off = 0, \ 642 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \ 643 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \ 644 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \ 645 .type = REGULATOR_VOLTAGE, \ 646 }, \ 647 } 648 649 static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = { 650 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0), 651 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1), 652 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 653 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 654 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), 655 656 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 657 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), 658 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), 659 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), 660 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), 661 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), 662 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), 663 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), 664 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 665 }; 666 667 static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = { 668 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0), 669 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1), 670 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 671 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 672 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), 673 674 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 675 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), 676 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), 677 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), 678 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), 679 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), 680 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), 681 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), 682 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 683 }; 684 685 static int max77620_regulator_probe(struct platform_device *pdev) 686 { 687 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent); 688 struct max77620_regulator_info *rinfo; 689 struct device *dev = &pdev->dev; 690 struct regulator_config config = { }; 691 struct max77620_regulator *pmic; 692 int ret = 0; 693 int id; 694 695 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); 696 if (!pmic) 697 return -ENOMEM; 698 699 platform_set_drvdata(pdev, pmic); 700 pmic->dev = dev; 701 pmic->rmap = max77620_chip->rmap; 702 if (!dev->of_node) 703 dev->of_node = pdev->dev.parent->of_node; 704 705 switch (max77620_chip->chip_id) { 706 case MAX77620: 707 rinfo = max77620_regs_info; 708 break; 709 default: 710 rinfo = max20024_regs_info; 711 break; 712 } 713 714 config.regmap = pmic->rmap; 715 config.dev = dev; 716 config.driver_data = pmic; 717 718 for (id = 0; id < MAX77620_NUM_REGS; id++) { 719 struct regulator_dev *rdev; 720 struct regulator_desc *rdesc; 721 722 if ((max77620_chip->chip_id == MAX77620) && 723 (id == MAX77620_REGULATOR_ID_SD4)) 724 continue; 725 726 rdesc = &rinfo[id].desc; 727 pmic->rinfo[id] = &max77620_regs_info[id]; 728 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; 729 730 ret = max77620_read_slew_rate(pmic, id); 731 if (ret < 0) 732 return ret; 733 734 rdev = devm_regulator_register(dev, rdesc, &config); 735 if (IS_ERR(rdev)) { 736 ret = PTR_ERR(rdev); 737 dev_err(dev, "Regulator registration %s failed: %d\n", 738 rdesc->name, ret); 739 return ret; 740 } 741 } 742 743 return 0; 744 } 745 746 #ifdef CONFIG_PM_SLEEP 747 static int max77620_regulator_suspend(struct device *dev) 748 { 749 struct max77620_regulator *pmic = dev_get_drvdata(dev); 750 struct max77620_regulator_pdata *reg_pdata; 751 int id; 752 753 for (id = 0; id < MAX77620_NUM_REGS; id++) { 754 reg_pdata = &pmic->reg_pdata[id]; 755 756 max77620_regulator_set_fps_slots(pmic, id, true); 757 if (reg_pdata->suspend_fps_src < 0) 758 continue; 759 760 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src, 761 id); 762 } 763 764 return 0; 765 } 766 767 static int max77620_regulator_resume(struct device *dev) 768 { 769 struct max77620_regulator *pmic = dev_get_drvdata(dev); 770 struct max77620_regulator_pdata *reg_pdata; 771 int id; 772 773 for (id = 0; id < MAX77620_NUM_REGS; id++) { 774 reg_pdata = &pmic->reg_pdata[id]; 775 776 max77620_regulator_set_fps_slots(pmic, id, false); 777 if (reg_pdata->active_fps_src < 0) 778 continue; 779 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src, 780 id); 781 } 782 783 return 0; 784 } 785 #endif 786 787 static const struct dev_pm_ops max77620_regulator_pm_ops = { 788 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend, 789 max77620_regulator_resume) 790 }; 791 792 static const struct platform_device_id max77620_regulator_devtype[] = { 793 { .name = "max77620-pmic", }, 794 { .name = "max20024-pmic", }, 795 {}, 796 }; 797 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype); 798 799 static struct platform_driver max77620_regulator_driver = { 800 .probe = max77620_regulator_probe, 801 .id_table = max77620_regulator_devtype, 802 .driver = { 803 .name = "max77620-pmic", 804 .pm = &max77620_regulator_pm_ops, 805 }, 806 }; 807 808 module_platform_driver(max77620_regulator_driver); 809 810 MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver"); 811 MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>"); 812 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); 813 MODULE_LICENSE("GPL v2"); 814