1 /* 2 * Maxim MAX77620 Regulator driver 3 * 4 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. 5 * 6 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com> 7 * Laxman Dewangan <ldewangan@nvidia.com> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms and conditions of the GNU General Public License, 11 * version 2, as published by the Free Software Foundation. 12 */ 13 14 #include <linux/init.h> 15 #include <linux/mfd/max77620.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/platform_device.h> 19 #include <linux/regmap.h> 20 #include <linux/regulator/driver.h> 21 #include <linux/regulator/machine.h> 22 #include <linux/regulator/of_regulator.h> 23 24 #define max77620_rails(_name) "max77620-"#_name 25 26 /* Power Mode */ 27 #define MAX77620_POWER_MODE_NORMAL 3 28 #define MAX77620_POWER_MODE_LPM 2 29 #define MAX77620_POWER_MODE_GLPM 1 30 #define MAX77620_POWER_MODE_DISABLE 0 31 32 /* SD Slew Rate */ 33 #define MAX77620_SD_SR_13_75 0 34 #define MAX77620_SD_SR_27_5 1 35 #define MAX77620_SD_SR_55 2 36 #define MAX77620_SD_SR_100 3 37 38 enum max77620_regulators { 39 MAX77620_REGULATOR_ID_SD0, 40 MAX77620_REGULATOR_ID_SD1, 41 MAX77620_REGULATOR_ID_SD2, 42 MAX77620_REGULATOR_ID_SD3, 43 MAX77620_REGULATOR_ID_SD4, 44 MAX77620_REGULATOR_ID_LDO0, 45 MAX77620_REGULATOR_ID_LDO1, 46 MAX77620_REGULATOR_ID_LDO2, 47 MAX77620_REGULATOR_ID_LDO3, 48 MAX77620_REGULATOR_ID_LDO4, 49 MAX77620_REGULATOR_ID_LDO5, 50 MAX77620_REGULATOR_ID_LDO6, 51 MAX77620_REGULATOR_ID_LDO7, 52 MAX77620_REGULATOR_ID_LDO8, 53 MAX77620_NUM_REGS, 54 }; 55 56 /* Regulator types */ 57 enum max77620_regulator_type { 58 MAX77620_REGULATOR_TYPE_SD, 59 MAX77620_REGULATOR_TYPE_LDO_N, 60 MAX77620_REGULATOR_TYPE_LDO_P, 61 }; 62 63 struct max77620_regulator_info { 64 u8 type; 65 u8 fps_addr; 66 u8 volt_addr; 67 u8 cfg_addr; 68 u8 power_mode_mask; 69 u8 power_mode_shift; 70 u8 remote_sense_addr; 71 u8 remote_sense_mask; 72 struct regulator_desc desc; 73 }; 74 75 struct max77620_regulator_pdata { 76 int active_fps_src; 77 int active_fps_pd_slot; 78 int active_fps_pu_slot; 79 int suspend_fps_src; 80 int suspend_fps_pd_slot; 81 int suspend_fps_pu_slot; 82 int current_mode; 83 int power_ok; 84 int ramp_rate_setting; 85 }; 86 87 struct max77620_regulator { 88 struct device *dev; 89 struct regmap *rmap; 90 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS]; 91 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS]; 92 int enable_power_mode[MAX77620_NUM_REGS]; 93 int current_power_mode[MAX77620_NUM_REGS]; 94 int active_fps_src[MAX77620_NUM_REGS]; 95 }; 96 97 #define fps_src_name(fps_src) \ 98 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \ 99 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \ 100 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE") 101 102 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic, 103 int id) 104 { 105 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 106 unsigned int val; 107 int ret; 108 109 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); 110 if (ret < 0) { 111 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", 112 rinfo->fps_addr, ret); 113 return ret; 114 } 115 116 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; 117 } 118 119 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic, 120 int fps_src, int id) 121 { 122 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 123 unsigned int val; 124 int ret; 125 126 if (!rinfo) 127 return 0; 128 129 switch (fps_src) { 130 case MAX77620_FPS_SRC_0: 131 case MAX77620_FPS_SRC_1: 132 case MAX77620_FPS_SRC_2: 133 case MAX77620_FPS_SRC_NONE: 134 break; 135 136 case MAX77620_FPS_SRC_DEF: 137 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val); 138 if (ret < 0) { 139 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n", 140 rinfo->fps_addr, ret); 141 return ret; 142 } 143 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT; 144 pmic->active_fps_src[id] = ret; 145 return 0; 146 147 default: 148 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n", 149 fps_src, id); 150 return -EINVAL; 151 } 152 153 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, 154 MAX77620_FPS_SRC_MASK, 155 fps_src << MAX77620_FPS_SRC_SHIFT); 156 if (ret < 0) { 157 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n", 158 rinfo->fps_addr, ret); 159 return ret; 160 } 161 pmic->active_fps_src[id] = fps_src; 162 163 return 0; 164 } 165 166 static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic, 167 int id, bool is_suspend) 168 { 169 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 170 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 171 unsigned int val = 0; 172 unsigned int mask = 0; 173 int pu = rpdata->active_fps_pu_slot; 174 int pd = rpdata->active_fps_pd_slot; 175 int ret = 0; 176 177 if (!rinfo) 178 return 0; 179 180 if (is_suspend) { 181 pu = rpdata->suspend_fps_pu_slot; 182 pd = rpdata->suspend_fps_pd_slot; 183 } 184 185 /* FPS power up period setting */ 186 if (pu >= 0) { 187 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT); 188 mask |= MAX77620_FPS_PU_PERIOD_MASK; 189 } 190 191 /* FPS power down period setting */ 192 if (pd >= 0) { 193 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT); 194 mask |= MAX77620_FPS_PD_PERIOD_MASK; 195 } 196 197 if (mask) { 198 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr, 199 mask, val); 200 if (ret < 0) { 201 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", 202 rinfo->fps_addr, ret); 203 return ret; 204 } 205 } 206 207 return ret; 208 } 209 210 static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic, 211 int power_mode, int id) 212 { 213 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 214 u8 mask = rinfo->power_mode_mask; 215 u8 shift = rinfo->power_mode_shift; 216 u8 addr; 217 int ret; 218 219 switch (rinfo->type) { 220 case MAX77620_REGULATOR_TYPE_SD: 221 addr = rinfo->cfg_addr; 222 break; 223 default: 224 addr = rinfo->volt_addr; 225 break; 226 } 227 228 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift); 229 if (ret < 0) { 230 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n", 231 id, ret); 232 return ret; 233 } 234 pmic->current_power_mode[id] = power_mode; 235 236 return ret; 237 } 238 239 static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic, 240 int id) 241 { 242 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 243 unsigned int val, addr; 244 u8 mask = rinfo->power_mode_mask; 245 u8 shift = rinfo->power_mode_shift; 246 int ret; 247 248 switch (rinfo->type) { 249 case MAX77620_REGULATOR_TYPE_SD: 250 addr = rinfo->cfg_addr; 251 break; 252 default: 253 addr = rinfo->volt_addr; 254 break; 255 } 256 257 ret = regmap_read(pmic->rmap, addr, &val); 258 if (ret < 0) { 259 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n", 260 id, addr, ret); 261 return ret; 262 } 263 264 return (val & mask) >> shift; 265 } 266 267 static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id) 268 { 269 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 270 unsigned int rval; 271 int slew_rate; 272 int ret; 273 274 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval); 275 if (ret < 0) { 276 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n", 277 rinfo->cfg_addr, ret); 278 return ret; 279 } 280 281 switch (rinfo->type) { 282 case MAX77620_REGULATOR_TYPE_SD: 283 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3; 284 switch (slew_rate) { 285 case 0: 286 slew_rate = 13750; 287 break; 288 case 1: 289 slew_rate = 27500; 290 break; 291 case 2: 292 slew_rate = 55000; 293 break; 294 case 3: 295 slew_rate = 100000; 296 break; 297 } 298 rinfo->desc.ramp_delay = slew_rate; 299 break; 300 default: 301 slew_rate = rval & 0x1; 302 switch (slew_rate) { 303 case 0: 304 slew_rate = 100000; 305 break; 306 case 1: 307 slew_rate = 5000; 308 break; 309 } 310 rinfo->desc.ramp_delay = slew_rate; 311 break; 312 } 313 314 return 0; 315 } 316 317 static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id, 318 int slew_rate) 319 { 320 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 321 unsigned int val; 322 int ret; 323 u8 mask; 324 325 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { 326 if (slew_rate <= 13750) 327 val = 0; 328 else if (slew_rate <= 27500) 329 val = 1; 330 else if (slew_rate <= 55000) 331 val = 2; 332 else 333 val = 3; 334 val <<= MAX77620_SD_SR_SHIFT; 335 mask = MAX77620_SD_SR_MASK; 336 } else { 337 if (slew_rate <= 5000) 338 val = 1; 339 else 340 val = 0; 341 mask = MAX77620_LDO_SLEW_RATE_MASK; 342 } 343 344 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val); 345 if (ret < 0) { 346 dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n", 347 id, ret); 348 return ret; 349 } 350 351 return 0; 352 } 353 354 static int max77620_config_power_ok(struct max77620_regulator *pmic, int id) 355 { 356 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 357 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 358 struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent); 359 u8 val, mask; 360 int ret; 361 362 switch (chip->chip_id) { 363 case MAX20024: 364 if (rpdata->power_ok >= 0) { 365 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) 366 mask = MAX20024_SD_CFG1_MPOK_MASK; 367 else 368 mask = MAX20024_LDO_CFG2_MPOK_MASK; 369 370 val = rpdata->power_ok ? mask : 0; 371 372 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, 373 mask, val); 374 if (ret < 0) { 375 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n", 376 rinfo->cfg_addr, ret); 377 return ret; 378 } 379 } 380 break; 381 382 default: 383 break; 384 } 385 386 return 0; 387 } 388 389 static int max77620_init_pmic(struct max77620_regulator *pmic, int id) 390 { 391 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 392 int ret; 393 394 max77620_config_power_ok(pmic, id); 395 396 /* Update power mode */ 397 ret = max77620_regulator_get_power_mode(pmic, id); 398 if (ret < 0) 399 return ret; 400 401 pmic->current_power_mode[id] = ret; 402 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; 403 404 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) { 405 ret = max77620_regulator_get_fps_src(pmic, id); 406 if (ret < 0) 407 return ret; 408 rpdata->active_fps_src = ret; 409 } 410 411 /* If rails are externally control of FPS then enable it always. */ 412 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) { 413 ret = max77620_regulator_set_power_mode(pmic, 414 pmic->enable_power_mode[id], id); 415 if (ret < 0) 416 return ret; 417 } else { 418 if (pmic->current_power_mode[id] != 419 pmic->enable_power_mode[id]) { 420 ret = max77620_regulator_set_power_mode(pmic, 421 pmic->enable_power_mode[id], id); 422 if (ret < 0) 423 return ret; 424 } 425 } 426 427 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id); 428 if (ret < 0) 429 return ret; 430 431 ret = max77620_regulator_set_fps_slots(pmic, id, false); 432 if (ret < 0) 433 return ret; 434 435 if (rpdata->ramp_rate_setting) { 436 ret = max77620_set_slew_rate(pmic, id, 437 rpdata->ramp_rate_setting); 438 if (ret < 0) 439 return ret; 440 } 441 442 return 0; 443 } 444 445 static int max77620_regulator_enable(struct regulator_dev *rdev) 446 { 447 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 448 int id = rdev_get_id(rdev); 449 450 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 451 return 0; 452 453 return max77620_regulator_set_power_mode(pmic, 454 pmic->enable_power_mode[id], id); 455 } 456 457 static int max77620_regulator_disable(struct regulator_dev *rdev) 458 { 459 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 460 int id = rdev_get_id(rdev); 461 462 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 463 return 0; 464 465 return max77620_regulator_set_power_mode(pmic, 466 MAX77620_POWER_MODE_DISABLE, id); 467 } 468 469 static int max77620_regulator_is_enabled(struct regulator_dev *rdev) 470 { 471 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 472 int id = rdev_get_id(rdev); 473 int ret = 1; 474 475 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 476 return 1; 477 478 ret = max77620_regulator_get_power_mode(pmic, id); 479 if (ret < 0) 480 return ret; 481 482 if (ret != MAX77620_POWER_MODE_DISABLE) 483 return 1; 484 485 return 0; 486 } 487 488 static int max77620_regulator_set_mode(struct regulator_dev *rdev, 489 unsigned int mode) 490 { 491 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 492 int id = rdev_get_id(rdev); 493 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 494 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 495 bool fpwm = false; 496 int power_mode; 497 int ret; 498 u8 val; 499 500 switch (mode) { 501 case REGULATOR_MODE_FAST: 502 fpwm = true; 503 power_mode = MAX77620_POWER_MODE_NORMAL; 504 break; 505 506 case REGULATOR_MODE_NORMAL: 507 power_mode = MAX77620_POWER_MODE_NORMAL; 508 break; 509 510 case REGULATOR_MODE_IDLE: 511 power_mode = MAX77620_POWER_MODE_LPM; 512 break; 513 514 default: 515 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n", 516 id, mode); 517 return -EINVAL; 518 } 519 520 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD) 521 goto skip_fpwm; 522 523 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0; 524 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, 525 MAX77620_SD_FPWM_MASK, val); 526 if (ret < 0) { 527 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n", 528 rinfo->cfg_addr, ret); 529 return ret; 530 } 531 rpdata->current_mode = mode; 532 533 skip_fpwm: 534 ret = max77620_regulator_set_power_mode(pmic, power_mode, id); 535 if (ret < 0) 536 return ret; 537 538 pmic->enable_power_mode[id] = power_mode; 539 540 return 0; 541 } 542 543 static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev) 544 { 545 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 546 int id = rdev_get_id(rdev); 547 struct max77620_regulator_info *rinfo = pmic->rinfo[id]; 548 int fpwm = 0; 549 int ret; 550 int pm_mode, reg_mode; 551 unsigned int val; 552 553 ret = max77620_regulator_get_power_mode(pmic, id); 554 if (ret < 0) 555 return 0; 556 557 pm_mode = ret; 558 559 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) { 560 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val); 561 if (ret < 0) { 562 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n", 563 rinfo->cfg_addr, ret); 564 return ret; 565 } 566 fpwm = !!(val & MAX77620_SD_FPWM_MASK); 567 } 568 569 switch (pm_mode) { 570 case MAX77620_POWER_MODE_NORMAL: 571 case MAX77620_POWER_MODE_DISABLE: 572 if (fpwm) 573 reg_mode = REGULATOR_MODE_FAST; 574 else 575 reg_mode = REGULATOR_MODE_NORMAL; 576 break; 577 case MAX77620_POWER_MODE_LPM: 578 case MAX77620_POWER_MODE_GLPM: 579 reg_mode = REGULATOR_MODE_IDLE; 580 break; 581 default: 582 return 0; 583 } 584 585 return reg_mode; 586 } 587 588 static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev, 589 int ramp_delay) 590 { 591 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 592 int id = rdev_get_id(rdev); 593 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id]; 594 595 /* Device specific ramp rate setting tells that platform has 596 * different ramp rate from advertised value. In this case, 597 * do not configure anything and just return success. 598 */ 599 if (rpdata->ramp_rate_setting) 600 return 0; 601 602 return max77620_set_slew_rate(pmic, id, ramp_delay); 603 } 604 605 static int max77620_of_parse_cb(struct device_node *np, 606 const struct regulator_desc *desc, 607 struct regulator_config *config) 608 { 609 struct max77620_regulator *pmic = config->driver_data; 610 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id]; 611 u32 pval; 612 int ret; 613 614 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval); 615 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF; 616 617 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval); 618 rpdata->active_fps_pu_slot = (!ret) ? pval : -1; 619 620 ret = of_property_read_u32( 621 np, "maxim,active-fps-power-down-slot", &pval); 622 rpdata->active_fps_pd_slot = (!ret) ? pval : -1; 623 624 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval); 625 rpdata->suspend_fps_src = (!ret) ? pval : -1; 626 627 ret = of_property_read_u32( 628 np, "maxim,suspend-fps-power-up-slot", &pval); 629 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1; 630 631 ret = of_property_read_u32( 632 np, "maxim,suspend-fps-power-down-slot", &pval); 633 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1; 634 635 ret = of_property_read_u32(np, "maxim,power-ok-control", &pval); 636 if (!ret) 637 rpdata->power_ok = pval; 638 else 639 rpdata->power_ok = -1; 640 641 ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval); 642 rpdata->ramp_rate_setting = (!ret) ? pval : 0; 643 644 return max77620_init_pmic(pmic, desc->id); 645 } 646 647 static const struct regulator_ops max77620_regulator_ops = { 648 .is_enabled = max77620_regulator_is_enabled, 649 .enable = max77620_regulator_enable, 650 .disable = max77620_regulator_disable, 651 .list_voltage = regulator_list_voltage_linear, 652 .map_voltage = regulator_map_voltage_linear, 653 .get_voltage_sel = regulator_get_voltage_sel_regmap, 654 .set_voltage_sel = regulator_set_voltage_sel_regmap, 655 .set_mode = max77620_regulator_set_mode, 656 .get_mode = max77620_regulator_get_mode, 657 .set_ramp_delay = max77620_regulator_set_ramp_delay, 658 .set_voltage_time_sel = regulator_set_voltage_time_sel, 659 .set_active_discharge = regulator_set_active_discharge_regmap, 660 }; 661 662 #define MAX77620_SD_CNF2_ROVS_EN_NONE 0 663 #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \ 664 _step_uV, _rs_add, _rs_mask) \ 665 [MAX77620_REGULATOR_ID_##_id] = { \ 666 .type = MAX77620_REGULATOR_TYPE_SD, \ 667 .volt_addr = MAX77620_REG_##_id, \ 668 .cfg_addr = MAX77620_REG_##_id##_CFG, \ 669 .fps_addr = MAX77620_REG_FPS_##_id, \ 670 .remote_sense_addr = _rs_add, \ 671 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \ 672 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \ 673 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \ 674 .desc = { \ 675 .name = max77620_rails(_name), \ 676 .of_match = of_match_ptr(#_name), \ 677 .regulators_node = of_match_ptr("regulators"), \ 678 .of_parse_cb = max77620_of_parse_cb, \ 679 .supply_name = _sname, \ 680 .id = MAX77620_REGULATOR_ID_##_id, \ 681 .ops = &max77620_regulator_ops, \ 682 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ 683 .min_uV = _min_uV, \ 684 .uV_step = _step_uV, \ 685 .enable_time = 500, \ 686 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \ 687 .vsel_reg = MAX77620_REG_##_id, \ 688 .active_discharge_off = 0, \ 689 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \ 690 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \ 691 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \ 692 .type = REGULATOR_VOLTAGE, \ 693 .owner = THIS_MODULE, \ 694 }, \ 695 } 696 697 #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \ 698 [MAX77620_REGULATOR_ID_##_id] = { \ 699 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \ 700 .volt_addr = MAX77620_REG_##_id##_CFG, \ 701 .cfg_addr = MAX77620_REG_##_id##_CFG2, \ 702 .fps_addr = MAX77620_REG_FPS_##_id, \ 703 .remote_sense_addr = 0xFF, \ 704 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \ 705 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \ 706 .desc = { \ 707 .name = max77620_rails(_name), \ 708 .of_match = of_match_ptr(#_name), \ 709 .regulators_node = of_match_ptr("regulators"), \ 710 .of_parse_cb = max77620_of_parse_cb, \ 711 .supply_name = _sname, \ 712 .id = MAX77620_REGULATOR_ID_##_id, \ 713 .ops = &max77620_regulator_ops, \ 714 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \ 715 .min_uV = _min_uV, \ 716 .uV_step = _step_uV, \ 717 .enable_time = 500, \ 718 .vsel_mask = MAX77620_LDO_VOLT_MASK, \ 719 .vsel_reg = MAX77620_REG_##_id##_CFG, \ 720 .active_discharge_off = 0, \ 721 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \ 722 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \ 723 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \ 724 .type = REGULATOR_VOLTAGE, \ 725 .owner = THIS_MODULE, \ 726 }, \ 727 } 728 729 static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = { 730 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0), 731 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1), 732 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 733 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 734 735 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 736 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), 737 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), 738 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), 739 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), 740 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), 741 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), 742 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), 743 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 744 }; 745 746 static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = { 747 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0), 748 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1), 749 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 750 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 751 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), 752 753 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 754 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), 755 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), 756 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), 757 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), 758 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), 759 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), 760 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), 761 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 762 }; 763 764 static int max77620_regulator_probe(struct platform_device *pdev) 765 { 766 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent); 767 struct max77620_regulator_info *rinfo; 768 struct device *dev = &pdev->dev; 769 struct regulator_config config = { }; 770 struct max77620_regulator *pmic; 771 int ret = 0; 772 int id; 773 774 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); 775 if (!pmic) 776 return -ENOMEM; 777 778 platform_set_drvdata(pdev, pmic); 779 pmic->dev = dev; 780 pmic->rmap = max77620_chip->rmap; 781 if (!dev->of_node) 782 dev->of_node = pdev->dev.parent->of_node; 783 784 switch (max77620_chip->chip_id) { 785 case MAX77620: 786 rinfo = max77620_regs_info; 787 break; 788 default: 789 rinfo = max20024_regs_info; 790 break; 791 } 792 793 config.regmap = pmic->rmap; 794 config.dev = dev; 795 config.driver_data = pmic; 796 797 for (id = 0; id < MAX77620_NUM_REGS; id++) { 798 struct regulator_dev *rdev; 799 struct regulator_desc *rdesc; 800 801 if ((max77620_chip->chip_id == MAX77620) && 802 (id == MAX77620_REGULATOR_ID_SD4)) 803 continue; 804 805 rdesc = &rinfo[id].desc; 806 pmic->rinfo[id] = &rinfo[id]; 807 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL; 808 pmic->reg_pdata[id].active_fps_src = -1; 809 pmic->reg_pdata[id].active_fps_pd_slot = -1; 810 pmic->reg_pdata[id].active_fps_pu_slot = -1; 811 pmic->reg_pdata[id].suspend_fps_src = -1; 812 pmic->reg_pdata[id].suspend_fps_pd_slot = -1; 813 pmic->reg_pdata[id].suspend_fps_pu_slot = -1; 814 pmic->reg_pdata[id].power_ok = -1; 815 pmic->reg_pdata[id].ramp_rate_setting = -1; 816 817 ret = max77620_read_slew_rate(pmic, id); 818 if (ret < 0) 819 return ret; 820 821 rdev = devm_regulator_register(dev, rdesc, &config); 822 if (IS_ERR(rdev)) { 823 ret = PTR_ERR(rdev); 824 dev_err(dev, "Regulator registration %s failed: %d\n", 825 rdesc->name, ret); 826 return ret; 827 } 828 } 829 830 return 0; 831 } 832 833 #ifdef CONFIG_PM_SLEEP 834 static int max77620_regulator_suspend(struct device *dev) 835 { 836 struct max77620_regulator *pmic = dev_get_drvdata(dev); 837 struct max77620_regulator_pdata *reg_pdata; 838 int id; 839 840 for (id = 0; id < MAX77620_NUM_REGS; id++) { 841 reg_pdata = &pmic->reg_pdata[id]; 842 843 max77620_regulator_set_fps_slots(pmic, id, true); 844 if (reg_pdata->suspend_fps_src < 0) 845 continue; 846 847 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src, 848 id); 849 } 850 851 return 0; 852 } 853 854 static int max77620_regulator_resume(struct device *dev) 855 { 856 struct max77620_regulator *pmic = dev_get_drvdata(dev); 857 struct max77620_regulator_pdata *reg_pdata; 858 int id; 859 860 for (id = 0; id < MAX77620_NUM_REGS; id++) { 861 reg_pdata = &pmic->reg_pdata[id]; 862 863 max77620_config_power_ok(pmic, id); 864 865 max77620_regulator_set_fps_slots(pmic, id, false); 866 if (reg_pdata->active_fps_src < 0) 867 continue; 868 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src, 869 id); 870 } 871 872 return 0; 873 } 874 #endif 875 876 static const struct dev_pm_ops max77620_regulator_pm_ops = { 877 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend, 878 max77620_regulator_resume) 879 }; 880 881 static const struct platform_device_id max77620_regulator_devtype[] = { 882 { .name = "max77620-pmic", }, 883 { .name = "max20024-pmic", }, 884 {}, 885 }; 886 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype); 887 888 static struct platform_driver max77620_regulator_driver = { 889 .probe = max77620_regulator_probe, 890 .id_table = max77620_regulator_devtype, 891 .driver = { 892 .name = "max77620-pmic", 893 .pm = &max77620_regulator_pm_ops, 894 }, 895 }; 896 897 module_platform_driver(max77620_regulator_driver); 898 899 MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver"); 900 MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>"); 901 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); 902 MODULE_LICENSE("GPL v2"); 903