1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Linear Technology LTC3589,LTC3589-1 regulator support 4 // 5 // Copyright (c) 2014 Philipp Zabel <p.zabel@pengutronix.de>, Pengutronix 6 7 #include <linux/i2c.h> 8 #include <linux/init.h> 9 #include <linux/interrupt.h> 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/of.h> 13 #include <linux/regmap.h> 14 #include <linux/regulator/driver.h> 15 #include <linux/regulator/of_regulator.h> 16 17 #define DRIVER_NAME "ltc3589" 18 19 #define LTC3589_IRQSTAT 0x02 20 #define LTC3589_SCR1 0x07 21 #define LTC3589_OVEN 0x10 22 #define LTC3589_SCR2 0x12 23 #define LTC3589_PGSTAT 0x13 24 #define LTC3589_VCCR 0x20 25 #define LTC3589_CLIRQ 0x21 26 #define LTC3589_B1DTV1 0x23 27 #define LTC3589_B1DTV2 0x24 28 #define LTC3589_VRRCR 0x25 29 #define LTC3589_B2DTV1 0x26 30 #define LTC3589_B2DTV2 0x27 31 #define LTC3589_B3DTV1 0x29 32 #define LTC3589_B3DTV2 0x2a 33 #define LTC3589_L2DTV1 0x32 34 #define LTC3589_L2DTV2 0x33 35 36 #define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3) 37 #define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4) 38 #define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5) 39 #define LTC3589_IRQSTAT_THERMAL_WARN BIT(6) 40 #define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7) 41 42 #define LTC3589_OVEN_SW1 BIT(0) 43 #define LTC3589_OVEN_SW2 BIT(1) 44 #define LTC3589_OVEN_SW3 BIT(2) 45 #define LTC3589_OVEN_BB_OUT BIT(3) 46 #define LTC3589_OVEN_LDO2 BIT(4) 47 #define LTC3589_OVEN_LDO3 BIT(5) 48 #define LTC3589_OVEN_LDO4 BIT(6) 49 #define LTC3589_OVEN_SW_CTRL BIT(7) 50 51 #define LTC3589_VCCR_SW1_GO BIT(0) 52 #define LTC3589_VCCR_SW2_GO BIT(2) 53 #define LTC3589_VCCR_SW3_GO BIT(4) 54 #define LTC3589_VCCR_LDO2_GO BIT(6) 55 56 #define LTC3589_VRRCR_SW1_RAMP_MASK GENMASK(1, 0) 57 #define LTC3589_VRRCR_SW2_RAMP_MASK GENMASK(3, 2) 58 #define LTC3589_VRRCR_SW3_RAMP_MASK GENMASK(5, 4) 59 #define LTC3589_VRRCR_LDO2_RAMP_MASK GENMASK(7, 6) 60 61 enum ltc3589_variant { 62 LTC3589, 63 LTC3589_1, 64 LTC3589_2, 65 }; 66 67 enum ltc3589_reg { 68 LTC3589_SW1, 69 LTC3589_SW2, 70 LTC3589_SW3, 71 LTC3589_BB_OUT, 72 LTC3589_LDO1, 73 LTC3589_LDO2, 74 LTC3589_LDO3, 75 LTC3589_LDO4, 76 LTC3589_NUM_REGULATORS, 77 }; 78 79 struct ltc3589 { 80 struct regmap *regmap; 81 struct device *dev; 82 enum ltc3589_variant variant; 83 struct regulator_desc regulator_descs[LTC3589_NUM_REGULATORS]; 84 struct regulator_dev *regulators[LTC3589_NUM_REGULATORS]; 85 }; 86 87 static const int ltc3589_ldo4[] = { 88 2800000, 2500000, 1800000, 3300000, 89 }; 90 91 static const int ltc3589_12_ldo4[] = { 92 1200000, 1800000, 2500000, 3200000, 93 }; 94 95 static const unsigned int ltc3589_ramp_table[] = { 96 880, 1750, 3500, 7000 97 }; 98 99 static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV) 100 { 101 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); 102 int sel; 103 104 sel = regulator_map_voltage_linear(rdev, uV, uV); 105 if (sel < 0) 106 return sel; 107 108 /* DTV2 register follows right after the corresponding DTV1 register */ 109 return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1, 110 rdev->desc->vsel_mask, sel); 111 } 112 113 static int ltc3589_set_suspend_mode(struct regulator_dev *rdev, 114 unsigned int mode) 115 { 116 struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); 117 int mask, bit = 0; 118 119 /* VCCR reference selects are right next to the VCCR go bits */ 120 mask = rdev->desc->apply_bit << 1; 121 122 if (mode == REGULATOR_MODE_STANDBY) 123 bit = mask; /* Select DTV2 */ 124 125 mask |= rdev->desc->apply_bit; 126 bit |= rdev->desc->apply_bit; 127 return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit); 128 } 129 130 /* SW1, SW2, SW3, LDO2 */ 131 static const struct regulator_ops ltc3589_linear_regulator_ops = { 132 .enable = regulator_enable_regmap, 133 .disable = regulator_disable_regmap, 134 .is_enabled = regulator_is_enabled_regmap, 135 .list_voltage = regulator_list_voltage_linear, 136 .set_voltage_sel = regulator_set_voltage_sel_regmap, 137 .get_voltage_sel = regulator_get_voltage_sel_regmap, 138 .set_ramp_delay = regulator_set_ramp_delay_regmap, 139 .set_voltage_time_sel = regulator_set_voltage_time_sel, 140 .set_suspend_voltage = ltc3589_set_suspend_voltage, 141 .set_suspend_mode = ltc3589_set_suspend_mode, 142 }; 143 144 /* BB_OUT, LDO3 */ 145 static const struct regulator_ops ltc3589_fixed_regulator_ops = { 146 .enable = regulator_enable_regmap, 147 .disable = regulator_disable_regmap, 148 .is_enabled = regulator_is_enabled_regmap, 149 }; 150 151 /* LDO1 */ 152 static const struct regulator_ops ltc3589_fixed_standby_regulator_ops = { 153 }; 154 155 /* LDO4 */ 156 static const struct regulator_ops ltc3589_table_regulator_ops = { 157 .enable = regulator_enable_regmap, 158 .disable = regulator_disable_regmap, 159 .is_enabled = regulator_is_enabled_regmap, 160 .list_voltage = regulator_list_voltage_table, 161 .set_voltage_sel = regulator_set_voltage_sel_regmap, 162 .get_voltage_sel = regulator_get_voltage_sel_regmap, 163 }; 164 165 static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2) 166 { 167 uint64_t tmp; 168 169 if (uV == 0) 170 return 0; 171 172 tmp = (uint64_t)uV * r1; 173 do_div(tmp, r2); 174 return uV + (unsigned int)tmp; 175 } 176 177 static int ltc3589_of_parse_cb(struct device_node *np, 178 const struct regulator_desc *desc, 179 struct regulator_config *config) 180 { 181 struct ltc3589 *ltc3589 = config->driver_data; 182 struct regulator_desc *rdesc = <c3589->regulator_descs[desc->id]; 183 u32 r[2]; 184 int ret; 185 186 /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */ 187 if (desc->id >= LTC3589_LDO3) 188 return 0; 189 190 ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", r, 2); 191 if (ret) { 192 dev_err(ltc3589->dev, "Failed to parse voltage divider: %d\n", 193 ret); 194 return ret; 195 } 196 197 if (!r[0] || !r[1]) 198 return 0; 199 200 rdesc->min_uV = ltc3589_scale(desc->min_uV, r[0], r[1]); 201 rdesc->uV_step = ltc3589_scale(desc->uV_step, r[0], r[1]); 202 rdesc->fixed_uV = ltc3589_scale(desc->fixed_uV, r[0], r[1]); 203 204 return 0; 205 } 206 207 #define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask) \ 208 [LTC3589_ ## _name] = { \ 209 .name = #_name, \ 210 .of_match = of_match_ptr(#_of_name), \ 211 .regulators_node = of_match_ptr("regulators"), \ 212 .of_parse_cb = ltc3589_of_parse_cb, \ 213 .n_voltages = (dtv_mask) + 1, \ 214 .fixed_uV = (dtv_mask) ? 0 : 800000, \ 215 .ops = <c3589_ ## _ops ## _regulator_ops, \ 216 .type = REGULATOR_VOLTAGE, \ 217 .id = LTC3589_ ## _name, \ 218 .owner = THIS_MODULE, \ 219 .vsel_reg = (dtv1_reg), \ 220 .vsel_mask = (dtv_mask), \ 221 .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \ 222 .enable_mask = (en_bit), \ 223 } 224 225 #define LTC3589_LINEAR_REG(_name, _of_name, _dtv1) \ 226 [LTC3589_ ## _name] = { \ 227 .name = #_name, \ 228 .of_match = of_match_ptr(#_of_name), \ 229 .regulators_node = of_match_ptr("regulators"), \ 230 .of_parse_cb = ltc3589_of_parse_cb, \ 231 .n_voltages = 32, \ 232 .min_uV = 362500, \ 233 .uV_step = 12500, \ 234 .ramp_delay = 1750, \ 235 .ops = <c3589_linear_regulator_ops, \ 236 .type = REGULATOR_VOLTAGE, \ 237 .id = LTC3589_ ## _name, \ 238 .owner = THIS_MODULE, \ 239 .vsel_reg = LTC3589_ ## _dtv1, \ 240 .vsel_mask = 0x1f, \ 241 .apply_reg = LTC3589_VCCR, \ 242 .apply_bit = LTC3589_VCCR_ ## _name ## _GO, \ 243 .enable_reg = LTC3589_OVEN, \ 244 .enable_mask = (LTC3589_OVEN_ ## _name), \ 245 .ramp_reg = LTC3589_VRRCR, \ 246 .ramp_mask = LTC3589_VRRCR_ ## _name ## _RAMP_MASK, \ 247 .ramp_delay_table = ltc3589_ramp_table, \ 248 .n_ramp_values = ARRAY_SIZE(ltc3589_ramp_table), \ 249 } 250 251 252 #define LTC3589_FIXED_REG(_name, _of_name) \ 253 LTC3589_REG(_name, _of_name, fixed, LTC3589_OVEN_ ## _name, 0, 0) 254 255 static const struct regulator_desc ltc3589_regulators[] = { 256 LTC3589_LINEAR_REG(SW1, sw1, B1DTV1), 257 LTC3589_LINEAR_REG(SW2, sw2, B2DTV1), 258 LTC3589_LINEAR_REG(SW3, sw3, B3DTV1), 259 LTC3589_FIXED_REG(BB_OUT, bb-out), 260 LTC3589_REG(LDO1, ldo1, fixed_standby, 0, 0, 0), 261 LTC3589_LINEAR_REG(LDO2, ldo2, L2DTV1), 262 LTC3589_FIXED_REG(LDO3, ldo3), 263 LTC3589_REG(LDO4, ldo4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60), 264 }; 265 266 static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg) 267 { 268 switch (reg) { 269 case LTC3589_IRQSTAT: 270 case LTC3589_SCR1: 271 case LTC3589_OVEN: 272 case LTC3589_SCR2: 273 case LTC3589_VCCR: 274 case LTC3589_CLIRQ: 275 case LTC3589_B1DTV1: 276 case LTC3589_B1DTV2: 277 case LTC3589_VRRCR: 278 case LTC3589_B2DTV1: 279 case LTC3589_B2DTV2: 280 case LTC3589_B3DTV1: 281 case LTC3589_B3DTV2: 282 case LTC3589_L2DTV1: 283 case LTC3589_L2DTV2: 284 return true; 285 } 286 return false; 287 } 288 289 static bool ltc3589_readable_reg(struct device *dev, unsigned int reg) 290 { 291 switch (reg) { 292 case LTC3589_IRQSTAT: 293 case LTC3589_SCR1: 294 case LTC3589_OVEN: 295 case LTC3589_SCR2: 296 case LTC3589_PGSTAT: 297 case LTC3589_VCCR: 298 case LTC3589_B1DTV1: 299 case LTC3589_B1DTV2: 300 case LTC3589_VRRCR: 301 case LTC3589_B2DTV1: 302 case LTC3589_B2DTV2: 303 case LTC3589_B3DTV1: 304 case LTC3589_B3DTV2: 305 case LTC3589_L2DTV1: 306 case LTC3589_L2DTV2: 307 return true; 308 } 309 return false; 310 } 311 312 static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg) 313 { 314 switch (reg) { 315 case LTC3589_IRQSTAT: 316 case LTC3589_PGSTAT: 317 case LTC3589_VCCR: 318 return true; 319 } 320 return false; 321 } 322 323 static const struct reg_default ltc3589_reg_defaults[] = { 324 { LTC3589_SCR1, 0x00 }, 325 { LTC3589_OVEN, 0x00 }, 326 { LTC3589_SCR2, 0x00 }, 327 { LTC3589_VCCR, 0x00 }, 328 { LTC3589_B1DTV1, 0x19 }, 329 { LTC3589_B1DTV2, 0x19 }, 330 { LTC3589_VRRCR, 0xff }, 331 { LTC3589_B2DTV1, 0x19 }, 332 { LTC3589_B2DTV2, 0x19 }, 333 { LTC3589_B3DTV1, 0x19 }, 334 { LTC3589_B3DTV2, 0x19 }, 335 { LTC3589_L2DTV1, 0x19 }, 336 { LTC3589_L2DTV2, 0x19 }, 337 }; 338 339 static const struct regmap_config ltc3589_regmap_config = { 340 .reg_bits = 8, 341 .val_bits = 8, 342 .writeable_reg = ltc3589_writeable_reg, 343 .readable_reg = ltc3589_readable_reg, 344 .volatile_reg = ltc3589_volatile_reg, 345 .max_register = LTC3589_L2DTV2, 346 .reg_defaults = ltc3589_reg_defaults, 347 .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults), 348 .use_single_read = true, 349 .use_single_write = true, 350 .cache_type = REGCACHE_MAPLE, 351 }; 352 353 static irqreturn_t ltc3589_isr(int irq, void *dev_id) 354 { 355 struct ltc3589 *ltc3589 = dev_id; 356 unsigned int i, irqstat, event; 357 358 regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat); 359 360 if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) { 361 event = REGULATOR_EVENT_OVER_TEMP; 362 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) 363 regulator_notifier_call_chain(ltc3589->regulators[i], 364 event, NULL); 365 } 366 367 if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) { 368 event = REGULATOR_EVENT_UNDER_VOLTAGE; 369 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) 370 regulator_notifier_call_chain(ltc3589->regulators[i], 371 event, NULL); 372 } 373 374 /* Clear warning condition */ 375 regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0); 376 377 return IRQ_HANDLED; 378 } 379 380 static int ltc3589_probe(struct i2c_client *client) 381 { 382 const struct i2c_device_id *id = i2c_client_get_device_id(client); 383 struct device *dev = &client->dev; 384 struct regulator_desc *descs; 385 struct ltc3589 *ltc3589; 386 int i, ret; 387 388 ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL); 389 if (!ltc3589) 390 return -ENOMEM; 391 392 i2c_set_clientdata(client, ltc3589); 393 if (client->dev.of_node) 394 ltc3589->variant = (uintptr_t)of_device_get_match_data(&client->dev); 395 else 396 ltc3589->variant = id->driver_data; 397 ltc3589->dev = dev; 398 399 descs = ltc3589->regulator_descs; 400 memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators)); 401 if (ltc3589->variant == LTC3589) { 402 descs[LTC3589_LDO3].fixed_uV = 1800000; 403 descs[LTC3589_LDO4].volt_table = ltc3589_ldo4; 404 } else { 405 descs[LTC3589_LDO3].fixed_uV = 2800000; 406 descs[LTC3589_LDO4].volt_table = ltc3589_12_ldo4; 407 } 408 409 ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config); 410 if (IS_ERR(ltc3589->regmap)) { 411 ret = PTR_ERR(ltc3589->regmap); 412 dev_err(dev, "failed to initialize regmap: %d\n", ret); 413 return ret; 414 } 415 416 for (i = 0; i < LTC3589_NUM_REGULATORS; i++) { 417 struct regulator_desc *desc = <c3589->regulator_descs[i]; 418 struct regulator_config config = { }; 419 420 config.dev = dev; 421 config.driver_data = ltc3589; 422 423 ltc3589->regulators[i] = devm_regulator_register(dev, desc, 424 &config); 425 if (IS_ERR(ltc3589->regulators[i])) { 426 ret = PTR_ERR(ltc3589->regulators[i]); 427 dev_err(dev, "failed to register regulator %s: %d\n", 428 desc->name, ret); 429 return ret; 430 } 431 } 432 433 if (client->irq) { 434 ret = devm_request_threaded_irq(dev, client->irq, NULL, 435 ltc3589_isr, 436 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 437 client->name, ltc3589); 438 if (ret) { 439 dev_err(dev, "Failed to request IRQ: %d\n", ret); 440 return ret; 441 } 442 } 443 444 return 0; 445 } 446 447 static const struct i2c_device_id ltc3589_i2c_id[] = { 448 { "ltc3589", LTC3589 }, 449 { "ltc3589-1", LTC3589_1 }, 450 { "ltc3589-2", LTC3589_2 }, 451 { } 452 }; 453 MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id); 454 455 static const struct of_device_id __maybe_unused ltc3589_of_match[] = { 456 { 457 .compatible = "lltc,ltc3589", 458 .data = (void *)LTC3589, 459 }, 460 { 461 .compatible = "lltc,ltc3589-1", 462 .data = (void *)LTC3589_1, 463 }, 464 { 465 .compatible = "lltc,ltc3589-2", 466 .data = (void *)LTC3589_2, 467 }, 468 { }, 469 }; 470 MODULE_DEVICE_TABLE(of, ltc3589_of_match); 471 472 static struct i2c_driver ltc3589_driver = { 473 .driver = { 474 .name = DRIVER_NAME, 475 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 476 .of_match_table = of_match_ptr(ltc3589_of_match), 477 }, 478 .probe = ltc3589_probe, 479 .id_table = ltc3589_i2c_id, 480 }; 481 module_i2c_driver(ltc3589_driver); 482 483 MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>"); 484 MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)"); 485 MODULE_LICENSE("GPL v2"); 486