1 /* 2 * TI LP8788 MFD - ldo regulator driver 3 * 4 * Copyright 2012 Texas Instruments 5 * 6 * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 */ 13 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 #include <linux/err.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/driver.h> 19 #include <linux/gpio.h> 20 #include <linux/mfd/lp8788.h> 21 22 /* register address */ 23 #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */ 24 #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */ 25 #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */ 26 #define LP8788_EN_SEL 0x10 27 #define LP8788_DLDO1_VOUT 0x2E 28 #define LP8788_DLDO2_VOUT 0x2F 29 #define LP8788_DLDO3_VOUT 0x30 30 #define LP8788_DLDO4_VOUT 0x31 31 #define LP8788_DLDO5_VOUT 0x32 32 #define LP8788_DLDO6_VOUT 0x33 33 #define LP8788_DLDO7_VOUT 0x34 34 #define LP8788_DLDO8_VOUT 0x35 35 #define LP8788_DLDO9_VOUT 0x36 36 #define LP8788_DLDO10_VOUT 0x37 37 #define LP8788_DLDO11_VOUT 0x38 38 #define LP8788_DLDO12_VOUT 0x39 39 #define LP8788_ALDO1_VOUT 0x3A 40 #define LP8788_ALDO2_VOUT 0x3B 41 #define LP8788_ALDO3_VOUT 0x3C 42 #define LP8788_ALDO4_VOUT 0x3D 43 #define LP8788_ALDO5_VOUT 0x3E 44 #define LP8788_ALDO6_VOUT 0x3F 45 #define LP8788_ALDO7_VOUT 0x40 46 #define LP8788_ALDO8_VOUT 0x41 47 #define LP8788_ALDO9_VOUT 0x42 48 #define LP8788_ALDO10_VOUT 0x43 49 #define LP8788_DLDO1_TIMESTEP 0x44 50 51 /* mask/shift bits */ 52 #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */ 53 #define LP8788_EN_DLDO2_M BIT(1) 54 #define LP8788_EN_DLDO3_M BIT(2) 55 #define LP8788_EN_DLDO4_M BIT(3) 56 #define LP8788_EN_DLDO5_M BIT(4) 57 #define LP8788_EN_DLDO6_M BIT(5) 58 #define LP8788_EN_DLDO7_M BIT(6) 59 #define LP8788_EN_DLDO8_M BIT(7) 60 #define LP8788_EN_DLDO9_M BIT(0) 61 #define LP8788_EN_DLDO10_M BIT(1) 62 #define LP8788_EN_DLDO11_M BIT(2) 63 #define LP8788_EN_DLDO12_M BIT(3) 64 #define LP8788_EN_ALDO1_M BIT(4) 65 #define LP8788_EN_ALDO2_M BIT(5) 66 #define LP8788_EN_ALDO3_M BIT(6) 67 #define LP8788_EN_ALDO4_M BIT(7) 68 #define LP8788_EN_ALDO5_M BIT(0) 69 #define LP8788_EN_ALDO6_M BIT(1) 70 #define LP8788_EN_ALDO7_M BIT(2) 71 #define LP8788_EN_ALDO8_M BIT(3) 72 #define LP8788_EN_ALDO9_M BIT(4) 73 #define LP8788_EN_ALDO10_M BIT(5) 74 #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */ 75 #define LP8788_EN_SEL_DLDO7_M BIT(1) 76 #define LP8788_EN_SEL_ALDO7_M BIT(2) 77 #define LP8788_EN_SEL_ALDO5_M BIT(3) 78 #define LP8788_EN_SEL_ALDO234_M BIT(4) 79 #define LP8788_EN_SEL_ALDO1_M BIT(5) 80 #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */ 81 #define LP8788_VOUT_4BIT_M 0x0F 82 #define LP8788_VOUT_3BIT_M 0x07 83 #define LP8788_VOUT_1BIT_M 0x01 84 #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */ 85 #define LP8788_STARTUP_TIME_S 3 86 87 #define ENABLE_TIME_USEC 32 88 #define ENABLE GPIOF_OUT_INIT_HIGH 89 #define DISABLE GPIOF_OUT_INIT_LOW 90 91 enum lp8788_ldo_id { 92 DLDO1, 93 DLDO2, 94 DLDO3, 95 DLDO4, 96 DLDO5, 97 DLDO6, 98 DLDO7, 99 DLDO8, 100 DLDO9, 101 DLDO10, 102 DLDO11, 103 DLDO12, 104 ALDO1, 105 ALDO2, 106 ALDO3, 107 ALDO4, 108 ALDO5, 109 ALDO6, 110 ALDO7, 111 ALDO8, 112 ALDO9, 113 ALDO10, 114 }; 115 116 struct lp8788_ldo { 117 struct lp8788 *lp; 118 struct regulator_desc *desc; 119 struct regulator_dev *regulator; 120 struct lp8788_ldo_enable_pin *en_pin; 121 }; 122 123 /* DLDO 1, 2, 3, 9 voltage table */ 124 static const int lp8788_dldo1239_vtbl[] = { 125 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 126 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000, 127 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 128 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 129 }; 130 131 /* DLDO 4 voltage table */ 132 static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 }; 133 134 /* DLDO 5, 7, 8 and ALDO 6 voltage table */ 135 static const int lp8788_dldo578_aldo6_vtbl[] = { 136 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 137 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000, 138 }; 139 140 /* DLDO 6 voltage table */ 141 static const int lp8788_dldo6_vtbl[] = { 142 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000, 143 }; 144 145 /* DLDO 10, 11 voltage table */ 146 static const int lp8788_dldo1011_vtbl[] = { 147 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 148 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 149 }; 150 151 /* ALDO 1 voltage table */ 152 static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 }; 153 154 /* ALDO 7 voltage table */ 155 static const int lp8788_aldo7_vtbl[] = { 156 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, 157 }; 158 159 static enum lp8788_ldo_id lp8788_dldo_id[] = { 160 DLDO1, 161 DLDO2, 162 DLDO3, 163 DLDO4, 164 DLDO5, 165 DLDO6, 166 DLDO7, 167 DLDO8, 168 DLDO9, 169 DLDO10, 170 DLDO11, 171 DLDO12, 172 }; 173 174 static enum lp8788_ldo_id lp8788_aldo_id[] = { 175 ALDO1, 176 ALDO2, 177 ALDO3, 178 ALDO4, 179 ALDO5, 180 ALDO6, 181 ALDO7, 182 ALDO8, 183 ALDO9, 184 ALDO10, 185 }; 186 187 static int lp8788_ldo_enable_time(struct regulator_dev *rdev) 188 { 189 struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 190 enum lp8788_ldo_id id = rdev_get_id(rdev); 191 u8 val, addr = LP8788_DLDO1_TIMESTEP + id; 192 193 if (lp8788_read_byte(ldo->lp, addr, &val)) 194 return -EINVAL; 195 196 val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; 197 198 return ENABLE_TIME_USEC * val; 199 } 200 201 static int lp8788_ldo_fixed_get_voltage(struct regulator_dev *rdev) 202 { 203 enum lp8788_ldo_id id = rdev_get_id(rdev); 204 205 switch (id) { 206 case ALDO2 ... ALDO5: 207 return 2850000; 208 case DLDO12: 209 case ALDO8 ... ALDO9: 210 return 2500000; 211 case ALDO10: 212 return 1100000; 213 default: 214 return -EINVAL; 215 } 216 } 217 218 static struct regulator_ops lp8788_ldo_voltage_table_ops = { 219 .list_voltage = regulator_list_voltage_table, 220 .set_voltage_sel = regulator_set_voltage_sel_regmap, 221 .get_voltage_sel = regulator_get_voltage_sel_regmap, 222 .enable = regulator_enable_regmap, 223 .disable = regulator_disable_regmap, 224 .is_enabled = regulator_is_enabled_regmap, 225 .enable_time = lp8788_ldo_enable_time, 226 }; 227 228 static struct regulator_ops lp8788_ldo_voltage_fixed_ops = { 229 .get_voltage = lp8788_ldo_fixed_get_voltage, 230 .enable = regulator_enable_regmap, 231 .disable = regulator_disable_regmap, 232 .is_enabled = regulator_is_enabled_regmap, 233 .enable_time = lp8788_ldo_enable_time, 234 }; 235 236 static struct regulator_desc lp8788_dldo_desc[] = { 237 { 238 .name = "dldo1", 239 .id = DLDO1, 240 .ops = &lp8788_ldo_voltage_table_ops, 241 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 242 .volt_table = lp8788_dldo1239_vtbl, 243 .type = REGULATOR_VOLTAGE, 244 .owner = THIS_MODULE, 245 .vsel_reg = LP8788_DLDO1_VOUT, 246 .vsel_mask = LP8788_VOUT_5BIT_M, 247 .enable_reg = LP8788_EN_LDO_A, 248 .enable_mask = LP8788_EN_DLDO1_M, 249 }, 250 { 251 .name = "dldo2", 252 .id = DLDO2, 253 .ops = &lp8788_ldo_voltage_table_ops, 254 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 255 .volt_table = lp8788_dldo1239_vtbl, 256 .type = REGULATOR_VOLTAGE, 257 .owner = THIS_MODULE, 258 .vsel_reg = LP8788_DLDO2_VOUT, 259 .vsel_mask = LP8788_VOUT_5BIT_M, 260 .enable_reg = LP8788_EN_LDO_A, 261 .enable_mask = LP8788_EN_DLDO2_M, 262 }, 263 { 264 .name = "dldo3", 265 .id = DLDO3, 266 .ops = &lp8788_ldo_voltage_table_ops, 267 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 268 .volt_table = lp8788_dldo1239_vtbl, 269 .type = REGULATOR_VOLTAGE, 270 .owner = THIS_MODULE, 271 .vsel_reg = LP8788_DLDO3_VOUT, 272 .vsel_mask = LP8788_VOUT_5BIT_M, 273 .enable_reg = LP8788_EN_LDO_A, 274 .enable_mask = LP8788_EN_DLDO3_M, 275 }, 276 { 277 .name = "dldo4", 278 .id = DLDO4, 279 .ops = &lp8788_ldo_voltage_table_ops, 280 .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl), 281 .volt_table = lp8788_dldo4_vtbl, 282 .type = REGULATOR_VOLTAGE, 283 .owner = THIS_MODULE, 284 .vsel_reg = LP8788_DLDO4_VOUT, 285 .vsel_mask = LP8788_VOUT_1BIT_M, 286 .enable_reg = LP8788_EN_LDO_A, 287 .enable_mask = LP8788_EN_DLDO4_M, 288 }, 289 { 290 .name = "dldo5", 291 .id = DLDO5, 292 .ops = &lp8788_ldo_voltage_table_ops, 293 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 294 .volt_table = lp8788_dldo578_aldo6_vtbl, 295 .type = REGULATOR_VOLTAGE, 296 .owner = THIS_MODULE, 297 .vsel_reg = LP8788_DLDO5_VOUT, 298 .vsel_mask = LP8788_VOUT_4BIT_M, 299 .enable_reg = LP8788_EN_LDO_A, 300 .enable_mask = LP8788_EN_DLDO5_M, 301 }, 302 { 303 .name = "dldo6", 304 .id = DLDO6, 305 .ops = &lp8788_ldo_voltage_table_ops, 306 .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl), 307 .volt_table = lp8788_dldo6_vtbl, 308 .type = REGULATOR_VOLTAGE, 309 .owner = THIS_MODULE, 310 .vsel_reg = LP8788_DLDO6_VOUT, 311 .vsel_mask = LP8788_VOUT_3BIT_M, 312 .enable_reg = LP8788_EN_LDO_A, 313 .enable_mask = LP8788_EN_DLDO6_M, 314 }, 315 { 316 .name = "dldo7", 317 .id = DLDO7, 318 .ops = &lp8788_ldo_voltage_table_ops, 319 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 320 .volt_table = lp8788_dldo578_aldo6_vtbl, 321 .type = REGULATOR_VOLTAGE, 322 .owner = THIS_MODULE, 323 .vsel_reg = LP8788_DLDO7_VOUT, 324 .vsel_mask = LP8788_VOUT_4BIT_M, 325 .enable_reg = LP8788_EN_LDO_A, 326 .enable_mask = LP8788_EN_DLDO7_M, 327 }, 328 { 329 .name = "dldo8", 330 .id = DLDO8, 331 .ops = &lp8788_ldo_voltage_table_ops, 332 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 333 .volt_table = lp8788_dldo578_aldo6_vtbl, 334 .type = REGULATOR_VOLTAGE, 335 .owner = THIS_MODULE, 336 .vsel_reg = LP8788_DLDO8_VOUT, 337 .vsel_mask = LP8788_VOUT_4BIT_M, 338 .enable_reg = LP8788_EN_LDO_A, 339 .enable_mask = LP8788_EN_DLDO8_M, 340 }, 341 { 342 .name = "dldo9", 343 .id = DLDO9, 344 .ops = &lp8788_ldo_voltage_table_ops, 345 .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 346 .volt_table = lp8788_dldo1239_vtbl, 347 .type = REGULATOR_VOLTAGE, 348 .owner = THIS_MODULE, 349 .vsel_reg = LP8788_DLDO9_VOUT, 350 .vsel_mask = LP8788_VOUT_5BIT_M, 351 .enable_reg = LP8788_EN_LDO_B, 352 .enable_mask = LP8788_EN_DLDO9_M, 353 }, 354 { 355 .name = "dldo10", 356 .id = DLDO10, 357 .ops = &lp8788_ldo_voltage_table_ops, 358 .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 359 .volt_table = lp8788_dldo1011_vtbl, 360 .type = REGULATOR_VOLTAGE, 361 .owner = THIS_MODULE, 362 .vsel_reg = LP8788_DLDO10_VOUT, 363 .vsel_mask = LP8788_VOUT_4BIT_M, 364 .enable_reg = LP8788_EN_LDO_B, 365 .enable_mask = LP8788_EN_DLDO10_M, 366 }, 367 { 368 .name = "dldo11", 369 .id = DLDO11, 370 .ops = &lp8788_ldo_voltage_table_ops, 371 .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 372 .volt_table = lp8788_dldo1011_vtbl, 373 .type = REGULATOR_VOLTAGE, 374 .owner = THIS_MODULE, 375 .vsel_reg = LP8788_DLDO11_VOUT, 376 .vsel_mask = LP8788_VOUT_4BIT_M, 377 .enable_reg = LP8788_EN_LDO_B, 378 .enable_mask = LP8788_EN_DLDO11_M, 379 }, 380 { 381 .name = "dldo12", 382 .id = DLDO12, 383 .ops = &lp8788_ldo_voltage_fixed_ops, 384 .n_voltages = 1, 385 .type = REGULATOR_VOLTAGE, 386 .owner = THIS_MODULE, 387 .enable_reg = LP8788_EN_LDO_B, 388 .enable_mask = LP8788_EN_DLDO12_M, 389 }, 390 }; 391 392 static struct regulator_desc lp8788_aldo_desc[] = { 393 { 394 .name = "aldo1", 395 .id = ALDO1, 396 .ops = &lp8788_ldo_voltage_table_ops, 397 .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl), 398 .volt_table = lp8788_aldo1_vtbl, 399 .type = REGULATOR_VOLTAGE, 400 .owner = THIS_MODULE, 401 .vsel_reg = LP8788_ALDO1_VOUT, 402 .vsel_mask = LP8788_VOUT_1BIT_M, 403 .enable_reg = LP8788_EN_LDO_B, 404 .enable_mask = LP8788_EN_ALDO1_M, 405 }, 406 { 407 .name = "aldo2", 408 .id = ALDO2, 409 .ops = &lp8788_ldo_voltage_fixed_ops, 410 .n_voltages = 1, 411 .type = REGULATOR_VOLTAGE, 412 .owner = THIS_MODULE, 413 .enable_reg = LP8788_EN_LDO_B, 414 .enable_mask = LP8788_EN_ALDO2_M, 415 }, 416 { 417 .name = "aldo3", 418 .id = ALDO3, 419 .ops = &lp8788_ldo_voltage_fixed_ops, 420 .n_voltages = 1, 421 .type = REGULATOR_VOLTAGE, 422 .owner = THIS_MODULE, 423 .enable_reg = LP8788_EN_LDO_B, 424 .enable_mask = LP8788_EN_ALDO3_M, 425 }, 426 { 427 .name = "aldo4", 428 .id = ALDO4, 429 .ops = &lp8788_ldo_voltage_fixed_ops, 430 .n_voltages = 1, 431 .type = REGULATOR_VOLTAGE, 432 .owner = THIS_MODULE, 433 .enable_reg = LP8788_EN_LDO_B, 434 .enable_mask = LP8788_EN_ALDO4_M, 435 }, 436 { 437 .name = "aldo5", 438 .id = ALDO5, 439 .ops = &lp8788_ldo_voltage_fixed_ops, 440 .n_voltages = 1, 441 .type = REGULATOR_VOLTAGE, 442 .owner = THIS_MODULE, 443 .enable_reg = LP8788_EN_LDO_C, 444 .enable_mask = LP8788_EN_ALDO5_M, 445 }, 446 { 447 .name = "aldo6", 448 .id = ALDO6, 449 .ops = &lp8788_ldo_voltage_table_ops, 450 .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 451 .volt_table = lp8788_dldo578_aldo6_vtbl, 452 .type = REGULATOR_VOLTAGE, 453 .owner = THIS_MODULE, 454 .vsel_reg = LP8788_ALDO6_VOUT, 455 .vsel_mask = LP8788_VOUT_4BIT_M, 456 .enable_reg = LP8788_EN_LDO_C, 457 .enable_mask = LP8788_EN_ALDO6_M, 458 }, 459 { 460 .name = "aldo7", 461 .id = ALDO7, 462 .ops = &lp8788_ldo_voltage_table_ops, 463 .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl), 464 .volt_table = lp8788_aldo7_vtbl, 465 .type = REGULATOR_VOLTAGE, 466 .owner = THIS_MODULE, 467 .vsel_reg = LP8788_ALDO7_VOUT, 468 .vsel_mask = LP8788_VOUT_3BIT_M, 469 .enable_reg = LP8788_EN_LDO_C, 470 .enable_mask = LP8788_EN_ALDO7_M, 471 }, 472 { 473 .name = "aldo8", 474 .id = ALDO8, 475 .ops = &lp8788_ldo_voltage_fixed_ops, 476 .n_voltages = 1, 477 .type = REGULATOR_VOLTAGE, 478 .owner = THIS_MODULE, 479 .enable_reg = LP8788_EN_LDO_C, 480 .enable_mask = LP8788_EN_ALDO8_M, 481 }, 482 { 483 .name = "aldo9", 484 .id = ALDO9, 485 .ops = &lp8788_ldo_voltage_fixed_ops, 486 .n_voltages = 1, 487 .type = REGULATOR_VOLTAGE, 488 .owner = THIS_MODULE, 489 .enable_reg = LP8788_EN_LDO_C, 490 .enable_mask = LP8788_EN_ALDO9_M, 491 }, 492 { 493 .name = "aldo10", 494 .id = ALDO10, 495 .ops = &lp8788_ldo_voltage_fixed_ops, 496 .n_voltages = 1, 497 .type = REGULATOR_VOLTAGE, 498 .owner = THIS_MODULE, 499 .enable_reg = LP8788_EN_LDO_C, 500 .enable_mask = LP8788_EN_ALDO10_M, 501 }, 502 }; 503 504 static int lp8788_config_ldo_enable_mode(struct platform_device *pdev, 505 struct lp8788_ldo *ldo, 506 enum lp8788_ldo_id id) 507 { 508 struct lp8788 *lp = ldo->lp; 509 struct lp8788_platform_data *pdata = lp->pdata; 510 enum lp8788_ext_ldo_en_id enable_id; 511 u8 en_mask[] = { 512 [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M, 513 [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M, 514 [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M, 515 [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M, 516 [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M, 517 [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M, 518 }; 519 520 switch (id) { 521 case DLDO7: 522 enable_id = EN_DLDO7; 523 break; 524 case DLDO9: 525 case DLDO11: 526 enable_id = EN_DLDO911; 527 break; 528 case ALDO1: 529 enable_id = EN_ALDO1; 530 break; 531 case ALDO2 ... ALDO4: 532 enable_id = EN_ALDO234; 533 break; 534 case ALDO5: 535 enable_id = EN_ALDO5; 536 break; 537 case ALDO7: 538 enable_id = EN_ALDO7; 539 break; 540 default: 541 return 0; 542 } 543 544 /* if no platform data for ldo pin, then set default enable mode */ 545 if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id]) 546 goto set_default_ldo_enable_mode; 547 548 ldo->en_pin = pdata->ldo_pin[enable_id]; 549 return 0; 550 551 set_default_ldo_enable_mode: 552 return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0); 553 } 554 555 static int lp8788_dldo_probe(struct platform_device *pdev) 556 { 557 struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 558 int id = pdev->id; 559 struct lp8788_ldo *ldo; 560 struct regulator_config cfg = { }; 561 struct regulator_dev *rdev; 562 int ret; 563 564 ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 565 if (!ldo) 566 return -ENOMEM; 567 568 ldo->lp = lp; 569 ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_dldo_id[id]); 570 if (ret) 571 return ret; 572 573 if (ldo->en_pin) { 574 cfg.ena_gpio = ldo->en_pin->gpio; 575 cfg.ena_gpio_flags = ldo->en_pin->init_state; 576 } 577 578 cfg.dev = pdev->dev.parent; 579 cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; 580 cfg.driver_data = ldo; 581 cfg.regmap = lp->regmap; 582 583 rdev = regulator_register(&lp8788_dldo_desc[id], &cfg); 584 if (IS_ERR(rdev)) { 585 ret = PTR_ERR(rdev); 586 dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n", 587 id + 1, ret); 588 return ret; 589 } 590 591 ldo->regulator = rdev; 592 platform_set_drvdata(pdev, ldo); 593 594 return 0; 595 } 596 597 static int lp8788_dldo_remove(struct platform_device *pdev) 598 { 599 struct lp8788_ldo *ldo = platform_get_drvdata(pdev); 600 601 platform_set_drvdata(pdev, NULL); 602 regulator_unregister(ldo->regulator); 603 604 return 0; 605 } 606 607 static struct platform_driver lp8788_dldo_driver = { 608 .probe = lp8788_dldo_probe, 609 .remove = lp8788_dldo_remove, 610 .driver = { 611 .name = LP8788_DEV_DLDO, 612 .owner = THIS_MODULE, 613 }, 614 }; 615 616 static int lp8788_aldo_probe(struct platform_device *pdev) 617 { 618 struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 619 int id = pdev->id; 620 struct lp8788_ldo *ldo; 621 struct regulator_config cfg = { }; 622 struct regulator_dev *rdev; 623 int ret; 624 625 ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 626 if (!ldo) 627 return -ENOMEM; 628 629 ldo->lp = lp; 630 ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_aldo_id[id]); 631 if (ret) 632 return ret; 633 634 if (ldo->en_pin) { 635 cfg.ena_gpio = ldo->en_pin->gpio; 636 cfg.ena_gpio_flags = ldo->en_pin->init_state; 637 } 638 639 cfg.dev = pdev->dev.parent; 640 cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; 641 cfg.driver_data = ldo; 642 cfg.regmap = lp->regmap; 643 644 rdev = regulator_register(&lp8788_aldo_desc[id], &cfg); 645 if (IS_ERR(rdev)) { 646 ret = PTR_ERR(rdev); 647 dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n", 648 id + 1, ret); 649 return ret; 650 } 651 652 ldo->regulator = rdev; 653 platform_set_drvdata(pdev, ldo); 654 655 return 0; 656 } 657 658 static int lp8788_aldo_remove(struct platform_device *pdev) 659 { 660 struct lp8788_ldo *ldo = platform_get_drvdata(pdev); 661 662 platform_set_drvdata(pdev, NULL); 663 regulator_unregister(ldo->regulator); 664 665 return 0; 666 } 667 668 static struct platform_driver lp8788_aldo_driver = { 669 .probe = lp8788_aldo_probe, 670 .remove = lp8788_aldo_remove, 671 .driver = { 672 .name = LP8788_DEV_ALDO, 673 .owner = THIS_MODULE, 674 }, 675 }; 676 677 static int __init lp8788_ldo_init(void) 678 { 679 int ret; 680 681 ret = platform_driver_register(&lp8788_dldo_driver); 682 if (ret) 683 return ret; 684 685 return platform_driver_register(&lp8788_aldo_driver); 686 } 687 subsys_initcall(lp8788_ldo_init); 688 689 static void __exit lp8788_ldo_exit(void) 690 { 691 platform_driver_unregister(&lp8788_aldo_driver); 692 platform_driver_unregister(&lp8788_dldo_driver); 693 } 694 module_exit(lp8788_ldo_exit); 695 696 MODULE_DESCRIPTION("TI LP8788 LDO Driver"); 697 MODULE_AUTHOR("Milo Kim"); 698 MODULE_LICENSE("GPL"); 699 MODULE_ALIAS("platform:lp8788-dldo"); 700 MODULE_ALIAS("platform:lp8788-aldo"); 701