1ade7515fSKim, Milo /* 2ade7515fSKim, Milo * TI LP8788 MFD - ldo regulator driver 3ade7515fSKim, Milo * 4ade7515fSKim, Milo * Copyright 2012 Texas Instruments 5ade7515fSKim, Milo * 6ade7515fSKim, Milo * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7ade7515fSKim, Milo * 8ade7515fSKim, Milo * This program is free software; you can redistribute it and/or modify 9ade7515fSKim, Milo * it under the terms of the GNU General Public License version 2 as 10ade7515fSKim, Milo * published by the Free Software Foundation. 11ade7515fSKim, Milo * 12ade7515fSKim, Milo */ 13ade7515fSKim, Milo 14ade7515fSKim, Milo #include <linux/module.h> 15ade7515fSKim, Milo #include <linux/slab.h> 16ade7515fSKim, Milo #include <linux/err.h> 17ade7515fSKim, Milo #include <linux/platform_device.h> 18ade7515fSKim, Milo #include <linux/regulator/driver.h> 19ade7515fSKim, Milo #include <linux/gpio.h> 20ade7515fSKim, Milo #include <linux/mfd/lp8788.h> 21ade7515fSKim, Milo 22ade7515fSKim, Milo /* register address */ 23ade7515fSKim, Milo #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */ 24ade7515fSKim, Milo #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */ 25ade7515fSKim, Milo #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */ 26ade7515fSKim, Milo #define LP8788_EN_SEL 0x10 27ade7515fSKim, Milo #define LP8788_DLDO1_VOUT 0x2E 28ade7515fSKim, Milo #define LP8788_DLDO2_VOUT 0x2F 29ade7515fSKim, Milo #define LP8788_DLDO3_VOUT 0x30 30ade7515fSKim, Milo #define LP8788_DLDO4_VOUT 0x31 31ade7515fSKim, Milo #define LP8788_DLDO5_VOUT 0x32 32ade7515fSKim, Milo #define LP8788_DLDO6_VOUT 0x33 33ade7515fSKim, Milo #define LP8788_DLDO7_VOUT 0x34 34ade7515fSKim, Milo #define LP8788_DLDO8_VOUT 0x35 35ade7515fSKim, Milo #define LP8788_DLDO9_VOUT 0x36 36ade7515fSKim, Milo #define LP8788_DLDO10_VOUT 0x37 37ade7515fSKim, Milo #define LP8788_DLDO11_VOUT 0x38 38ade7515fSKim, Milo #define LP8788_DLDO12_VOUT 0x39 39ade7515fSKim, Milo #define LP8788_ALDO1_VOUT 0x3A 40ade7515fSKim, Milo #define LP8788_ALDO2_VOUT 0x3B 41ade7515fSKim, Milo #define LP8788_ALDO3_VOUT 0x3C 42ade7515fSKim, Milo #define LP8788_ALDO4_VOUT 0x3D 43ade7515fSKim, Milo #define LP8788_ALDO5_VOUT 0x3E 44ade7515fSKim, Milo #define LP8788_ALDO6_VOUT 0x3F 45ade7515fSKim, Milo #define LP8788_ALDO7_VOUT 0x40 46ade7515fSKim, Milo #define LP8788_ALDO8_VOUT 0x41 47ade7515fSKim, Milo #define LP8788_ALDO9_VOUT 0x42 48ade7515fSKim, Milo #define LP8788_ALDO10_VOUT 0x43 49ade7515fSKim, Milo #define LP8788_DLDO1_TIMESTEP 0x44 50ade7515fSKim, Milo 51ade7515fSKim, Milo /* mask/shift bits */ 52ade7515fSKim, Milo #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */ 53ade7515fSKim, Milo #define LP8788_EN_DLDO2_M BIT(1) 54ade7515fSKim, Milo #define LP8788_EN_DLDO3_M BIT(2) 55ade7515fSKim, Milo #define LP8788_EN_DLDO4_M BIT(3) 56ade7515fSKim, Milo #define LP8788_EN_DLDO5_M BIT(4) 57ade7515fSKim, Milo #define LP8788_EN_DLDO6_M BIT(5) 58ade7515fSKim, Milo #define LP8788_EN_DLDO7_M BIT(6) 59ade7515fSKim, Milo #define LP8788_EN_DLDO8_M BIT(7) 60ade7515fSKim, Milo #define LP8788_EN_DLDO9_M BIT(0) 61ade7515fSKim, Milo #define LP8788_EN_DLDO10_M BIT(1) 62ade7515fSKim, Milo #define LP8788_EN_DLDO11_M BIT(2) 63ade7515fSKim, Milo #define LP8788_EN_DLDO12_M BIT(3) 64ade7515fSKim, Milo #define LP8788_EN_ALDO1_M BIT(4) 65ade7515fSKim, Milo #define LP8788_EN_ALDO2_M BIT(5) 66ade7515fSKim, Milo #define LP8788_EN_ALDO3_M BIT(6) 67ade7515fSKim, Milo #define LP8788_EN_ALDO4_M BIT(7) 68ade7515fSKim, Milo #define LP8788_EN_ALDO5_M BIT(0) 69ade7515fSKim, Milo #define LP8788_EN_ALDO6_M BIT(1) 70ade7515fSKim, Milo #define LP8788_EN_ALDO7_M BIT(2) 71ade7515fSKim, Milo #define LP8788_EN_ALDO8_M BIT(3) 72ade7515fSKim, Milo #define LP8788_EN_ALDO9_M BIT(4) 73ade7515fSKim, Milo #define LP8788_EN_ALDO10_M BIT(5) 74ade7515fSKim, Milo #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */ 75ade7515fSKim, Milo #define LP8788_EN_SEL_DLDO7_M BIT(1) 76ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO7_M BIT(2) 77ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO5_M BIT(3) 78ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO234_M BIT(4) 79ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO1_M BIT(5) 80ade7515fSKim, Milo #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */ 81ade7515fSKim, Milo #define LP8788_VOUT_4BIT_M 0x0F 82ade7515fSKim, Milo #define LP8788_VOUT_3BIT_M 0x07 83ade7515fSKim, Milo #define LP8788_VOUT_1BIT_M 0x01 84ade7515fSKim, Milo #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */ 85ade7515fSKim, Milo #define LP8788_STARTUP_TIME_S 3 86ade7515fSKim, Milo 87ade7515fSKim, Milo #define ENABLE_TIME_USEC 32 88ade7515fSKim, Milo #define ENABLE GPIOF_OUT_INIT_HIGH 89ade7515fSKim, Milo #define DISABLE GPIOF_OUT_INIT_LOW 90ade7515fSKim, Milo 91ade7515fSKim, Milo enum lp8788_enable_mode { 92ade7515fSKim, Milo REGISTER, 93ade7515fSKim, Milo EXTPIN, 94ade7515fSKim, Milo }; 95ade7515fSKim, Milo 96ade7515fSKim, Milo enum lp8788_ldo_id { 97ade7515fSKim, Milo DLDO1, 98ade7515fSKim, Milo DLDO2, 99ade7515fSKim, Milo DLDO3, 100ade7515fSKim, Milo DLDO4, 101ade7515fSKim, Milo DLDO5, 102ade7515fSKim, Milo DLDO6, 103ade7515fSKim, Milo DLDO7, 104ade7515fSKim, Milo DLDO8, 105ade7515fSKim, Milo DLDO9, 106ade7515fSKim, Milo DLDO10, 107ade7515fSKim, Milo DLDO11, 108ade7515fSKim, Milo DLDO12, 109ade7515fSKim, Milo ALDO1, 110ade7515fSKim, Milo ALDO2, 111ade7515fSKim, Milo ALDO3, 112ade7515fSKim, Milo ALDO4, 113ade7515fSKim, Milo ALDO5, 114ade7515fSKim, Milo ALDO6, 115ade7515fSKim, Milo ALDO7, 116ade7515fSKim, Milo ALDO8, 117ade7515fSKim, Milo ALDO9, 118ade7515fSKim, Milo ALDO10, 119ade7515fSKim, Milo }; 120ade7515fSKim, Milo 121ade7515fSKim, Milo struct lp8788_ldo { 122ade7515fSKim, Milo struct lp8788 *lp; 123ade7515fSKim, Milo struct regulator_desc *desc; 124ade7515fSKim, Milo struct regulator_dev *regulator; 125ade7515fSKim, Milo struct lp8788_ldo_enable_pin *en_pin; 126ade7515fSKim, Milo }; 127ade7515fSKim, Milo 128ade7515fSKim, Milo /* DLDO 1, 2, 3, 9 voltage table */ 1294e92920bSMark Brown static const int lp8788_dldo1239_vtbl[] = { 130ade7515fSKim, Milo 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 131ade7515fSKim, Milo 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000, 132ade7515fSKim, Milo 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 133ade7515fSKim, Milo 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 134ade7515fSKim, Milo }; 135ade7515fSKim, Milo 136ade7515fSKim, Milo /* DLDO 4 voltage table */ 137ade7515fSKim, Milo static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 }; 138ade7515fSKim, Milo 139ade7515fSKim, Milo /* DLDO 5, 7, 8 and ALDO 6 voltage table */ 140ade7515fSKim, Milo static const int lp8788_dldo578_aldo6_vtbl[] = { 141ade7515fSKim, Milo 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 142ade7515fSKim, Milo 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000, 143ade7515fSKim, Milo }; 144ade7515fSKim, Milo 145ade7515fSKim, Milo /* DLDO 6 voltage table */ 146ade7515fSKim, Milo static const int lp8788_dldo6_vtbl[] = { 147ade7515fSKim, Milo 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000, 148ade7515fSKim, Milo }; 149ade7515fSKim, Milo 150ade7515fSKim, Milo /* DLDO 10, 11 voltage table */ 151ade7515fSKim, Milo static const int lp8788_dldo1011_vtbl[] = { 152ade7515fSKim, Milo 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 153ade7515fSKim, Milo 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 154ade7515fSKim, Milo }; 155ade7515fSKim, Milo 156ade7515fSKim, Milo /* ALDO 1 voltage table */ 157ade7515fSKim, Milo static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 }; 158ade7515fSKim, Milo 159ade7515fSKim, Milo /* ALDO 7 voltage table */ 160ade7515fSKim, Milo static const int lp8788_aldo7_vtbl[] = { 161ade7515fSKim, Milo 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, 162ade7515fSKim, Milo }; 163ade7515fSKim, Milo 164ade7515fSKim, Milo static enum lp8788_ldo_id lp8788_dldo_id[] = { 165ade7515fSKim, Milo DLDO1, 166ade7515fSKim, Milo DLDO2, 167ade7515fSKim, Milo DLDO3, 168ade7515fSKim, Milo DLDO4, 169ade7515fSKim, Milo DLDO5, 170ade7515fSKim, Milo DLDO6, 171ade7515fSKim, Milo DLDO7, 172ade7515fSKim, Milo DLDO8, 173ade7515fSKim, Milo DLDO9, 174ade7515fSKim, Milo DLDO10, 175ade7515fSKim, Milo DLDO11, 176ade7515fSKim, Milo DLDO12, 177ade7515fSKim, Milo }; 178ade7515fSKim, Milo 179ade7515fSKim, Milo static enum lp8788_ldo_id lp8788_aldo_id[] = { 180ade7515fSKim, Milo ALDO1, 181ade7515fSKim, Milo ALDO2, 182ade7515fSKim, Milo ALDO3, 183ade7515fSKim, Milo ALDO4, 184ade7515fSKim, Milo ALDO5, 185ade7515fSKim, Milo ALDO6, 186ade7515fSKim, Milo ALDO7, 187ade7515fSKim, Milo ALDO8, 188ade7515fSKim, Milo ALDO9, 189ade7515fSKim, Milo ALDO10, 190ade7515fSKim, Milo }; 191ade7515fSKim, Milo 192ade7515fSKim, Milo /* DLDO 7, 9 and 11, ALDO 1 ~ 5 and 7 193ade7515fSKim, Milo : can be enabled either by external pin or by i2c register */ 194ade7515fSKim, Milo static enum lp8788_enable_mode 195ade7515fSKim, Milo lp8788_get_ldo_enable_mode(struct lp8788_ldo *ldo, enum lp8788_ldo_id id) 196ade7515fSKim, Milo { 197ade7515fSKim, Milo int ret; 198ade7515fSKim, Milo u8 val, mask; 199ade7515fSKim, Milo 200ade7515fSKim, Milo ret = lp8788_read_byte(ldo->lp, LP8788_EN_SEL, &val); 201ade7515fSKim, Milo if (ret) 202ade7515fSKim, Milo return ret; 203ade7515fSKim, Milo 204ade7515fSKim, Milo switch (id) { 205ade7515fSKim, Milo case DLDO7: 206ade7515fSKim, Milo mask = LP8788_EN_SEL_DLDO7_M; 207ade7515fSKim, Milo break; 208ade7515fSKim, Milo case DLDO9: 209ade7515fSKim, Milo case DLDO11: 210ade7515fSKim, Milo mask = LP8788_EN_SEL_DLDO911_M; 211ade7515fSKim, Milo break; 212ade7515fSKim, Milo case ALDO1: 213ade7515fSKim, Milo mask = LP8788_EN_SEL_ALDO1_M; 214ade7515fSKim, Milo break; 215ade7515fSKim, Milo case ALDO2 ... ALDO4: 216ade7515fSKim, Milo mask = LP8788_EN_SEL_ALDO234_M; 217ade7515fSKim, Milo break; 218ade7515fSKim, Milo case ALDO5: 219ade7515fSKim, Milo mask = LP8788_EN_SEL_ALDO5_M; 220ade7515fSKim, Milo break; 221ade7515fSKim, Milo case ALDO7: 222ade7515fSKim, Milo mask = LP8788_EN_SEL_ALDO7_M; 223ade7515fSKim, Milo break; 224ade7515fSKim, Milo default: 225ade7515fSKim, Milo return REGISTER; 226ade7515fSKim, Milo } 227ade7515fSKim, Milo 228ade7515fSKim, Milo return val & mask ? EXTPIN : REGISTER; 229ade7515fSKim, Milo } 230ade7515fSKim, Milo 231ade7515fSKim, Milo static int lp8788_ldo_ctrl_by_extern_pin(struct lp8788_ldo *ldo, int pinstate) 232ade7515fSKim, Milo { 233ade7515fSKim, Milo struct lp8788_ldo_enable_pin *pin = ldo->en_pin; 234ade7515fSKim, Milo 235ade7515fSKim, Milo if (!pin) 236ade7515fSKim, Milo return -EINVAL; 237ade7515fSKim, Milo 238ade7515fSKim, Milo if (gpio_is_valid(pin->gpio)) 239ade7515fSKim, Milo gpio_set_value(pin->gpio, pinstate); 240ade7515fSKim, Milo 241ade7515fSKim, Milo return 0; 242ade7515fSKim, Milo } 243ade7515fSKim, Milo 244ade7515fSKim, Milo static int lp8788_ldo_is_enabled_by_extern_pin(struct lp8788_ldo *ldo) 245ade7515fSKim, Milo { 246ade7515fSKim, Milo struct lp8788_ldo_enable_pin *pin = ldo->en_pin; 247ade7515fSKim, Milo 248ade7515fSKim, Milo if (!pin) 249ade7515fSKim, Milo return -EINVAL; 250ade7515fSKim, Milo 251ade7515fSKim, Milo return gpio_get_value(pin->gpio) ? 1 : 0; 252ade7515fSKim, Milo } 253ade7515fSKim, Milo 254ade7515fSKim, Milo static int lp8788_ldo_enable(struct regulator_dev *rdev) 255ade7515fSKim, Milo { 256ade7515fSKim, Milo struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 257ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 258ade7515fSKim, Milo enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); 259ade7515fSKim, Milo 260ade7515fSKim, Milo switch (mode) { 261ade7515fSKim, Milo case EXTPIN: 262ade7515fSKim, Milo return lp8788_ldo_ctrl_by_extern_pin(ldo, ENABLE); 263ade7515fSKim, Milo case REGISTER: 264ade7515fSKim, Milo return regulator_enable_regmap(rdev); 265ade7515fSKim, Milo default: 266ade7515fSKim, Milo return -EINVAL; 267ade7515fSKim, Milo } 268ade7515fSKim, Milo } 269ade7515fSKim, Milo 270ade7515fSKim, Milo static int lp8788_ldo_disable(struct regulator_dev *rdev) 271ade7515fSKim, Milo { 272ade7515fSKim, Milo struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 273ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 274ade7515fSKim, Milo enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); 275ade7515fSKim, Milo 276ade7515fSKim, Milo switch (mode) { 277ade7515fSKim, Milo case EXTPIN: 278ade7515fSKim, Milo return lp8788_ldo_ctrl_by_extern_pin(ldo, DISABLE); 279ade7515fSKim, Milo case REGISTER: 280ade7515fSKim, Milo return regulator_disable_regmap(rdev); 281ade7515fSKim, Milo default: 282ade7515fSKim, Milo return -EINVAL; 283ade7515fSKim, Milo } 284ade7515fSKim, Milo } 285ade7515fSKim, Milo 286ade7515fSKim, Milo static int lp8788_ldo_is_enabled(struct regulator_dev *rdev) 287ade7515fSKim, Milo { 288ade7515fSKim, Milo struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 289ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 290ade7515fSKim, Milo enum lp8788_enable_mode mode = lp8788_get_ldo_enable_mode(ldo, id); 291ade7515fSKim, Milo 292ade7515fSKim, Milo switch (mode) { 293ade7515fSKim, Milo case EXTPIN: 294ade7515fSKim, Milo return lp8788_ldo_is_enabled_by_extern_pin(ldo); 295ade7515fSKim, Milo case REGISTER: 296ade7515fSKim, Milo return regulator_is_enabled_regmap(rdev); 297ade7515fSKim, Milo default: 298ade7515fSKim, Milo return -EINVAL; 299ade7515fSKim, Milo } 300ade7515fSKim, Milo } 301ade7515fSKim, Milo 302ade7515fSKim, Milo static int lp8788_ldo_enable_time(struct regulator_dev *rdev) 303ade7515fSKim, Milo { 304ade7515fSKim, Milo struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 305ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 306ade7515fSKim, Milo u8 val, addr = LP8788_DLDO1_TIMESTEP + id; 307ade7515fSKim, Milo 308ade7515fSKim, Milo if (lp8788_read_byte(ldo->lp, addr, &val)) 309ade7515fSKim, Milo return -EINVAL; 310ade7515fSKim, Milo 311ade7515fSKim, Milo val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; 312ade7515fSKim, Milo 313ade7515fSKim, Milo return ENABLE_TIME_USEC * val; 314ade7515fSKim, Milo } 315ade7515fSKim, Milo 316ade7515fSKim, Milo static int lp8788_ldo_fixed_get_voltage(struct regulator_dev *rdev) 317ade7515fSKim, Milo { 318ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 319ade7515fSKim, Milo 320ade7515fSKim, Milo switch (id) { 321ade7515fSKim, Milo case ALDO2 ... ALDO5: 322ade7515fSKim, Milo return 2850000; 323ade7515fSKim, Milo case DLDO12: 324ade7515fSKim, Milo case ALDO8 ... ALDO9: 325ade7515fSKim, Milo return 2500000; 326ade7515fSKim, Milo case ALDO10: 327ade7515fSKim, Milo return 1100000; 328ade7515fSKim, Milo default: 329ade7515fSKim, Milo return -EINVAL; 330ade7515fSKim, Milo } 331ade7515fSKim, Milo } 332ade7515fSKim, Milo 333ade7515fSKim, Milo static struct regulator_ops lp8788_ldo_voltage_table_ops = { 334ade7515fSKim, Milo .list_voltage = regulator_list_voltage_table, 335ade7515fSKim, Milo .set_voltage_sel = regulator_set_voltage_sel_regmap, 336ade7515fSKim, Milo .get_voltage_sel = regulator_get_voltage_sel_regmap, 337ade7515fSKim, Milo .enable = lp8788_ldo_enable, 338ade7515fSKim, Milo .disable = lp8788_ldo_disable, 339ade7515fSKim, Milo .is_enabled = lp8788_ldo_is_enabled, 340ade7515fSKim, Milo .enable_time = lp8788_ldo_enable_time, 341ade7515fSKim, Milo }; 342ade7515fSKim, Milo 343ade7515fSKim, Milo static struct regulator_ops lp8788_ldo_voltage_fixed_ops = { 344ade7515fSKim, Milo .get_voltage = lp8788_ldo_fixed_get_voltage, 345ade7515fSKim, Milo .enable = lp8788_ldo_enable, 346ade7515fSKim, Milo .disable = lp8788_ldo_disable, 347ade7515fSKim, Milo .is_enabled = lp8788_ldo_is_enabled, 348ade7515fSKim, Milo .enable_time = lp8788_ldo_enable_time, 349ade7515fSKim, Milo }; 350ade7515fSKim, Milo 351ade7515fSKim, Milo static struct regulator_desc lp8788_dldo_desc[] = { 352ade7515fSKim, Milo { 353ade7515fSKim, Milo .name = "dldo1", 354ade7515fSKim, Milo .id = DLDO1, 355ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 356ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 357ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 358ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 359ade7515fSKim, Milo .owner = THIS_MODULE, 360ade7515fSKim, Milo .vsel_reg = LP8788_DLDO1_VOUT, 361ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 362ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 363ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO1_M, 364ade7515fSKim, Milo }, 365ade7515fSKim, Milo { 366ade7515fSKim, Milo .name = "dldo2", 367ade7515fSKim, Milo .id = DLDO2, 368ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 369ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 370ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 371ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 372ade7515fSKim, Milo .owner = THIS_MODULE, 373ade7515fSKim, Milo .vsel_reg = LP8788_DLDO2_VOUT, 374ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 375ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 376ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO2_M, 377ade7515fSKim, Milo }, 378ade7515fSKim, Milo { 379ade7515fSKim, Milo .name = "dldo3", 380ade7515fSKim, Milo .id = DLDO3, 381ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 382ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 383ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 384ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 385ade7515fSKim, Milo .owner = THIS_MODULE, 386ade7515fSKim, Milo .vsel_reg = LP8788_DLDO3_VOUT, 387ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 388ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 389ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO3_M, 390ade7515fSKim, Milo }, 391ade7515fSKim, Milo { 392ade7515fSKim, Milo .name = "dldo4", 393ade7515fSKim, Milo .id = DLDO4, 394ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 395ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl), 396ade7515fSKim, Milo .volt_table = lp8788_dldo4_vtbl, 397ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 398ade7515fSKim, Milo .owner = THIS_MODULE, 399ade7515fSKim, Milo .vsel_reg = LP8788_DLDO4_VOUT, 400ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_1BIT_M, 401ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 402ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO4_M, 403ade7515fSKim, Milo }, 404ade7515fSKim, Milo { 405ade7515fSKim, Milo .name = "dldo5", 406ade7515fSKim, Milo .id = DLDO5, 407ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 408ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 409ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 410ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 411ade7515fSKim, Milo .owner = THIS_MODULE, 412ade7515fSKim, Milo .vsel_reg = LP8788_DLDO5_VOUT, 413ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 414ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 415ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO5_M, 416ade7515fSKim, Milo }, 417ade7515fSKim, Milo { 418ade7515fSKim, Milo .name = "dldo6", 419ade7515fSKim, Milo .id = DLDO6, 420ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 421ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl), 422ade7515fSKim, Milo .volt_table = lp8788_dldo6_vtbl, 423ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 424ade7515fSKim, Milo .owner = THIS_MODULE, 425ade7515fSKim, Milo .vsel_reg = LP8788_DLDO6_VOUT, 426ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_3BIT_M, 427ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 428ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO6_M, 429ade7515fSKim, Milo }, 430ade7515fSKim, Milo { 431ade7515fSKim, Milo .name = "dldo7", 432ade7515fSKim, Milo .id = DLDO7, 433ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 434ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 435ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 436ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 437ade7515fSKim, Milo .owner = THIS_MODULE, 438ade7515fSKim, Milo .vsel_reg = LP8788_DLDO7_VOUT, 439ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 440ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 441ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO7_M, 442ade7515fSKim, Milo }, 443ade7515fSKim, Milo { 444ade7515fSKim, Milo .name = "dldo8", 445ade7515fSKim, Milo .id = DLDO8, 446ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 447ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 448ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 449ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 450ade7515fSKim, Milo .owner = THIS_MODULE, 451ade7515fSKim, Milo .vsel_reg = LP8788_DLDO8_VOUT, 452ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 453ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 454ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO8_M, 455ade7515fSKim, Milo }, 456ade7515fSKim, Milo { 457ade7515fSKim, Milo .name = "dldo9", 458ade7515fSKim, Milo .id = DLDO9, 459ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 460ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 461ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 462ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 463ade7515fSKim, Milo .owner = THIS_MODULE, 464ade7515fSKim, Milo .vsel_reg = LP8788_DLDO9_VOUT, 465ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 466ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 467ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO9_M, 468ade7515fSKim, Milo }, 469ade7515fSKim, Milo { 470ade7515fSKim, Milo .name = "dldo10", 471ade7515fSKim, Milo .id = DLDO10, 472ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 473ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 474ade7515fSKim, Milo .volt_table = lp8788_dldo1011_vtbl, 475ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 476ade7515fSKim, Milo .owner = THIS_MODULE, 477ade7515fSKim, Milo .vsel_reg = LP8788_DLDO10_VOUT, 478ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 479ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 480ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO10_M, 481ade7515fSKim, Milo }, 482ade7515fSKim, Milo { 483ade7515fSKim, Milo .name = "dldo11", 484ade7515fSKim, Milo .id = DLDO11, 485ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 486ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 487ade7515fSKim, Milo .volt_table = lp8788_dldo1011_vtbl, 488ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 489ade7515fSKim, Milo .owner = THIS_MODULE, 490ade7515fSKim, Milo .vsel_reg = LP8788_DLDO11_VOUT, 491ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 492ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 493ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO11_M, 494ade7515fSKim, Milo }, 495ade7515fSKim, Milo { 496ade7515fSKim, Milo .name = "dldo12", 497ade7515fSKim, Milo .id = DLDO12, 498ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 49974c8cfdaSAxel Lin .n_voltages = 1, 500ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 501ade7515fSKim, Milo .owner = THIS_MODULE, 502ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 503ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO12_M, 504ade7515fSKim, Milo }, 505ade7515fSKim, Milo }; 506ade7515fSKim, Milo 507ade7515fSKim, Milo static struct regulator_desc lp8788_aldo_desc[] = { 508ade7515fSKim, Milo { 509ade7515fSKim, Milo .name = "aldo1", 510ade7515fSKim, Milo .id = ALDO1, 511ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 512ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl), 513ade7515fSKim, Milo .volt_table = lp8788_aldo1_vtbl, 514ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 515ade7515fSKim, Milo .owner = THIS_MODULE, 516ade7515fSKim, Milo .vsel_reg = LP8788_ALDO1_VOUT, 517ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_1BIT_M, 518ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 519ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO1_M, 520ade7515fSKim, Milo }, 521ade7515fSKim, Milo { 522ade7515fSKim, Milo .name = "aldo2", 523ade7515fSKim, Milo .id = ALDO2, 524ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 52574c8cfdaSAxel Lin .n_voltages = 1, 526ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 527ade7515fSKim, Milo .owner = THIS_MODULE, 528ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 529ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO2_M, 530ade7515fSKim, Milo }, 531ade7515fSKim, Milo { 532ade7515fSKim, Milo .name = "aldo3", 533ade7515fSKim, Milo .id = ALDO3, 534ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 53574c8cfdaSAxel Lin .n_voltages = 1, 536ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 537ade7515fSKim, Milo .owner = THIS_MODULE, 538ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 539ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO3_M, 540ade7515fSKim, Milo }, 541ade7515fSKim, Milo { 542ade7515fSKim, Milo .name = "aldo4", 543ade7515fSKim, Milo .id = ALDO4, 544ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 54574c8cfdaSAxel Lin .n_voltages = 1, 546ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 547ade7515fSKim, Milo .owner = THIS_MODULE, 548ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 549ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO4_M, 550ade7515fSKim, Milo }, 551ade7515fSKim, Milo { 552ade7515fSKim, Milo .name = "aldo5", 553ade7515fSKim, Milo .id = ALDO5, 554ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 55574c8cfdaSAxel Lin .n_voltages = 1, 556ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 557ade7515fSKim, Milo .owner = THIS_MODULE, 558ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 559ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO5_M, 560ade7515fSKim, Milo }, 561ade7515fSKim, Milo { 562ade7515fSKim, Milo .name = "aldo6", 563ade7515fSKim, Milo .id = ALDO6, 564ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 565ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 566ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 567ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 568ade7515fSKim, Milo .owner = THIS_MODULE, 569ade7515fSKim, Milo .vsel_reg = LP8788_ALDO6_VOUT, 570ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 571ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 572ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO6_M, 573ade7515fSKim, Milo }, 574ade7515fSKim, Milo { 575ade7515fSKim, Milo .name = "aldo7", 576ade7515fSKim, Milo .id = ALDO7, 577ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 578ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl), 579ade7515fSKim, Milo .volt_table = lp8788_aldo7_vtbl, 580ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 581ade7515fSKim, Milo .owner = THIS_MODULE, 582ade7515fSKim, Milo .vsel_reg = LP8788_ALDO7_VOUT, 583ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_3BIT_M, 584ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 585ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO7_M, 586ade7515fSKim, Milo }, 587ade7515fSKim, Milo { 588ade7515fSKim, Milo .name = "aldo8", 589ade7515fSKim, Milo .id = ALDO8, 590ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 59174c8cfdaSAxel Lin .n_voltages = 1, 592ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 593ade7515fSKim, Milo .owner = THIS_MODULE, 594ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 595ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO8_M, 596ade7515fSKim, Milo }, 597ade7515fSKim, Milo { 598ade7515fSKim, Milo .name = "aldo9", 599ade7515fSKim, Milo .id = ALDO9, 600ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 60174c8cfdaSAxel Lin .n_voltages = 1, 602ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 603ade7515fSKim, Milo .owner = THIS_MODULE, 604ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 605ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO9_M, 606ade7515fSKim, Milo }, 607ade7515fSKim, Milo { 608ade7515fSKim, Milo .name = "aldo10", 609ade7515fSKim, Milo .id = ALDO10, 610ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 61174c8cfdaSAxel Lin .n_voltages = 1, 612ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 613ade7515fSKim, Milo .owner = THIS_MODULE, 614ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 615ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO10_M, 616ade7515fSKim, Milo }, 617ade7515fSKim, Milo }; 618ade7515fSKim, Milo 619f02a3917SKim, Milo static int lp8788_gpio_request_ldo_en(struct platform_device *pdev, 620f02a3917SKim, Milo struct lp8788_ldo *ldo, 621ade7515fSKim, Milo enum lp8788_ext_ldo_en_id id) 622ade7515fSKim, Milo { 623f02a3917SKim, Milo struct device *dev = &pdev->dev; 624ade7515fSKim, Milo struct lp8788_ldo_enable_pin *pin = ldo->en_pin; 625ade7515fSKim, Milo int ret, gpio, pinstate; 626ade7515fSKim, Milo char *name[] = { 627ade7515fSKim, Milo [EN_ALDO1] = "LP8788_EN_ALDO1", 628ade7515fSKim, Milo [EN_ALDO234] = "LP8788_EN_ALDO234", 629ade7515fSKim, Milo [EN_ALDO5] = "LP8788_EN_ALDO5", 630ade7515fSKim, Milo [EN_ALDO7] = "LP8788_EN_ALDO7", 631ade7515fSKim, Milo [EN_DLDO7] = "LP8788_EN_DLDO7", 632ade7515fSKim, Milo [EN_DLDO911] = "LP8788_EN_DLDO911", 633ade7515fSKim, Milo }; 634ade7515fSKim, Milo 635ade7515fSKim, Milo gpio = pin->gpio; 636ade7515fSKim, Milo if (!gpio_is_valid(gpio)) { 637ade7515fSKim, Milo dev_err(dev, "invalid gpio: %d\n", gpio); 638ade7515fSKim, Milo return -EINVAL; 639ade7515fSKim, Milo } 640ade7515fSKim, Milo 641ade7515fSKim, Milo pinstate = pin->init_state; 642ade7515fSKim, Milo ret = devm_gpio_request_one(dev, gpio, pinstate, name[id]); 643ade7515fSKim, Milo if (ret == -EBUSY) { 644ade7515fSKim, Milo dev_warn(dev, "gpio%d already used\n", gpio); 645ade7515fSKim, Milo return 0; 646ade7515fSKim, Milo } 647ade7515fSKim, Milo 648ade7515fSKim, Milo return ret; 649ade7515fSKim, Milo } 650ade7515fSKim, Milo 651f02a3917SKim, Milo static int lp8788_config_ldo_enable_mode(struct platform_device *pdev, 652f02a3917SKim, Milo struct lp8788_ldo *ldo, 653ade7515fSKim, Milo enum lp8788_ldo_id id) 654ade7515fSKim, Milo { 655ade7515fSKim, Milo int ret; 656ade7515fSKim, Milo struct lp8788 *lp = ldo->lp; 657ade7515fSKim, Milo struct lp8788_platform_data *pdata = lp->pdata; 658ade7515fSKim, Milo enum lp8788_ext_ldo_en_id enable_id; 659ade7515fSKim, Milo u8 en_mask[] = { 660ade7515fSKim, Milo [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M, 661ade7515fSKim, Milo [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M, 662ade7515fSKim, Milo [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M, 663ade7515fSKim, Milo [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M, 664ade7515fSKim, Milo [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M, 665ade7515fSKim, Milo [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M, 666ade7515fSKim, Milo }; 667ade7515fSKim, Milo 668ade7515fSKim, Milo switch (id) { 669ade7515fSKim, Milo case DLDO7: 670ade7515fSKim, Milo enable_id = EN_DLDO7; 671ade7515fSKim, Milo break; 672ade7515fSKim, Milo case DLDO9: 673ade7515fSKim, Milo case DLDO11: 674ade7515fSKim, Milo enable_id = EN_DLDO911; 675ade7515fSKim, Milo break; 676ade7515fSKim, Milo case ALDO1: 677ade7515fSKim, Milo enable_id = EN_ALDO1; 678ade7515fSKim, Milo break; 679ade7515fSKim, Milo case ALDO2 ... ALDO4: 680ade7515fSKim, Milo enable_id = EN_ALDO234; 681ade7515fSKim, Milo break; 682ade7515fSKim, Milo case ALDO5: 683ade7515fSKim, Milo enable_id = EN_ALDO5; 684ade7515fSKim, Milo break; 685ade7515fSKim, Milo case ALDO7: 686ade7515fSKim, Milo enable_id = EN_ALDO7; 687ade7515fSKim, Milo break; 688ade7515fSKim, Milo default: 689ade7515fSKim, Milo return 0; 690ade7515fSKim, Milo } 691ade7515fSKim, Milo 692ade7515fSKim, Milo /* if no platform data for ldo pin, then set default enable mode */ 693ade7515fSKim, Milo if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id]) 694ade7515fSKim, Milo goto set_default_ldo_enable_mode; 695ade7515fSKim, Milo 696ade7515fSKim, Milo ldo->en_pin = pdata->ldo_pin[enable_id]; 697ade7515fSKim, Milo 698f02a3917SKim, Milo ret = lp8788_gpio_request_ldo_en(pdev, ldo, enable_id); 699ade7515fSKim, Milo if (ret) 700ade7515fSKim, Milo goto set_default_ldo_enable_mode; 701ade7515fSKim, Milo 702ade7515fSKim, Milo return ret; 703ade7515fSKim, Milo 704ade7515fSKim, Milo set_default_ldo_enable_mode: 70540b5aa8fSAxel Lin return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0); 706ade7515fSKim, Milo } 707ade7515fSKim, Milo 708a5023574SBill Pemberton static int lp8788_dldo_probe(struct platform_device *pdev) 709ade7515fSKim, Milo { 710ade7515fSKim, Milo struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 711ade7515fSKim, Milo int id = pdev->id; 712ade7515fSKim, Milo struct lp8788_ldo *ldo; 713ade7515fSKim, Milo struct regulator_config cfg = { }; 714ade7515fSKim, Milo struct regulator_dev *rdev; 715ade7515fSKim, Milo int ret; 716ade7515fSKim, Milo 717939e88f0SKim, Milo ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 718ade7515fSKim, Milo if (!ldo) 719ade7515fSKim, Milo return -ENOMEM; 720ade7515fSKim, Milo 721ade7515fSKim, Milo ldo->lp = lp; 722f02a3917SKim, Milo ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_dldo_id[id]); 723ade7515fSKim, Milo if (ret) 724ade7515fSKim, Milo return ret; 725ade7515fSKim, Milo 726939e88f0SKim, Milo cfg.dev = pdev->dev.parent; 727ade7515fSKim, Milo cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; 728ade7515fSKim, Milo cfg.driver_data = ldo; 729ade7515fSKim, Milo cfg.regmap = lp->regmap; 730ade7515fSKim, Milo 731ade7515fSKim, Milo rdev = regulator_register(&lp8788_dldo_desc[id], &cfg); 732ade7515fSKim, Milo if (IS_ERR(rdev)) { 733ade7515fSKim, Milo ret = PTR_ERR(rdev); 734939e88f0SKim, Milo dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n", 735ade7515fSKim, Milo id + 1, ret); 736ade7515fSKim, Milo return ret; 737ade7515fSKim, Milo } 738ade7515fSKim, Milo 739ade7515fSKim, Milo ldo->regulator = rdev; 740ade7515fSKim, Milo platform_set_drvdata(pdev, ldo); 741ade7515fSKim, Milo 742ade7515fSKim, Milo return 0; 743ade7515fSKim, Milo } 744ade7515fSKim, Milo 7458dc995f5SBill Pemberton static int lp8788_dldo_remove(struct platform_device *pdev) 746ade7515fSKim, Milo { 747ade7515fSKim, Milo struct lp8788_ldo *ldo = platform_get_drvdata(pdev); 748ade7515fSKim, Milo 749ade7515fSKim, Milo platform_set_drvdata(pdev, NULL); 750ade7515fSKim, Milo regulator_unregister(ldo->regulator); 751ade7515fSKim, Milo 752ade7515fSKim, Milo return 0; 753ade7515fSKim, Milo } 754ade7515fSKim, Milo 755ade7515fSKim, Milo static struct platform_driver lp8788_dldo_driver = { 756ade7515fSKim, Milo .probe = lp8788_dldo_probe, 7575eb9f2b9SBill Pemberton .remove = lp8788_dldo_remove, 758ade7515fSKim, Milo .driver = { 759ade7515fSKim, Milo .name = LP8788_DEV_DLDO, 760ade7515fSKim, Milo .owner = THIS_MODULE, 761ade7515fSKim, Milo }, 762ade7515fSKim, Milo }; 763ade7515fSKim, Milo 764a5023574SBill Pemberton static int lp8788_aldo_probe(struct platform_device *pdev) 765ade7515fSKim, Milo { 766ade7515fSKim, Milo struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 767ade7515fSKim, Milo int id = pdev->id; 768ade7515fSKim, Milo struct lp8788_ldo *ldo; 769ade7515fSKim, Milo struct regulator_config cfg = { }; 770ade7515fSKim, Milo struct regulator_dev *rdev; 771ade7515fSKim, Milo int ret; 772ade7515fSKim, Milo 773939e88f0SKim, Milo ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 774ade7515fSKim, Milo if (!ldo) 775ade7515fSKim, Milo return -ENOMEM; 776ade7515fSKim, Milo 777ade7515fSKim, Milo ldo->lp = lp; 778f02a3917SKim, Milo ret = lp8788_config_ldo_enable_mode(pdev, ldo, lp8788_aldo_id[id]); 779ade7515fSKim, Milo if (ret) 780ade7515fSKim, Milo return ret; 781ade7515fSKim, Milo 782939e88f0SKim, Milo cfg.dev = pdev->dev.parent; 783ade7515fSKim, Milo cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; 784ade7515fSKim, Milo cfg.driver_data = ldo; 785ade7515fSKim, Milo cfg.regmap = lp->regmap; 786ade7515fSKim, Milo 787ade7515fSKim, Milo rdev = regulator_register(&lp8788_aldo_desc[id], &cfg); 788ade7515fSKim, Milo if (IS_ERR(rdev)) { 789ade7515fSKim, Milo ret = PTR_ERR(rdev); 790939e88f0SKim, Milo dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n", 791ade7515fSKim, Milo id + 1, ret); 792ade7515fSKim, Milo return ret; 793ade7515fSKim, Milo } 794ade7515fSKim, Milo 795ade7515fSKim, Milo ldo->regulator = rdev; 796ade7515fSKim, Milo platform_set_drvdata(pdev, ldo); 797ade7515fSKim, Milo 798ade7515fSKim, Milo return 0; 799ade7515fSKim, Milo } 800ade7515fSKim, Milo 8018dc995f5SBill Pemberton static int lp8788_aldo_remove(struct platform_device *pdev) 802ade7515fSKim, Milo { 803ade7515fSKim, Milo struct lp8788_ldo *ldo = platform_get_drvdata(pdev); 804ade7515fSKim, Milo 805ade7515fSKim, Milo platform_set_drvdata(pdev, NULL); 806ade7515fSKim, Milo regulator_unregister(ldo->regulator); 807ade7515fSKim, Milo 808ade7515fSKim, Milo return 0; 809ade7515fSKim, Milo } 810ade7515fSKim, Milo 811ade7515fSKim, Milo static struct platform_driver lp8788_aldo_driver = { 812ade7515fSKim, Milo .probe = lp8788_aldo_probe, 8135eb9f2b9SBill Pemberton .remove = lp8788_aldo_remove, 814ade7515fSKim, Milo .driver = { 815ade7515fSKim, Milo .name = LP8788_DEV_ALDO, 816ade7515fSKim, Milo .owner = THIS_MODULE, 817ade7515fSKim, Milo }, 818ade7515fSKim, Milo }; 819ade7515fSKim, Milo 820ade7515fSKim, Milo static int __init lp8788_ldo_init(void) 821ade7515fSKim, Milo { 822ade7515fSKim, Milo int ret; 823ade7515fSKim, Milo 824ade7515fSKim, Milo ret = platform_driver_register(&lp8788_dldo_driver); 825ade7515fSKim, Milo if (ret) 826ade7515fSKim, Milo return ret; 827ade7515fSKim, Milo 828ade7515fSKim, Milo return platform_driver_register(&lp8788_aldo_driver); 829ade7515fSKim, Milo } 830ade7515fSKim, Milo subsys_initcall(lp8788_ldo_init); 831ade7515fSKim, Milo 832ade7515fSKim, Milo static void __exit lp8788_ldo_exit(void) 833ade7515fSKim, Milo { 834ade7515fSKim, Milo platform_driver_unregister(&lp8788_aldo_driver); 835ade7515fSKim, Milo platform_driver_unregister(&lp8788_dldo_driver); 836ade7515fSKim, Milo } 837ade7515fSKim, Milo module_exit(lp8788_ldo_exit); 838ade7515fSKim, Milo 839ade7515fSKim, Milo MODULE_DESCRIPTION("TI LP8788 LDO Driver"); 840ade7515fSKim, Milo MODULE_AUTHOR("Milo Kim"); 841ade7515fSKim, Milo MODULE_LICENSE("GPL"); 842ade7515fSKim, Milo MODULE_ALIAS("platform:lp8788-dldo"); 843ade7515fSKim, Milo MODULE_ALIAS("platform:lp8788-aldo"); 844