1ade7515fSKim, Milo /* 2ade7515fSKim, Milo * TI LP8788 MFD - ldo regulator driver 3ade7515fSKim, Milo * 4ade7515fSKim, Milo * Copyright 2012 Texas Instruments 5ade7515fSKim, Milo * 6ade7515fSKim, Milo * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7ade7515fSKim, Milo * 8ade7515fSKim, Milo * This program is free software; you can redistribute it and/or modify 9ade7515fSKim, Milo * it under the terms of the GNU General Public License version 2 as 10ade7515fSKim, Milo * published by the Free Software Foundation. 11ade7515fSKim, Milo * 12ade7515fSKim, Milo */ 13ade7515fSKim, Milo 14ade7515fSKim, Milo #include <linux/module.h> 15ade7515fSKim, Milo #include <linux/slab.h> 16ade7515fSKim, Milo #include <linux/err.h> 17ade7515fSKim, Milo #include <linux/platform_device.h> 18ade7515fSKim, Milo #include <linux/regulator/driver.h> 19ade7515fSKim, Milo #include <linux/gpio.h> 20ade7515fSKim, Milo #include <linux/mfd/lp8788.h> 21ade7515fSKim, Milo 22ade7515fSKim, Milo /* register address */ 23ade7515fSKim, Milo #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */ 24ade7515fSKim, Milo #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */ 25ade7515fSKim, Milo #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */ 26ade7515fSKim, Milo #define LP8788_EN_SEL 0x10 27ade7515fSKim, Milo #define LP8788_DLDO1_VOUT 0x2E 28ade7515fSKim, Milo #define LP8788_DLDO2_VOUT 0x2F 29ade7515fSKim, Milo #define LP8788_DLDO3_VOUT 0x30 30ade7515fSKim, Milo #define LP8788_DLDO4_VOUT 0x31 31ade7515fSKim, Milo #define LP8788_DLDO5_VOUT 0x32 32ade7515fSKim, Milo #define LP8788_DLDO6_VOUT 0x33 33ade7515fSKim, Milo #define LP8788_DLDO7_VOUT 0x34 34ade7515fSKim, Milo #define LP8788_DLDO8_VOUT 0x35 35ade7515fSKim, Milo #define LP8788_DLDO9_VOUT 0x36 36ade7515fSKim, Milo #define LP8788_DLDO10_VOUT 0x37 37ade7515fSKim, Milo #define LP8788_DLDO11_VOUT 0x38 38ade7515fSKim, Milo #define LP8788_DLDO12_VOUT 0x39 39ade7515fSKim, Milo #define LP8788_ALDO1_VOUT 0x3A 40ade7515fSKim, Milo #define LP8788_ALDO2_VOUT 0x3B 41ade7515fSKim, Milo #define LP8788_ALDO3_VOUT 0x3C 42ade7515fSKim, Milo #define LP8788_ALDO4_VOUT 0x3D 43ade7515fSKim, Milo #define LP8788_ALDO5_VOUT 0x3E 44ade7515fSKim, Milo #define LP8788_ALDO6_VOUT 0x3F 45ade7515fSKim, Milo #define LP8788_ALDO7_VOUT 0x40 46ade7515fSKim, Milo #define LP8788_ALDO8_VOUT 0x41 47ade7515fSKim, Milo #define LP8788_ALDO9_VOUT 0x42 48ade7515fSKim, Milo #define LP8788_ALDO10_VOUT 0x43 49ade7515fSKim, Milo #define LP8788_DLDO1_TIMESTEP 0x44 50ade7515fSKim, Milo 51ade7515fSKim, Milo /* mask/shift bits */ 52ade7515fSKim, Milo #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */ 53ade7515fSKim, Milo #define LP8788_EN_DLDO2_M BIT(1) 54ade7515fSKim, Milo #define LP8788_EN_DLDO3_M BIT(2) 55ade7515fSKim, Milo #define LP8788_EN_DLDO4_M BIT(3) 56ade7515fSKim, Milo #define LP8788_EN_DLDO5_M BIT(4) 57ade7515fSKim, Milo #define LP8788_EN_DLDO6_M BIT(5) 58ade7515fSKim, Milo #define LP8788_EN_DLDO7_M BIT(6) 59ade7515fSKim, Milo #define LP8788_EN_DLDO8_M BIT(7) 60ade7515fSKim, Milo #define LP8788_EN_DLDO9_M BIT(0) 61ade7515fSKim, Milo #define LP8788_EN_DLDO10_M BIT(1) 62ade7515fSKim, Milo #define LP8788_EN_DLDO11_M BIT(2) 63ade7515fSKim, Milo #define LP8788_EN_DLDO12_M BIT(3) 64ade7515fSKim, Milo #define LP8788_EN_ALDO1_M BIT(4) 65ade7515fSKim, Milo #define LP8788_EN_ALDO2_M BIT(5) 66ade7515fSKim, Milo #define LP8788_EN_ALDO3_M BIT(6) 67ade7515fSKim, Milo #define LP8788_EN_ALDO4_M BIT(7) 68ade7515fSKim, Milo #define LP8788_EN_ALDO5_M BIT(0) 69ade7515fSKim, Milo #define LP8788_EN_ALDO6_M BIT(1) 70ade7515fSKim, Milo #define LP8788_EN_ALDO7_M BIT(2) 71ade7515fSKim, Milo #define LP8788_EN_ALDO8_M BIT(3) 72ade7515fSKim, Milo #define LP8788_EN_ALDO9_M BIT(4) 73ade7515fSKim, Milo #define LP8788_EN_ALDO10_M BIT(5) 74ade7515fSKim, Milo #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */ 75ade7515fSKim, Milo #define LP8788_EN_SEL_DLDO7_M BIT(1) 76ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO7_M BIT(2) 77ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO5_M BIT(3) 78ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO234_M BIT(4) 79ade7515fSKim, Milo #define LP8788_EN_SEL_ALDO1_M BIT(5) 80ade7515fSKim, Milo #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */ 81ade7515fSKim, Milo #define LP8788_VOUT_4BIT_M 0x0F 82ade7515fSKim, Milo #define LP8788_VOUT_3BIT_M 0x07 83ade7515fSKim, Milo #define LP8788_VOUT_1BIT_M 0x01 84ade7515fSKim, Milo #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */ 85ade7515fSKim, Milo #define LP8788_STARTUP_TIME_S 3 86ade7515fSKim, Milo 87ade7515fSKim, Milo #define ENABLE_TIME_USEC 32 88ade7515fSKim, Milo #define ENABLE GPIOF_OUT_INIT_HIGH 89ade7515fSKim, Milo #define DISABLE GPIOF_OUT_INIT_LOW 90ade7515fSKim, Milo 91ade7515fSKim, Milo enum lp8788_ldo_id { 92ade7515fSKim, Milo DLDO1, 93ade7515fSKim, Milo DLDO2, 94ade7515fSKim, Milo DLDO3, 95ade7515fSKim, Milo DLDO4, 96ade7515fSKim, Milo DLDO5, 97ade7515fSKim, Milo DLDO6, 98ade7515fSKim, Milo DLDO7, 99ade7515fSKim, Milo DLDO8, 100ade7515fSKim, Milo DLDO9, 101ade7515fSKim, Milo DLDO10, 102ade7515fSKim, Milo DLDO11, 103ade7515fSKim, Milo DLDO12, 104ade7515fSKim, Milo ALDO1, 105ade7515fSKim, Milo ALDO2, 106ade7515fSKim, Milo ALDO3, 107ade7515fSKim, Milo ALDO4, 108ade7515fSKim, Milo ALDO5, 109ade7515fSKim, Milo ALDO6, 110ade7515fSKim, Milo ALDO7, 111ade7515fSKim, Milo ALDO8, 112ade7515fSKim, Milo ALDO9, 113ade7515fSKim, Milo ALDO10, 114ade7515fSKim, Milo }; 115ade7515fSKim, Milo 116ade7515fSKim, Milo struct lp8788_ldo { 117ade7515fSKim, Milo struct lp8788 *lp; 118ade7515fSKim, Milo struct regulator_desc *desc; 119ade7515fSKim, Milo struct regulator_dev *regulator; 120ade7515fSKim, Milo struct lp8788_ldo_enable_pin *en_pin; 121ade7515fSKim, Milo }; 122ade7515fSKim, Milo 123ade7515fSKim, Milo /* DLDO 1, 2, 3, 9 voltage table */ 1244e92920bSMark Brown static const int lp8788_dldo1239_vtbl[] = { 125ade7515fSKim, Milo 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 126ade7515fSKim, Milo 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000, 127ade7515fSKim, Milo 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 128ade7515fSKim, Milo 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 129ade7515fSKim, Milo }; 130ade7515fSKim, Milo 131ade7515fSKim, Milo /* DLDO 4 voltage table */ 132ade7515fSKim, Milo static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 }; 133ade7515fSKim, Milo 134ade7515fSKim, Milo /* DLDO 5, 7, 8 and ALDO 6 voltage table */ 135ade7515fSKim, Milo static const int lp8788_dldo578_aldo6_vtbl[] = { 136ade7515fSKim, Milo 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, 137ade7515fSKim, Milo 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000, 138ade7515fSKim, Milo }; 139ade7515fSKim, Milo 140ade7515fSKim, Milo /* DLDO 6 voltage table */ 141ade7515fSKim, Milo static const int lp8788_dldo6_vtbl[] = { 142ade7515fSKim, Milo 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000, 143ade7515fSKim, Milo }; 144ade7515fSKim, Milo 145ade7515fSKim, Milo /* DLDO 10, 11 voltage table */ 146ade7515fSKim, Milo static const int lp8788_dldo1011_vtbl[] = { 147ade7515fSKim, Milo 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 148ade7515fSKim, Milo 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 149ade7515fSKim, Milo }; 150ade7515fSKim, Milo 151ade7515fSKim, Milo /* ALDO 1 voltage table */ 152ade7515fSKim, Milo static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 }; 153ade7515fSKim, Milo 154ade7515fSKim, Milo /* ALDO 7 voltage table */ 155ade7515fSKim, Milo static const int lp8788_aldo7_vtbl[] = { 156ade7515fSKim, Milo 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000, 157ade7515fSKim, Milo }; 158ade7515fSKim, Milo 159ade7515fSKim, Milo static int lp8788_ldo_enable_time(struct regulator_dev *rdev) 160ade7515fSKim, Milo { 161ade7515fSKim, Milo struct lp8788_ldo *ldo = rdev_get_drvdata(rdev); 162ade7515fSKim, Milo enum lp8788_ldo_id id = rdev_get_id(rdev); 163ade7515fSKim, Milo u8 val, addr = LP8788_DLDO1_TIMESTEP + id; 164ade7515fSKim, Milo 165ade7515fSKim, Milo if (lp8788_read_byte(ldo->lp, addr, &val)) 166ade7515fSKim, Milo return -EINVAL; 167ade7515fSKim, Milo 168ade7515fSKim, Milo val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S; 169ade7515fSKim, Milo 170ade7515fSKim, Milo return ENABLE_TIME_USEC * val; 171ade7515fSKim, Milo } 172ade7515fSKim, Milo 17395dfead1SJulia Lawall static const struct regulator_ops lp8788_ldo_voltage_table_ops = { 174ade7515fSKim, Milo .list_voltage = regulator_list_voltage_table, 175ade7515fSKim, Milo .set_voltage_sel = regulator_set_voltage_sel_regmap, 176ade7515fSKim, Milo .get_voltage_sel = regulator_get_voltage_sel_regmap, 177407945fdSKim, Milo .enable = regulator_enable_regmap, 178407945fdSKim, Milo .disable = regulator_disable_regmap, 179407945fdSKim, Milo .is_enabled = regulator_is_enabled_regmap, 180ade7515fSKim, Milo .enable_time = lp8788_ldo_enable_time, 181ade7515fSKim, Milo }; 182ade7515fSKim, Milo 18395dfead1SJulia Lawall static const struct regulator_ops lp8788_ldo_voltage_fixed_ops = { 184b5366e5eSAxel Lin .list_voltage = regulator_list_voltage_linear, 185407945fdSKim, Milo .enable = regulator_enable_regmap, 186407945fdSKim, Milo .disable = regulator_disable_regmap, 187407945fdSKim, Milo .is_enabled = regulator_is_enabled_regmap, 188ade7515fSKim, Milo .enable_time = lp8788_ldo_enable_time, 189ade7515fSKim, Milo }; 190ade7515fSKim, Milo 191ade7515fSKim, Milo static struct regulator_desc lp8788_dldo_desc[] = { 192ade7515fSKim, Milo { 193ade7515fSKim, Milo .name = "dldo1", 194ade7515fSKim, Milo .id = DLDO1, 195ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 196ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 197ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 198ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 199ade7515fSKim, Milo .owner = THIS_MODULE, 200ade7515fSKim, Milo .vsel_reg = LP8788_DLDO1_VOUT, 201ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 202ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 203ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO1_M, 204ade7515fSKim, Milo }, 205ade7515fSKim, Milo { 206ade7515fSKim, Milo .name = "dldo2", 207ade7515fSKim, Milo .id = DLDO2, 208ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 209ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 210ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 211ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 212ade7515fSKim, Milo .owner = THIS_MODULE, 213ade7515fSKim, Milo .vsel_reg = LP8788_DLDO2_VOUT, 214ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 215ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 216ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO2_M, 217ade7515fSKim, Milo }, 218ade7515fSKim, Milo { 219ade7515fSKim, Milo .name = "dldo3", 220ade7515fSKim, Milo .id = DLDO3, 221ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 222ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 223ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 224ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 225ade7515fSKim, Milo .owner = THIS_MODULE, 226ade7515fSKim, Milo .vsel_reg = LP8788_DLDO3_VOUT, 227ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 228ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 229ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO3_M, 230ade7515fSKim, Milo }, 231ade7515fSKim, Milo { 232ade7515fSKim, Milo .name = "dldo4", 233ade7515fSKim, Milo .id = DLDO4, 234ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 235ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl), 236ade7515fSKim, Milo .volt_table = lp8788_dldo4_vtbl, 237ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 238ade7515fSKim, Milo .owner = THIS_MODULE, 239ade7515fSKim, Milo .vsel_reg = LP8788_DLDO4_VOUT, 240ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_1BIT_M, 241ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 242ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO4_M, 243ade7515fSKim, Milo }, 244ade7515fSKim, Milo { 245ade7515fSKim, Milo .name = "dldo5", 246ade7515fSKim, Milo .id = DLDO5, 247ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 248ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 249ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 250ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 251ade7515fSKim, Milo .owner = THIS_MODULE, 252ade7515fSKim, Milo .vsel_reg = LP8788_DLDO5_VOUT, 253ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 254ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 255ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO5_M, 256ade7515fSKim, Milo }, 257ade7515fSKim, Milo { 258ade7515fSKim, Milo .name = "dldo6", 259ade7515fSKim, Milo .id = DLDO6, 260ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 261ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl), 262ade7515fSKim, Milo .volt_table = lp8788_dldo6_vtbl, 263ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 264ade7515fSKim, Milo .owner = THIS_MODULE, 265ade7515fSKim, Milo .vsel_reg = LP8788_DLDO6_VOUT, 266ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_3BIT_M, 267ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 268ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO6_M, 269ade7515fSKim, Milo }, 270ade7515fSKim, Milo { 271ade7515fSKim, Milo .name = "dldo7", 272ade7515fSKim, Milo .id = DLDO7, 273ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 274ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 275ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 276ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 277ade7515fSKim, Milo .owner = THIS_MODULE, 278ade7515fSKim, Milo .vsel_reg = LP8788_DLDO7_VOUT, 279ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 280ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 281ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO7_M, 282ade7515fSKim, Milo }, 283ade7515fSKim, Milo { 284ade7515fSKim, Milo .name = "dldo8", 285ade7515fSKim, Milo .id = DLDO8, 286ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 287ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 288ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 289ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 290ade7515fSKim, Milo .owner = THIS_MODULE, 291ade7515fSKim, Milo .vsel_reg = LP8788_DLDO8_VOUT, 292ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 293ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_A, 294ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO8_M, 295ade7515fSKim, Milo }, 296ade7515fSKim, Milo { 297ade7515fSKim, Milo .name = "dldo9", 298ade7515fSKim, Milo .id = DLDO9, 299ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 300ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl), 301ade7515fSKim, Milo .volt_table = lp8788_dldo1239_vtbl, 302ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 303ade7515fSKim, Milo .owner = THIS_MODULE, 304ade7515fSKim, Milo .vsel_reg = LP8788_DLDO9_VOUT, 305ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_5BIT_M, 306ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 307ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO9_M, 308ade7515fSKim, Milo }, 309ade7515fSKim, Milo { 310ade7515fSKim, Milo .name = "dldo10", 311ade7515fSKim, Milo .id = DLDO10, 312ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 313ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 314ade7515fSKim, Milo .volt_table = lp8788_dldo1011_vtbl, 315ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 316ade7515fSKim, Milo .owner = THIS_MODULE, 317ade7515fSKim, Milo .vsel_reg = LP8788_DLDO10_VOUT, 318ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 319ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 320ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO10_M, 321ade7515fSKim, Milo }, 322ade7515fSKim, Milo { 323ade7515fSKim, Milo .name = "dldo11", 324ade7515fSKim, Milo .id = DLDO11, 325ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 326ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl), 327ade7515fSKim, Milo .volt_table = lp8788_dldo1011_vtbl, 328ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 329ade7515fSKim, Milo .owner = THIS_MODULE, 330ade7515fSKim, Milo .vsel_reg = LP8788_DLDO11_VOUT, 331ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 332ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 333ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO11_M, 334ade7515fSKim, Milo }, 335ade7515fSKim, Milo { 336ade7515fSKim, Milo .name = "dldo12", 337ade7515fSKim, Milo .id = DLDO12, 338ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 33974c8cfdaSAxel Lin .n_voltages = 1, 340ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 341ade7515fSKim, Milo .owner = THIS_MODULE, 342ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 343ade7515fSKim, Milo .enable_mask = LP8788_EN_DLDO12_M, 344b5366e5eSAxel Lin .min_uV = 2500000, 345ade7515fSKim, Milo }, 346ade7515fSKim, Milo }; 347ade7515fSKim, Milo 348ade7515fSKim, Milo static struct regulator_desc lp8788_aldo_desc[] = { 349ade7515fSKim, Milo { 350ade7515fSKim, Milo .name = "aldo1", 351ade7515fSKim, Milo .id = ALDO1, 352ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 353ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl), 354ade7515fSKim, Milo .volt_table = lp8788_aldo1_vtbl, 355ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 356ade7515fSKim, Milo .owner = THIS_MODULE, 357ade7515fSKim, Milo .vsel_reg = LP8788_ALDO1_VOUT, 358ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_1BIT_M, 359ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 360ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO1_M, 361ade7515fSKim, Milo }, 362ade7515fSKim, Milo { 363ade7515fSKim, Milo .name = "aldo2", 364ade7515fSKim, Milo .id = ALDO2, 365ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 36674c8cfdaSAxel Lin .n_voltages = 1, 367ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 368ade7515fSKim, Milo .owner = THIS_MODULE, 369ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 370ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO2_M, 371b5366e5eSAxel Lin .min_uV = 2850000, 372ade7515fSKim, Milo }, 373ade7515fSKim, Milo { 374ade7515fSKim, Milo .name = "aldo3", 375ade7515fSKim, Milo .id = ALDO3, 376ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 37774c8cfdaSAxel Lin .n_voltages = 1, 378ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 379ade7515fSKim, Milo .owner = THIS_MODULE, 380ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 381ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO3_M, 382b5366e5eSAxel Lin .min_uV = 2850000, 383ade7515fSKim, Milo }, 384ade7515fSKim, Milo { 385ade7515fSKim, Milo .name = "aldo4", 386ade7515fSKim, Milo .id = ALDO4, 387ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 38874c8cfdaSAxel Lin .n_voltages = 1, 389ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 390ade7515fSKim, Milo .owner = THIS_MODULE, 391ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_B, 392ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO4_M, 393b5366e5eSAxel Lin .min_uV = 2850000, 394ade7515fSKim, Milo }, 395ade7515fSKim, Milo { 396ade7515fSKim, Milo .name = "aldo5", 397ade7515fSKim, Milo .id = ALDO5, 398ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 39974c8cfdaSAxel Lin .n_voltages = 1, 400ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 401ade7515fSKim, Milo .owner = THIS_MODULE, 402ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 403ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO5_M, 404b5366e5eSAxel Lin .min_uV = 2850000, 405ade7515fSKim, Milo }, 406ade7515fSKim, Milo { 407ade7515fSKim, Milo .name = "aldo6", 408ade7515fSKim, Milo .id = ALDO6, 409ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 410ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl), 411ade7515fSKim, Milo .volt_table = lp8788_dldo578_aldo6_vtbl, 412ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 413ade7515fSKim, Milo .owner = THIS_MODULE, 414ade7515fSKim, Milo .vsel_reg = LP8788_ALDO6_VOUT, 415ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_4BIT_M, 416ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 417ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO6_M, 418ade7515fSKim, Milo }, 419ade7515fSKim, Milo { 420ade7515fSKim, Milo .name = "aldo7", 421ade7515fSKim, Milo .id = ALDO7, 422ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_table_ops, 423ade7515fSKim, Milo .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl), 424ade7515fSKim, Milo .volt_table = lp8788_aldo7_vtbl, 425ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 426ade7515fSKim, Milo .owner = THIS_MODULE, 427ade7515fSKim, Milo .vsel_reg = LP8788_ALDO7_VOUT, 428ade7515fSKim, Milo .vsel_mask = LP8788_VOUT_3BIT_M, 429ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 430ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO7_M, 431ade7515fSKim, Milo }, 432ade7515fSKim, Milo { 433ade7515fSKim, Milo .name = "aldo8", 434ade7515fSKim, Milo .id = ALDO8, 435ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 43674c8cfdaSAxel Lin .n_voltages = 1, 437ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 438ade7515fSKim, Milo .owner = THIS_MODULE, 439ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 440ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO8_M, 441b5366e5eSAxel Lin .min_uV = 2500000, 442ade7515fSKim, Milo }, 443ade7515fSKim, Milo { 444ade7515fSKim, Milo .name = "aldo9", 445ade7515fSKim, Milo .id = ALDO9, 446ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 44774c8cfdaSAxel Lin .n_voltages = 1, 448ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 449ade7515fSKim, Milo .owner = THIS_MODULE, 450ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 451ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO9_M, 452b5366e5eSAxel Lin .min_uV = 2500000, 453ade7515fSKim, Milo }, 454ade7515fSKim, Milo { 455ade7515fSKim, Milo .name = "aldo10", 456ade7515fSKim, Milo .id = ALDO10, 457ade7515fSKim, Milo .ops = &lp8788_ldo_voltage_fixed_ops, 45874c8cfdaSAxel Lin .n_voltages = 1, 459ade7515fSKim, Milo .type = REGULATOR_VOLTAGE, 460ade7515fSKim, Milo .owner = THIS_MODULE, 461ade7515fSKim, Milo .enable_reg = LP8788_EN_LDO_C, 462ade7515fSKim, Milo .enable_mask = LP8788_EN_ALDO10_M, 463b5366e5eSAxel Lin .min_uV = 1100000, 464ade7515fSKim, Milo }, 465ade7515fSKim, Milo }; 466ade7515fSKim, Milo 467f02a3917SKim, Milo static int lp8788_config_ldo_enable_mode(struct platform_device *pdev, 468f02a3917SKim, Milo struct lp8788_ldo *ldo, 469ade7515fSKim, Milo enum lp8788_ldo_id id) 470ade7515fSKim, Milo { 471ade7515fSKim, Milo struct lp8788 *lp = ldo->lp; 472ade7515fSKim, Milo struct lp8788_platform_data *pdata = lp->pdata; 473ade7515fSKim, Milo enum lp8788_ext_ldo_en_id enable_id; 474ade7515fSKim, Milo u8 en_mask[] = { 475ade7515fSKim, Milo [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M, 476ade7515fSKim, Milo [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M, 477ade7515fSKim, Milo [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M, 478ade7515fSKim, Milo [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M, 479ade7515fSKim, Milo [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M, 480ade7515fSKim, Milo [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M, 481ade7515fSKim, Milo }; 482ade7515fSKim, Milo 483ade7515fSKim, Milo switch (id) { 484ade7515fSKim, Milo case DLDO7: 485ade7515fSKim, Milo enable_id = EN_DLDO7; 486ade7515fSKim, Milo break; 487ade7515fSKim, Milo case DLDO9: 488ade7515fSKim, Milo case DLDO11: 489ade7515fSKim, Milo enable_id = EN_DLDO911; 490ade7515fSKim, Milo break; 491ade7515fSKim, Milo case ALDO1: 492ade7515fSKim, Milo enable_id = EN_ALDO1; 493ade7515fSKim, Milo break; 494ade7515fSKim, Milo case ALDO2 ... ALDO4: 495ade7515fSKim, Milo enable_id = EN_ALDO234; 496ade7515fSKim, Milo break; 497ade7515fSKim, Milo case ALDO5: 498ade7515fSKim, Milo enable_id = EN_ALDO5; 499ade7515fSKim, Milo break; 500ade7515fSKim, Milo case ALDO7: 501ade7515fSKim, Milo enable_id = EN_ALDO7; 502ade7515fSKim, Milo break; 503ade7515fSKim, Milo default: 504ade7515fSKim, Milo return 0; 505ade7515fSKim, Milo } 506ade7515fSKim, Milo 507ade7515fSKim, Milo /* if no platform data for ldo pin, then set default enable mode */ 508ade7515fSKim, Milo if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id]) 509ade7515fSKim, Milo goto set_default_ldo_enable_mode; 510ade7515fSKim, Milo 511ade7515fSKim, Milo ldo->en_pin = pdata->ldo_pin[enable_id]; 512407945fdSKim, Milo return 0; 513ade7515fSKim, Milo 514ade7515fSKim, Milo set_default_ldo_enable_mode: 51540b5aa8fSAxel Lin return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0); 516ade7515fSKim, Milo } 517ade7515fSKim, Milo 518a5023574SBill Pemberton static int lp8788_dldo_probe(struct platform_device *pdev) 519ade7515fSKim, Milo { 520ade7515fSKim, Milo struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 521ade7515fSKim, Milo int id = pdev->id; 522ade7515fSKim, Milo struct lp8788_ldo *ldo; 523ade7515fSKim, Milo struct regulator_config cfg = { }; 524ade7515fSKim, Milo struct regulator_dev *rdev; 525ade7515fSKim, Milo int ret; 526ade7515fSKim, Milo 527939e88f0SKim, Milo ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 528ade7515fSKim, Milo if (!ldo) 529ade7515fSKim, Milo return -ENOMEM; 530ade7515fSKim, Milo 531ade7515fSKim, Milo ldo->lp = lp; 53280abd60dSAxel Lin ret = lp8788_config_ldo_enable_mode(pdev, ldo, id); 533ade7515fSKim, Milo if (ret) 534ade7515fSKim, Milo return ret; 535ade7515fSKim, Milo 536407945fdSKim, Milo if (ldo->en_pin) { 537407945fdSKim, Milo cfg.ena_gpio = ldo->en_pin->gpio; 538407945fdSKim, Milo cfg.ena_gpio_flags = ldo->en_pin->init_state; 539407945fdSKim, Milo } 540407945fdSKim, Milo 541939e88f0SKim, Milo cfg.dev = pdev->dev.parent; 542ade7515fSKim, Milo cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL; 543ade7515fSKim, Milo cfg.driver_data = ldo; 544ade7515fSKim, Milo cfg.regmap = lp->regmap; 545ade7515fSKim, Milo 5460b7bb090SJingoo Han rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg); 547ade7515fSKim, Milo if (IS_ERR(rdev)) { 548ade7515fSKim, Milo ret = PTR_ERR(rdev); 549939e88f0SKim, Milo dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n", 550ade7515fSKim, Milo id + 1, ret); 551ade7515fSKim, Milo return ret; 552ade7515fSKim, Milo } 553ade7515fSKim, Milo 554ade7515fSKim, Milo ldo->regulator = rdev; 555ade7515fSKim, Milo platform_set_drvdata(pdev, ldo); 556ade7515fSKim, Milo 557ade7515fSKim, Milo return 0; 558ade7515fSKim, Milo } 559ade7515fSKim, Milo 560ade7515fSKim, Milo static struct platform_driver lp8788_dldo_driver = { 561ade7515fSKim, Milo .probe = lp8788_dldo_probe, 562ade7515fSKim, Milo .driver = { 563ade7515fSKim, Milo .name = LP8788_DEV_DLDO, 564ade7515fSKim, Milo }, 565ade7515fSKim, Milo }; 566ade7515fSKim, Milo 567a5023574SBill Pemberton static int lp8788_aldo_probe(struct platform_device *pdev) 568ade7515fSKim, Milo { 569ade7515fSKim, Milo struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent); 570ade7515fSKim, Milo int id = pdev->id; 571ade7515fSKim, Milo struct lp8788_ldo *ldo; 572ade7515fSKim, Milo struct regulator_config cfg = { }; 573ade7515fSKim, Milo struct regulator_dev *rdev; 574ade7515fSKim, Milo int ret; 575ade7515fSKim, Milo 576939e88f0SKim, Milo ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL); 577ade7515fSKim, Milo if (!ldo) 578ade7515fSKim, Milo return -ENOMEM; 579ade7515fSKim, Milo 580ade7515fSKim, Milo ldo->lp = lp; 58180abd60dSAxel Lin ret = lp8788_config_ldo_enable_mode(pdev, ldo, id + ALDO1); 582ade7515fSKim, Milo if (ret) 583ade7515fSKim, Milo return ret; 584ade7515fSKim, Milo 585407945fdSKim, Milo if (ldo->en_pin) { 586407945fdSKim, Milo cfg.ena_gpio = ldo->en_pin->gpio; 587407945fdSKim, Milo cfg.ena_gpio_flags = ldo->en_pin->init_state; 588407945fdSKim, Milo } 589407945fdSKim, Milo 590939e88f0SKim, Milo cfg.dev = pdev->dev.parent; 591ade7515fSKim, Milo cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL; 592ade7515fSKim, Milo cfg.driver_data = ldo; 593ade7515fSKim, Milo cfg.regmap = lp->regmap; 594ade7515fSKim, Milo 5950b7bb090SJingoo Han rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg); 596ade7515fSKim, Milo if (IS_ERR(rdev)) { 597ade7515fSKim, Milo ret = PTR_ERR(rdev); 598939e88f0SKim, Milo dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n", 599ade7515fSKim, Milo id + 1, ret); 600ade7515fSKim, Milo return ret; 601ade7515fSKim, Milo } 602ade7515fSKim, Milo 603ade7515fSKim, Milo ldo->regulator = rdev; 604ade7515fSKim, Milo platform_set_drvdata(pdev, ldo); 605ade7515fSKim, Milo 606ade7515fSKim, Milo return 0; 607ade7515fSKim, Milo } 608ade7515fSKim, Milo 609ade7515fSKim, Milo static struct platform_driver lp8788_aldo_driver = { 610ade7515fSKim, Milo .probe = lp8788_aldo_probe, 611ade7515fSKim, Milo .driver = { 612ade7515fSKim, Milo .name = LP8788_DEV_ALDO, 613ade7515fSKim, Milo }, 614ade7515fSKim, Milo }; 615ade7515fSKim, Milo 6167629cef1SThierry Reding static struct platform_driver * const drivers[] = { 6177629cef1SThierry Reding &lp8788_dldo_driver, 6187629cef1SThierry Reding &lp8788_aldo_driver, 6197629cef1SThierry Reding }; 6207629cef1SThierry Reding 621ade7515fSKim, Milo static int __init lp8788_ldo_init(void) 622ade7515fSKim, Milo { 6237629cef1SThierry Reding return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); 624ade7515fSKim, Milo } 625ade7515fSKim, Milo subsys_initcall(lp8788_ldo_init); 626ade7515fSKim, Milo 627ade7515fSKim, Milo static void __exit lp8788_ldo_exit(void) 628ade7515fSKim, Milo { 6297629cef1SThierry Reding platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); 630ade7515fSKim, Milo } 631ade7515fSKim, Milo module_exit(lp8788_ldo_exit); 632ade7515fSKim, Milo 633ade7515fSKim, Milo MODULE_DESCRIPTION("TI LP8788 LDO Driver"); 634ade7515fSKim, Milo MODULE_AUTHOR("Milo Kim"); 635ade7515fSKim, Milo MODULE_LICENSE("GPL"); 636ade7515fSKim, Milo MODULE_ALIAS("platform:lp8788-dldo"); 637ade7515fSKim, Milo MODULE_ALIAS("platform:lp8788-aldo"); 638