1 /* 2 * Regulator driver for National Semiconductors LP3972 PMIC chip 3 * 4 * Based on lp3971.c 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 12 #include <linux/bug.h> 13 #include <linux/err.h> 14 #include <linux/i2c.h> 15 #include <linux/kernel.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/lp3972.h> 18 #include <linux/slab.h> 19 20 struct lp3972 { 21 struct device *dev; 22 struct mutex io_lock; 23 struct i2c_client *i2c; 24 int num_regulators; 25 struct regulator_dev **rdev; 26 }; 27 28 /* LP3972 Control Registers */ 29 #define LP3972_SCR_REG 0x07 30 #define LP3972_OVER1_REG 0x10 31 #define LP3972_OVSR1_REG 0x11 32 #define LP3972_OVER2_REG 0x12 33 #define LP3972_OVSR2_REG 0x13 34 #define LP3972_VCC1_REG 0x20 35 #define LP3972_ADTV1_REG 0x23 36 #define LP3972_ADTV2_REG 0x24 37 #define LP3972_AVRC_REG 0x25 38 #define LP3972_CDTC1_REG 0x26 39 #define LP3972_CDTC2_REG 0x27 40 #define LP3972_SDTV1_REG 0x29 41 #define LP3972_SDTV2_REG 0x2A 42 #define LP3972_MDTV1_REG 0x32 43 #define LP3972_MDTV2_REG 0x33 44 #define LP3972_L2VCR_REG 0x39 45 #define LP3972_L34VCR_REG 0x3A 46 #define LP3972_SCR1_REG 0x80 47 #define LP3972_SCR2_REG 0x81 48 #define LP3972_OEN3_REG 0x82 49 #define LP3972_OSR3_REG 0x83 50 #define LP3972_LOER4_REG 0x84 51 #define LP3972_B2TV_REG 0x85 52 #define LP3972_B3TV_REG 0x86 53 #define LP3972_B32RC_REG 0x87 54 #define LP3972_ISRA_REG 0x88 55 #define LP3972_BCCR_REG 0x89 56 #define LP3972_II1RR_REG 0x8E 57 #define LP3972_II2RR_REG 0x8F 58 59 #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG 60 /* System control register 1 initial value, 61 * bits 5, 6 and 7 are EPROM programmable */ 62 #define SYS_CONTROL1_INIT_VAL 0x02 63 #define SYS_CONTROL1_INIT_MASK 0x1F 64 65 #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG 66 #define LP3972_VOL_CHANGE_FLAG_GO 0x01 67 #define LP3972_VOL_CHANGE_FLAG_MASK 0x03 68 69 /* LDO output enable mask */ 70 #define LP3972_OEN3_L1EN BIT(0) 71 #define LP3972_OVER2_LDO2_EN BIT(2) 72 #define LP3972_OVER2_LDO3_EN BIT(3) 73 #define LP3972_OVER2_LDO4_EN BIT(4) 74 #define LP3972_OVER1_S_EN BIT(2) 75 76 static const int ldo1_voltage_map[] = { 77 1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875, 78 1900, 1925, 1950, 1975, 2000, 79 }; 80 81 static const int ldo23_voltage_map[] = { 82 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 83 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300, 84 }; 85 86 static const int ldo4_voltage_map[] = { 87 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350, 88 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300, 89 }; 90 91 static const int ldo5_voltage_map[] = { 92 0, 0, 0, 0, 0, 850, 875, 900, 93 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 94 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300, 95 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500, 96 }; 97 98 static const int buck1_voltage_map[] = { 99 725, 750, 775, 800, 825, 850, 875, 900, 100 925, 950, 975, 1000, 1025, 1050, 1075, 1100, 101 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300, 102 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500, 103 }; 104 105 static const int buck23_voltage_map[] = { 106 0, 800, 850, 900, 950, 1000, 1050, 1100, 107 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500, 108 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800, 109 3000, 3300, 110 }; 111 112 static const int *ldo_voltage_map[] = { 113 ldo1_voltage_map, 114 ldo23_voltage_map, 115 ldo23_voltage_map, 116 ldo4_voltage_map, 117 ldo5_voltage_map, 118 }; 119 120 static const int *buck_voltage_map[] = { 121 buck1_voltage_map, 122 buck23_voltage_map, 123 buck23_voltage_map, 124 }; 125 126 static const int ldo_output_enable_mask[] = { 127 LP3972_OEN3_L1EN, 128 LP3972_OVER2_LDO2_EN, 129 LP3972_OVER2_LDO3_EN, 130 LP3972_OVER2_LDO4_EN, 131 LP3972_OVER1_S_EN, 132 }; 133 134 static const int ldo_output_enable_addr[] = { 135 LP3972_OEN3_REG, 136 LP3972_OVER2_REG, 137 LP3972_OVER2_REG, 138 LP3972_OVER2_REG, 139 LP3972_OVER1_REG, 140 }; 141 142 static const int ldo_vol_ctl_addr[] = { 143 LP3972_MDTV1_REG, 144 LP3972_L2VCR_REG, 145 LP3972_L34VCR_REG, 146 LP3972_L34VCR_REG, 147 LP3972_SDTV1_REG, 148 }; 149 150 static const int buck_vol_enable_addr[] = { 151 LP3972_OVER1_REG, 152 LP3972_OEN3_REG, 153 LP3972_OEN3_REG, 154 }; 155 156 static const int buck_base_addr[] = { 157 LP3972_ADTV1_REG, 158 LP3972_B2TV_REG, 159 LP3972_B3TV_REG, 160 }; 161 162 #define LP3972_LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[x]) 163 #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x]) 164 #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x]) 165 166 /* LDO voltage control registers shift: 167 LP3972_LDO1 -> 0, LP3972_LDO2 -> 4 168 LP3972_LDO3 -> 0, LP3972_LDO4 -> 4 169 LP3972_LDO5 -> 0 170 */ 171 #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2) 172 #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x]) 173 #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6) 174 175 #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f) 176 #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00) 177 #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c) 178 179 #define LP3972_BUCK_VOL_VALUE_MAP(x) (buck_voltage_map[x]) 180 #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x]) 181 #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x]) 182 #define LP3972_BUCK_VOL_MASK 0x1f 183 #define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00) 184 #define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f) 185 186 static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count, 187 u16 *dest) 188 { 189 int ret; 190 191 if (count != 1) 192 return -EIO; 193 ret = i2c_smbus_read_byte_data(i2c, reg); 194 if (ret < 0) 195 return ret; 196 197 *dest = ret; 198 return 0; 199 } 200 201 static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count, 202 const u16 *src) 203 { 204 if (count != 1) 205 return -EIO; 206 return i2c_smbus_write_byte_data(i2c, reg, *src); 207 } 208 209 static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg) 210 { 211 u16 val = 0; 212 213 mutex_lock(&lp3972->io_lock); 214 215 lp3972_i2c_read(lp3972->i2c, reg, 1, &val); 216 217 dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, 218 (unsigned)val & 0xff); 219 220 mutex_unlock(&lp3972->io_lock); 221 222 return val & 0xff; 223 } 224 225 static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) 226 { 227 u16 tmp; 228 int ret; 229 230 mutex_lock(&lp3972->io_lock); 231 232 ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp); 233 tmp = (tmp & ~mask) | val; 234 if (ret == 0) { 235 ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp); 236 dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, 237 (unsigned)val & 0xff); 238 } 239 mutex_unlock(&lp3972->io_lock); 240 241 return ret; 242 } 243 244 static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index) 245 { 246 int ldo = rdev_get_id(dev) - LP3972_LDO1; 247 return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index]; 248 } 249 250 static int lp3972_ldo_is_enabled(struct regulator_dev *dev) 251 { 252 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 253 int ldo = rdev_get_id(dev) - LP3972_LDO1; 254 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); 255 u16 val; 256 257 val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo)); 258 return !!(val & mask); 259 } 260 261 static int lp3972_ldo_enable(struct regulator_dev *dev) 262 { 263 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 264 int ldo = rdev_get_id(dev) - LP3972_LDO1; 265 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); 266 267 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), 268 mask, mask); 269 } 270 271 static int lp3972_ldo_disable(struct regulator_dev *dev) 272 { 273 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 274 int ldo = rdev_get_id(dev) - LP3972_LDO1; 275 u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); 276 277 return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), 278 mask, 0); 279 } 280 281 static int lp3972_ldo_get_voltage(struct regulator_dev *dev) 282 { 283 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 284 int ldo = rdev_get_id(dev) - LP3972_LDO1; 285 u16 mask = LP3972_LDO_VOL_MASK(ldo); 286 u16 val, reg; 287 288 reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo)); 289 val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask; 290 291 return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val]; 292 } 293 294 static int lp3972_ldo_set_voltage(struct regulator_dev *dev, 295 int min_uV, int max_uV) 296 { 297 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 298 int ldo = rdev_get_id(dev) - LP3972_LDO1; 299 int min_vol = min_uV / 1000, max_vol = max_uV / 1000; 300 const int *vol_map = LP3972_LDO_VOL_VALUE_MAP(ldo); 301 u16 val; 302 int shift, ret; 303 304 if (min_vol < vol_map[LP3972_LDO_VOL_MIN_IDX(ldo)] || 305 min_vol > vol_map[LP3972_LDO_VOL_MAX_IDX(ldo)]) 306 return -EINVAL; 307 308 for (val = LP3972_LDO_VOL_MIN_IDX(ldo); 309 val <= LP3972_LDO_VOL_MAX_IDX(ldo); val++) 310 if (vol_map[val] >= min_vol) 311 break; 312 313 if (val > LP3972_LDO_VOL_MAX_IDX(ldo) || vol_map[val] > max_vol) 314 return -EINVAL; 315 316 shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo); 317 ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo), 318 LP3972_LDO_VOL_MASK(ldo) << shift, val << shift); 319 320 if (ret) 321 return ret; 322 323 /* 324 * LDO1 and LDO5 support voltage control by either target voltage1 325 * or target voltage2 register. 326 * We use target voltage1 register for LDO1 and LDO5 in this driver. 327 * We need to update voltage change control register(0x20) to enable 328 * LDO1 and LDO5 to change to their programmed target values. 329 */ 330 switch (ldo) { 331 case LP3972_LDO1: 332 case LP3972_LDO5: 333 shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo); 334 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, 335 LP3972_VOL_CHANGE_FLAG_MASK << shift, 336 LP3972_VOL_CHANGE_FLAG_GO << shift); 337 if (ret) 338 return ret; 339 340 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, 341 LP3972_VOL_CHANGE_FLAG_MASK << shift, 0); 342 break; 343 } 344 345 return ret; 346 } 347 348 static struct regulator_ops lp3972_ldo_ops = { 349 .list_voltage = lp3972_ldo_list_voltage, 350 .is_enabled = lp3972_ldo_is_enabled, 351 .enable = lp3972_ldo_enable, 352 .disable = lp3972_ldo_disable, 353 .get_voltage = lp3972_ldo_get_voltage, 354 .set_voltage = lp3972_ldo_set_voltage, 355 }; 356 357 static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index) 358 { 359 int buck = rdev_get_id(dev) - LP3972_DCDC1; 360 return 1000 * buck_voltage_map[buck][index]; 361 } 362 363 static int lp3972_dcdc_is_enabled(struct regulator_dev *dev) 364 { 365 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 366 int buck = rdev_get_id(dev) - LP3972_DCDC1; 367 u16 mask = 1 << (buck * 2); 368 u16 val; 369 370 val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck)); 371 return !!(val & mask); 372 } 373 374 static int lp3972_dcdc_enable(struct regulator_dev *dev) 375 { 376 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 377 int buck = rdev_get_id(dev) - LP3972_DCDC1; 378 u16 mask = 1 << (buck * 2); 379 u16 val; 380 381 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), 382 mask, mask); 383 return val; 384 } 385 386 static int lp3972_dcdc_disable(struct regulator_dev *dev) 387 { 388 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 389 int buck = rdev_get_id(dev) - LP3972_DCDC1; 390 u16 mask = 1 << (buck * 2); 391 u16 val; 392 393 val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), 394 mask, 0); 395 return val; 396 } 397 398 static int lp3972_dcdc_get_voltage(struct regulator_dev *dev) 399 { 400 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 401 int buck = rdev_get_id(dev) - LP3972_DCDC1; 402 u16 reg; 403 int val; 404 405 reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck)); 406 reg &= LP3972_BUCK_VOL_MASK; 407 if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck)) 408 val = 1000 * buck_voltage_map[buck][reg]; 409 else { 410 val = 0; 411 dev_warn(&dev->dev, "chip reported incorrect voltage value." 412 " reg = %d\n", reg); 413 } 414 415 return val; 416 } 417 418 static int lp3972_dcdc_set_voltage(struct regulator_dev *dev, 419 int min_uV, int max_uV) 420 { 421 struct lp3972 *lp3972 = rdev_get_drvdata(dev); 422 int buck = rdev_get_id(dev) - LP3972_DCDC1; 423 int min_vol = min_uV / 1000, max_vol = max_uV / 1000; 424 const int *vol_map = buck_voltage_map[buck]; 425 u16 val; 426 int ret; 427 428 if (min_vol < vol_map[LP3972_BUCK_VOL_MIN_IDX(buck)] || 429 min_vol > vol_map[LP3972_BUCK_VOL_MAX_IDX(buck)]) 430 return -EINVAL; 431 432 for (val = LP3972_BUCK_VOL_MIN_IDX(buck); 433 val <= LP3972_BUCK_VOL_MAX_IDX(buck); val++) 434 if (vol_map[val] >= min_vol) 435 break; 436 437 if (val > LP3972_BUCK_VOL_MAX_IDX(buck) || 438 vol_map[val] > max_vol) 439 return -EINVAL; 440 441 ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck), 442 LP3972_BUCK_VOL_MASK, val); 443 if (ret) 444 return ret; 445 446 if (buck != 0) 447 return ret; 448 449 ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, 450 LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO); 451 if (ret) 452 return ret; 453 454 return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, 455 LP3972_VOL_CHANGE_FLAG_MASK, 0); 456 } 457 458 static struct regulator_ops lp3972_dcdc_ops = { 459 .list_voltage = lp3972_dcdc_list_voltage, 460 .is_enabled = lp3972_dcdc_is_enabled, 461 .enable = lp3972_dcdc_enable, 462 .disable = lp3972_dcdc_disable, 463 .get_voltage = lp3972_dcdc_get_voltage, 464 .set_voltage = lp3972_dcdc_set_voltage, 465 }; 466 467 static struct regulator_desc regulators[] = { 468 { 469 .name = "LDO1", 470 .id = LP3972_LDO1, 471 .ops = &lp3972_ldo_ops, 472 .n_voltages = ARRAY_SIZE(ldo1_voltage_map), 473 .type = REGULATOR_VOLTAGE, 474 .owner = THIS_MODULE, 475 }, 476 { 477 .name = "LDO2", 478 .id = LP3972_LDO2, 479 .ops = &lp3972_ldo_ops, 480 .n_voltages = ARRAY_SIZE(ldo23_voltage_map), 481 .type = REGULATOR_VOLTAGE, 482 .owner = THIS_MODULE, 483 }, 484 { 485 .name = "LDO3", 486 .id = LP3972_LDO3, 487 .ops = &lp3972_ldo_ops, 488 .n_voltages = ARRAY_SIZE(ldo23_voltage_map), 489 .type = REGULATOR_VOLTAGE, 490 .owner = THIS_MODULE, 491 }, 492 { 493 .name = "LDO4", 494 .id = LP3972_LDO4, 495 .ops = &lp3972_ldo_ops, 496 .n_voltages = ARRAY_SIZE(ldo4_voltage_map), 497 .type = REGULATOR_VOLTAGE, 498 .owner = THIS_MODULE, 499 }, 500 { 501 .name = "LDO5", 502 .id = LP3972_LDO5, 503 .ops = &lp3972_ldo_ops, 504 .n_voltages = ARRAY_SIZE(ldo5_voltage_map), 505 .type = REGULATOR_VOLTAGE, 506 .owner = THIS_MODULE, 507 }, 508 { 509 .name = "DCDC1", 510 .id = LP3972_DCDC1, 511 .ops = &lp3972_dcdc_ops, 512 .n_voltages = ARRAY_SIZE(buck1_voltage_map), 513 .type = REGULATOR_VOLTAGE, 514 .owner = THIS_MODULE, 515 }, 516 { 517 .name = "DCDC2", 518 .id = LP3972_DCDC2, 519 .ops = &lp3972_dcdc_ops, 520 .n_voltages = ARRAY_SIZE(buck23_voltage_map), 521 .type = REGULATOR_VOLTAGE, 522 .owner = THIS_MODULE, 523 }, 524 { 525 .name = "DCDC3", 526 .id = LP3972_DCDC3, 527 .ops = &lp3972_dcdc_ops, 528 .n_voltages = ARRAY_SIZE(buck23_voltage_map), 529 .type = REGULATOR_VOLTAGE, 530 .owner = THIS_MODULE, 531 }, 532 }; 533 534 static int __devinit setup_regulators(struct lp3972 *lp3972, 535 struct lp3972_platform_data *pdata) 536 { 537 int i, err; 538 539 lp3972->num_regulators = pdata->num_regulators; 540 lp3972->rdev = kcalloc(pdata->num_regulators, 541 sizeof(struct regulator_dev *), GFP_KERNEL); 542 if (!lp3972->rdev) { 543 err = -ENOMEM; 544 goto err_nomem; 545 } 546 547 /* Instantiate the regulators */ 548 for (i = 0; i < pdata->num_regulators; i++) { 549 struct lp3972_regulator_subdev *reg = &pdata->regulators[i]; 550 lp3972->rdev[i] = regulator_register(®ulators[reg->id], 551 lp3972->dev, reg->initdata, lp3972); 552 553 if (IS_ERR(lp3972->rdev[i])) { 554 err = PTR_ERR(lp3972->rdev[i]); 555 dev_err(lp3972->dev, "regulator init failed: %d\n", 556 err); 557 goto error; 558 } 559 } 560 561 return 0; 562 error: 563 while (--i >= 0) 564 regulator_unregister(lp3972->rdev[i]); 565 kfree(lp3972->rdev); 566 lp3972->rdev = NULL; 567 err_nomem: 568 return err; 569 } 570 571 static int __devinit lp3972_i2c_probe(struct i2c_client *i2c, 572 const struct i2c_device_id *id) 573 { 574 struct lp3972 *lp3972; 575 struct lp3972_platform_data *pdata = i2c->dev.platform_data; 576 int ret; 577 u16 val; 578 579 if (!pdata) { 580 dev_dbg(&i2c->dev, "No platform init data supplied\n"); 581 return -ENODEV; 582 } 583 584 lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL); 585 if (!lp3972) 586 return -ENOMEM; 587 588 lp3972->i2c = i2c; 589 lp3972->dev = &i2c->dev; 590 591 mutex_init(&lp3972->io_lock); 592 593 /* Detect LP3972 */ 594 ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val); 595 if (ret == 0 && 596 (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) { 597 ret = -ENODEV; 598 dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val); 599 } 600 if (ret < 0) { 601 dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret); 602 goto err_detect; 603 } 604 605 ret = setup_regulators(lp3972, pdata); 606 if (ret < 0) 607 goto err_detect; 608 609 i2c_set_clientdata(i2c, lp3972); 610 return 0; 611 612 err_detect: 613 kfree(lp3972); 614 return ret; 615 } 616 617 static int __devexit lp3972_i2c_remove(struct i2c_client *i2c) 618 { 619 struct lp3972 *lp3972 = i2c_get_clientdata(i2c); 620 int i; 621 622 for (i = 0; i < lp3972->num_regulators; i++) 623 regulator_unregister(lp3972->rdev[i]); 624 kfree(lp3972->rdev); 625 kfree(lp3972); 626 627 return 0; 628 } 629 630 static const struct i2c_device_id lp3972_i2c_id[] = { 631 { "lp3972", 0 }, 632 { } 633 }; 634 MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id); 635 636 static struct i2c_driver lp3972_i2c_driver = { 637 .driver = { 638 .name = "lp3972", 639 .owner = THIS_MODULE, 640 }, 641 .probe = lp3972_i2c_probe, 642 .remove = __devexit_p(lp3972_i2c_remove), 643 .id_table = lp3972_i2c_id, 644 }; 645 646 static int __init lp3972_module_init(void) 647 { 648 return i2c_add_driver(&lp3972_i2c_driver); 649 } 650 subsys_initcall(lp3972_module_init); 651 652 static void __exit lp3972_module_exit(void) 653 { 654 i2c_del_driver(&lp3972_i2c_driver); 655 } 656 module_exit(lp3972_module_exit); 657 658 MODULE_LICENSE("GPL"); 659 MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>"); 660 MODULE_DESCRIPTION("LP3972 PMIC driver"); 661