1 /* 2 * da9211-regulator.h - Regulator definitions for DA9211/DA9212 3 * /DA9213/DA9214/DA9215 4 * Copyright (C) 2015 Dialog Semiconductor Ltd. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #ifndef __DA9211_REGISTERS_H__ 18 #define __DA9211_REGISTERS_H__ 19 20 /* Page selection */ 21 #define DA9211_REG_PAGE_CON 0x00 22 23 /* System Control and Event Registers */ 24 #define DA9211_REG_STATUS_A 0x50 25 #define DA9211_REG_STATUS_B 0x51 26 #define DA9211_REG_EVENT_A 0x52 27 #define DA9211_REG_EVENT_B 0x53 28 #define DA9211_REG_MASK_A 0x54 29 #define DA9211_REG_MASK_B 0x55 30 #define DA9211_REG_CONTROL_A 0x56 31 32 /* GPIO Control Registers */ 33 #define DA9211_REG_GPIO_0_1 0x58 34 #define DA9211_REG_GPIO_2_3 0x59 35 #define DA9211_REG_GPIO_4 0x5A 36 37 /* Regulator Registers */ 38 #define DA9211_REG_BUCKA_CONT 0x5D 39 #define DA9211_REG_BUCKB_CONT 0x5E 40 #define DA9211_REG_BUCK_ILIM 0xD0 41 #define DA9211_REG_BUCKA_CONF 0xD1 42 #define DA9211_REG_BUCKB_CONF 0xD2 43 #define DA9211_REG_BUCK_CONF 0xD3 44 #define DA9211_REG_VBACKA_MAX 0xD5 45 #define DA9211_REG_VBACKB_MAX 0xD6 46 #define DA9211_REG_VBUCKA_A 0xD7 47 #define DA9211_REG_VBUCKA_B 0xD8 48 #define DA9211_REG_VBUCKB_A 0xD9 49 #define DA9211_REG_VBUCKB_B 0xDA 50 51 /* I2C Interface Settings */ 52 #define DA9211_REG_INTERFACE 0x105 53 54 /* BUCK Phase Selection*/ 55 #define DA9211_REG_CONFIG_E 0x147 56 57 /* Device ID */ 58 #define DA9211_REG_DEVICE_ID 0x201 59 60 /* 61 * Registers bits 62 */ 63 /* DA9211_REG_PAGE_CON (addr=0x00) */ 64 #define DA9211_REG_PAGE_SHIFT 1 65 #define DA9211_REG_PAGE_MASK 0x06 66 /* On I2C registers 0x00 - 0xFF */ 67 #define DA9211_REG_PAGE0 0 68 /* On I2C registers 0x100 - 0x1FF */ 69 #define DA9211_REG_PAGE2 2 70 #define DA9211_PAGE_WRITE_MODE 0x00 71 #define DA9211_REPEAT_WRITE_MODE 0x40 72 #define DA9211_PAGE_REVERT 0x80 73 74 /* DA9211_REG_STATUS_A (addr=0x50) */ 75 #define DA9211_GPI0 0x01 76 #define DA9211_GPI1 0x02 77 #define DA9211_GPI2 0x04 78 #define DA9211_GPI3 0x08 79 #define DA9211_GPI4 0x10 80 81 /* DA9211_REG_EVENT_A (addr=0x52) */ 82 #define DA9211_E_GPI0 0x01 83 #define DA9211_E_GPI1 0x02 84 #define DA9211_E_GPI2 0x04 85 #define DA9211_E_GPI3 0x08 86 #define DA9211_E_GPI4 0x10 87 #define DA9211_E_UVLO_IO 0x40 88 89 /* DA9211_REG_EVENT_B (addr=0x53) */ 90 #define DA9211_E_PWRGOOD_A 0x01 91 #define DA9211_E_PWRGOOD_B 0x02 92 #define DA9211_E_TEMP_WARN 0x04 93 #define DA9211_E_TEMP_CRIT 0x08 94 #define DA9211_E_OV_CURR_A 0x10 95 #define DA9211_E_OV_CURR_B 0x20 96 97 /* DA9211_REG_MASK_A (addr=0x54) */ 98 #define DA9211_M_GPI0 0x01 99 #define DA9211_M_GPI1 0x02 100 #define DA9211_M_GPI2 0x04 101 #define DA9211_M_GPI3 0x08 102 #define DA9211_M_GPI4 0x10 103 #define DA9211_M_UVLO_IO 0x40 104 105 /* DA9211_REG_MASK_B (addr=0x55) */ 106 #define DA9211_M_PWRGOOD_A 0x01 107 #define DA9211_M_PWRGOOD_B 0x02 108 #define DA9211_M_TEMP_WARN 0x04 109 #define DA9211_M_TEMP_CRIT 0x08 110 #define DA9211_M_OV_CURR_A 0x10 111 #define DA9211_M_OV_CURR_B 0x20 112 113 /* DA9211_REG_CONTROL_A (addr=0x56) */ 114 #define DA9211_DEBOUNCING_SHIFT 0 115 #define DA9211_DEBOUNCING_MASK 0x07 116 #define DA9211_SLEW_RATE_SHIFT 3 117 #define DA9211_SLEW_RATE_A_MASK 0x18 118 #define DA9211_SLEW_RATE_B_SHIFT 5 119 #define DA9211_SLEW_RATE_B_MASK 0x60 120 #define DA9211_V_LOCK 0x80 121 122 /* DA9211_REG_GPIO_0_1 (addr=0x58) */ 123 #define DA9211_GPIO0_PIN_SHIFT 0 124 #define DA9211_GPIO0_PIN_MASK 0x03 125 #define DA9211_GPIO0_PIN_GPI 0x00 126 #define DA9211_GPIO0_PIN_GPO_OD 0x02 127 #define DA9211_GPIO0_PIN_GPO 0x03 128 #define DA9211_GPIO0_TYPE 0x04 129 #define DA9211_GPIO0_TYPE_GPI 0x00 130 #define DA9211_GPIO0_TYPE_GPO 0x04 131 #define DA9211_GPIO0_MODE 0x08 132 #define DA9211_GPIO1_PIN_SHIFT 4 133 #define DA9211_GPIO1_PIN_MASK 0x30 134 #define DA9211_GPIO1_PIN_GPI 0x00 135 #define DA9211_GPIO1_PIN_VERROR 0x10 136 #define DA9211_GPIO1_PIN_GPO_OD 0x20 137 #define DA9211_GPIO1_PIN_GPO 0x30 138 #define DA9211_GPIO1_TYPE_SHIFT 0x40 139 #define DA9211_GPIO1_TYPE_GPI 0x00 140 #define DA9211_GPIO1_TYPE_GPO 0x40 141 #define DA9211_GPIO1_MODE 0x80 142 143 /* DA9211_REG_GPIO_2_3 (addr=0x59) */ 144 #define DA9211_GPIO2_PIN_SHIFT 0 145 #define DA9211_GPIO2_PIN_MASK 0x03 146 #define DA9211_GPIO2_PIN_GPI 0x00 147 #define DA9211_GPIO5_PIN_BUCK_CLK 0x10 148 #define DA9211_GPIO2_PIN_GPO_OD 0x02 149 #define DA9211_GPIO2_PIN_GPO 0x03 150 #define DA9211_GPIO2_TYPE 0x04 151 #define DA9211_GPIO2_TYPE_GPI 0x00 152 #define DA9211_GPIO2_TYPE_GPO 0x04 153 #define DA9211_GPIO2_MODE 0x08 154 #define DA9211_GPIO3_PIN_SHIFT 4 155 #define DA9211_GPIO3_PIN_MASK 0x30 156 #define DA9211_GPIO3_PIN_GPI 0x00 157 #define DA9211_GPIO3_PIN_IERROR 0x10 158 #define DA9211_GPIO3_PIN_GPO_OD 0x20 159 #define DA9211_GPIO3_PIN_GPO 0x30 160 #define DA9211_GPIO3_TYPE_SHIFT 0x40 161 #define DA9211_GPIO3_TYPE_GPI 0x00 162 #define DA9211_GPIO3_TYPE_GPO 0x40 163 #define DA9211_GPIO3_MODE 0x80 164 165 /* DA9211_REG_GPIO_4 (addr=0x5A) */ 166 #define DA9211_GPIO4_PIN_SHIFT 0 167 #define DA9211_GPIO4_PIN_MASK 0x03 168 #define DA9211_GPIO4_PIN_GPI 0x00 169 #define DA9211_GPIO4_PIN_GPO_OD 0x02 170 #define DA9211_GPIO4_PIN_GPO 0x03 171 #define DA9211_GPIO4_TYPE 0x04 172 #define DA9211_GPIO4_TYPE_GPI 0x00 173 #define DA9211_GPIO4_TYPE_GPO 0x04 174 #define DA9211_GPIO4_MODE 0x08 175 176 /* DA9211_REG_BUCKA_CONT (addr=0x5D) */ 177 #define DA9211_BUCKA_EN 0x01 178 #define DA9211_BUCKA_GPI_SHIFT 1 179 #define DA9211_BUCKA_GPI_MASK 0x06 180 #define DA9211_BUCKA_GPI_OFF 0x00 181 #define DA9211_BUCKA_GPI_GPIO0 0x02 182 #define DA9211_BUCKA_GPI_GPIO1 0x04 183 #define DA9211_BUCKA_GPI_GPIO3 0x06 184 #define DA9211_BUCKA_PD_DIS 0x08 185 #define DA9211_VBUCKA_SEL 0x10 186 #define DA9211_VBUCKA_SEL_A 0x00 187 #define DA9211_VBUCKA_SEL_B 0x10 188 #define DA9211_VBUCKA_GPI_SHIFT 5 189 #define DA9211_VBUCKA_GPI_MASK 0x60 190 #define DA9211_VBUCKA_GPI_OFF 0x00 191 #define DA9211_VBUCKA_GPI_GPIO1 0x20 192 #define DA9211_VBUCKA_GPI_GPIO2 0x40 193 #define DA9211_VBUCKA_GPI_GPIO4 0x60 194 195 /* DA9211_REG_BUCKB_CONT (addr=0x5E) */ 196 #define DA9211_BUCKB_EN 0x01 197 #define DA9211_BUCKB_GPI_SHIFT 1 198 #define DA9211_BUCKB_GPI_MASK 0x06 199 #define DA9211_BUCKB_GPI_OFF 0x00 200 #define DA9211_BUCKB_GPI_GPIO0 0x02 201 #define DA9211_BUCKB_GPI_GPIO1 0x04 202 #define DA9211_BUCKB_GPI_GPIO3 0x06 203 #define DA9211_BUCKB_PD_DIS 0x08 204 #define DA9211_VBUCKB_SEL 0x10 205 #define DA9211_VBUCKB_SEL_A 0x00 206 #define DA9211_VBUCKB_SEL_B 0x10 207 #define DA9211_VBUCKB_GPI_SHIFT 5 208 #define DA9211_VBUCKB_GPI_MASK 0x60 209 #define DA9211_VBUCKB_GPI_OFF 0x00 210 #define DA9211_VBUCKB_GPI_GPIO1 0x20 211 #define DA9211_VBUCKB_GPI_GPIO2 0x40 212 #define DA9211_VBUCKB_GPI_GPIO4 0x60 213 214 /* DA9211_REG_BUCK_ILIM (addr=0xD0) */ 215 #define DA9211_BUCKA_ILIM_SHIFT 0 216 #define DA9211_BUCKA_ILIM_MASK 0x0F 217 #define DA9211_BUCKB_ILIM_SHIFT 4 218 #define DA9211_BUCKB_ILIM_MASK 0xF0 219 220 /* DA9211_REG_BUCKA_CONF (addr=0xD1) */ 221 #define DA9211_BUCKA_MODE_SHIFT 0 222 #define DA9211_BUCKA_MODE_MASK 0x03 223 #define DA9211_BUCKA_MODE_MANUAL 0x00 224 #define DA9211_BUCKA_MODE_SLEEP 0x01 225 #define DA9211_BUCKA_MODE_SYNC 0x02 226 #define DA9211_BUCKA_MODE_AUTO 0x03 227 #define DA9211_BUCKA_UP_CTRL_SHIFT 2 228 #define DA9211_BUCKA_UP_CTRL_MASK 0x1C 229 #define DA9211_BUCKA_DOWN_CTRL_SHIFT 5 230 #define DA9211_BUCKA_DOWN_CTRL_MASK 0xE0 231 232 /* DA9211_REG_BUCKB_CONF (addr=0xD2) */ 233 #define DA9211_BUCKB_MODE_SHIFT 0 234 #define DA9211_BUCKB_MODE_MASK 0x03 235 #define DA9211_BUCKB_MODE_MANUAL 0x00 236 #define DA9211_BUCKB_MODE_SLEEP 0x01 237 #define DA9211_BUCKB_MODE_SYNC 0x02 238 #define DA9211_BUCKB_MODE_AUTO 0x03 239 #define DA9211_BUCKB_UP_CTRL_SHIFT 2 240 #define DA9211_BUCKB_UP_CTRL_MASK 0x1C 241 #define DA9211_BUCKB_DOWN_CTRL_SHIFT 5 242 #define DA9211_BUCKB_DOWN_CTRL_MASK 0xE0 243 244 /* DA9211_REG_BUCK_CONF (addr=0xD3) */ 245 #define DA9211_PHASE_SEL_A_SHIFT 0 246 #define DA9211_PHASE_SEL_A_MASK 0x03 247 #define DA9211_PHASE_SEL_B_SHIFT 2 248 #define DA9211_PHASE_SEL_B_MASK 0x04 249 #define DA9211_PH_SH_EN_A_SHIFT 3 250 #define DA9211_PH_SH_EN_A_MASK 0x08 251 #define DA9211_PH_SH_EN_B_SHIFT 4 252 #define DA9211_PH_SH_EN_B_MASK 0x10 253 254 /* DA9211_REG_VBUCKA_MAX (addr=0xD5) */ 255 #define DA9211_VBUCKA_BASE_SHIFT 0 256 #define DA9211_VBUCKA_BASE_MASK 0x7F 257 258 /* DA9211_REG_VBUCKB_MAX (addr=0xD6) */ 259 #define DA9211_VBUCKB_BASE_SHIFT 0 260 #define DA9211_VBUCKB_BASE_MASK 0x7F 261 262 /* DA9211_REG_VBUCKA/B_A/B (addr=0xD7/0xD8/0xD9/0xDA) */ 263 #define DA9211_VBUCK_SHIFT 0 264 #define DA9211_VBUCK_MASK 0x7F 265 #define DA9211_VBUCK_BIAS 0 266 #define DA9211_BUCK_SL 0x80 267 268 /* DA9211_REG_INTERFACE (addr=0x105) */ 269 #define DA9211_IF_BASE_ADDR_SHIFT 4 270 #define DA9211_IF_BASE_ADDR_MASK 0xF0 271 272 /* DA9211_REG_CONFIG_E (addr=0x147) */ 273 #define DA9211_SLAVE_SEL 0x40 274 275 #endif /* __DA9211_REGISTERS_H__ */ 276