1 /*
2  * AXP20x regulators driver.
3  *
4  * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
5  *
6  * This file is subject to the terms and conditions of the GNU General
7  * Public License. See the file "COPYING" in the main directory of this
8  * archive for more details.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/err.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
23 #include <linux/mfd/axp20x.h>
24 #include <linux/regulator/driver.h>
25 #include <linux/regulator/of_regulator.h>
26 
27 #define AXP20X_IO_ENABLED		0x03
28 #define AXP20X_IO_DISABLED		0x07
29 
30 #define AXP22X_IO_ENABLED		0x03
31 #define AXP22X_IO_DISABLED		0x04
32 
33 #define AXP20X_WORKMODE_DCDC2_MASK	BIT(2)
34 #define AXP20X_WORKMODE_DCDC3_MASK	BIT(1)
35 #define AXP22X_WORKMODE_DCDCX_MASK(x)	BIT(x)
36 
37 #define AXP20X_FREQ_DCDC_MASK		0x0f
38 
39 #define AXP22X_MISC_N_VBUSEN_FUNC	BIT(4)
40 
41 #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg,	\
42 		    _vmask, _ereg, _emask, _enable_val, _disable_val)		\
43 	[_family##_##_id] = {							\
44 		.name		= (_match),					\
45 		.supply_name	= (_supply),					\
46 		.of_match	= of_match_ptr(_match),				\
47 		.regulators_node = of_match_ptr("regulators"),			\
48 		.type		= REGULATOR_VOLTAGE,				\
49 		.id		= _family##_##_id,				\
50 		.n_voltages	= (((_max) - (_min)) / (_step) + 1),		\
51 		.owner		= THIS_MODULE,					\
52 		.min_uV		= (_min) * 1000,				\
53 		.uV_step	= (_step) * 1000,				\
54 		.vsel_reg	= (_vreg),					\
55 		.vsel_mask	= (_vmask),					\
56 		.enable_reg	= (_ereg),					\
57 		.enable_mask	= (_emask),					\
58 		.enable_val	= (_enable_val),				\
59 		.disable_val	= (_disable_val),				\
60 		.ops		= &axp20x_ops,					\
61 	}
62 
63 #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg,	\
64 		 _vmask, _ereg, _emask) 					\
65 	[_family##_##_id] = {							\
66 		.name		= (_match),					\
67 		.supply_name	= (_supply),					\
68 		.of_match	= of_match_ptr(_match),				\
69 		.regulators_node = of_match_ptr("regulators"),			\
70 		.type		= REGULATOR_VOLTAGE,				\
71 		.id		= _family##_##_id,				\
72 		.n_voltages	= (((_max) - (_min)) / (_step) + 1),		\
73 		.owner		= THIS_MODULE,					\
74 		.min_uV		= (_min) * 1000,				\
75 		.uV_step	= (_step) * 1000,				\
76 		.vsel_reg	= (_vreg),					\
77 		.vsel_mask	= (_vmask),					\
78 		.enable_reg	= (_ereg),					\
79 		.enable_mask	= (_emask),					\
80 		.ops		= &axp20x_ops,					\
81 	}
82 
83 #define AXP_DESC_SW(_family, _id, _match, _supply, _ereg, _emask)		\
84 	[_family##_##_id] = {							\
85 		.name		= (_match),					\
86 		.supply_name	= (_supply),					\
87 		.of_match	= of_match_ptr(_match),				\
88 		.regulators_node = of_match_ptr("regulators"),			\
89 		.type		= REGULATOR_VOLTAGE,				\
90 		.id		= _family##_##_id,				\
91 		.owner		= THIS_MODULE,					\
92 		.enable_reg	= (_ereg),					\
93 		.enable_mask	= (_emask),					\
94 		.ops		= &axp20x_ops_sw,				\
95 	}
96 
97 #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt)			\
98 	[_family##_##_id] = {							\
99 		.name		= (_match),					\
100 		.supply_name	= (_supply),					\
101 		.of_match	= of_match_ptr(_match),				\
102 		.regulators_node = of_match_ptr("regulators"),			\
103 		.type		= REGULATOR_VOLTAGE,				\
104 		.id		= _family##_##_id,				\
105 		.n_voltages	= 1,						\
106 		.owner		= THIS_MODULE,					\
107 		.min_uV		= (_volt) * 1000,				\
108 		.ops		= &axp20x_ops_fixed				\
109 	}
110 
111 #define AXP_DESC_RANGES(_family, _id, _match, _supply, _ranges, _n_voltages,	\
112 			_vreg, _vmask, _ereg, _emask)				\
113 	[_family##_##_id] = {							\
114 		.name		= (_match),					\
115 		.supply_name	= (_supply),					\
116 		.of_match	= of_match_ptr(_match),				\
117 		.regulators_node = of_match_ptr("regulators"),			\
118 		.type		= REGULATOR_VOLTAGE,				\
119 		.id		= _family##_##_id,				\
120 		.n_voltages	= (_n_voltages),				\
121 		.owner		= THIS_MODULE,					\
122 		.vsel_reg	= (_vreg),					\
123 		.vsel_mask	= (_vmask),					\
124 		.enable_reg	= (_ereg),					\
125 		.enable_mask	= (_emask),					\
126 		.linear_ranges	= (_ranges),					\
127 		.n_linear_ranges = ARRAY_SIZE(_ranges),				\
128 		.ops		= &axp20x_ops_range,				\
129 	}
130 
131 static const struct regulator_ops axp20x_ops_fixed = {
132 	.list_voltage		= regulator_list_voltage_linear,
133 };
134 
135 static const struct regulator_ops axp20x_ops_range = {
136 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
137 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
138 	.list_voltage		= regulator_list_voltage_linear_range,
139 	.enable			= regulator_enable_regmap,
140 	.disable		= regulator_disable_regmap,
141 	.is_enabled		= regulator_is_enabled_regmap,
142 };
143 
144 static const struct regulator_ops axp20x_ops = {
145 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
146 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
147 	.list_voltage		= regulator_list_voltage_linear,
148 	.enable			= regulator_enable_regmap,
149 	.disable		= regulator_disable_regmap,
150 	.is_enabled		= regulator_is_enabled_regmap,
151 };
152 
153 static const struct regulator_ops axp20x_ops_sw = {
154 	.enable			= regulator_enable_regmap,
155 	.disable		= regulator_disable_regmap,
156 	.is_enabled		= regulator_is_enabled_regmap,
157 };
158 
159 static const struct regulator_linear_range axp20x_ldo4_ranges[] = {
160 	REGULATOR_LINEAR_RANGE(1250000, 0x0, 0x0, 0),
161 	REGULATOR_LINEAR_RANGE(1300000, 0x1, 0x8, 100000),
162 	REGULATOR_LINEAR_RANGE(2500000, 0x9, 0x9, 0),
163 	REGULATOR_LINEAR_RANGE(2700000, 0xa, 0xb, 100000),
164 	REGULATOR_LINEAR_RANGE(3000000, 0xc, 0xf, 100000),
165 };
166 
167 static const struct regulator_desc axp20x_regulators[] = {
168 	AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
169 		 AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10),
170 	AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
171 		 AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02),
172 	AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
173 	AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
174 		 AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04),
175 	AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
176 		 AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40),
177 	AXP_DESC_RANGES(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_ranges,
178 			16, AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL,
179 			0x08),
180 	AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
181 		    AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07,
182 		    AXP20X_IO_ENABLED, AXP20X_IO_DISABLED),
183 };
184 
185 static const struct regulator_desc axp22x_regulators[] = {
186 	AXP_DESC(AXP22X, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
187 		 AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
188 	AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
189 		 AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
190 	AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
191 		 AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
192 	AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
193 		 AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
194 	AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
195 		 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
196 	/* secondary switchable output of DCDC1 */
197 	AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
198 		    BIT(7)),
199 	/* LDO regulator internally chained to DCDC5 */
200 	AXP_DESC(AXP22X, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
201 		 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
202 	AXP_DESC(AXP22X, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
203 		 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
204 	AXP_DESC(AXP22X, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
205 		 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
206 	AXP_DESC(AXP22X, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
207 		 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
208 	AXP_DESC(AXP22X, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
209 		 AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
210 	AXP_DESC(AXP22X, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
211 		 AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
212 	AXP_DESC(AXP22X, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
213 		 AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
214 	AXP_DESC(AXP22X, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
215 		 AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
216 	AXP_DESC(AXP22X, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
217 		 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
218 	AXP_DESC(AXP22X, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
219 		 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
220 	AXP_DESC(AXP22X, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
221 		 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
222 	/* Note the datasheet only guarantees reliable operation up to
223 	 * 3.3V, this needs to be enforced via dts provided constraints */
224 	AXP_DESC_IO(AXP22X, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
225 		    AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
226 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
227 	/* Note the datasheet only guarantees reliable operation up to
228 	 * 3.3V, this needs to be enforced via dts provided constraints */
229 	AXP_DESC_IO(AXP22X, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
230 		    AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
231 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
232 	AXP_DESC_FIXED(AXP22X, RTC_LDO, "rtc_ldo", "ips", 3000),
233 };
234 
235 static const struct regulator_desc axp22x_drivevbus_regulator = {
236 	.name		= "drivevbus",
237 	.supply_name	= "drivevbus",
238 	.of_match	= of_match_ptr("drivevbus"),
239 	.regulators_node = of_match_ptr("regulators"),
240 	.type		= REGULATOR_VOLTAGE,
241 	.owner		= THIS_MODULE,
242 	.enable_reg	= AXP20X_VBUS_IPSOUT_MGMT,
243 	.enable_mask	= BIT(2),
244 	.ops		= &axp20x_ops_sw,
245 };
246 
247 /* DCDC ranges shared with AXP813 */
248 static const struct regulator_linear_range axp803_dcdc234_ranges[] = {
249 	REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
250 	REGULATOR_LINEAR_RANGE(1220000, 0x47, 0x4b, 20000),
251 };
252 
253 static const struct regulator_linear_range axp803_dcdc5_ranges[] = {
254 	REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
255 	REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x44, 20000),
256 };
257 
258 static const struct regulator_linear_range axp803_dcdc6_ranges[] = {
259 	REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
260 	REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
261 };
262 
263 /* AXP806's CLDO2 and AXP809's DLDO1 shares the same range */
264 static const struct regulator_linear_range axp803_dldo2_ranges[] = {
265 	REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
266 	REGULATOR_LINEAR_RANGE(3400000, 0x1b, 0x1f, 200000),
267 };
268 
269 static const struct regulator_desc axp803_regulators[] = {
270 	AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
271 		 AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
272 	AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
273 			76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
274 			BIT(1)),
275 	AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
276 			76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
277 			BIT(2)),
278 	AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
279 			76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
280 			BIT(3)),
281 	AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
282 			68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
283 			BIT(4)),
284 	AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
285 			72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
286 			BIT(5)),
287 	/* secondary switchable output of DCDC1 */
288 	AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
289 		    BIT(7)),
290 	AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
291 		 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
292 	AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
293 		 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
294 	AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
295 		 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
296 	AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
297 		 AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
298 	AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
299 			32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
300 			BIT(4)),
301 	AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
302 		 AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
303 	AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
304 		 AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
305 	AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
306 		 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
307 	AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
308 		 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
309 	AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
310 		 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
311 	AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
312 		 AXP803_FLDO1_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
313 	AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
314 		 AXP803_FLDO2_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(3)),
315 	AXP_DESC_IO(AXP803, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
316 		    AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
317 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
318 	AXP_DESC_IO(AXP803, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
319 		    AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
320 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
321 	AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc-ldo", "ips", 3000),
322 };
323 
324 static const struct regulator_linear_range axp806_dcdca_ranges[] = {
325 	REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
326 	REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
327 };
328 
329 static const struct regulator_linear_range axp806_dcdcd_ranges[] = {
330 	REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2d, 20000),
331 	REGULATOR_LINEAR_RANGE(1600000, 0x2e, 0x3f, 100000),
332 };
333 
334 static const struct regulator_desc axp806_regulators[] = {
335 	AXP_DESC_RANGES(AXP806, DCDCA, "dcdca", "vina", axp806_dcdca_ranges,
336 			72, AXP806_DCDCA_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
337 			BIT(0)),
338 	AXP_DESC(AXP806, DCDCB, "dcdcb", "vinb", 1000, 2550, 50,
339 		 AXP806_DCDCB_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(1)),
340 	AXP_DESC_RANGES(AXP806, DCDCC, "dcdcc", "vinc", axp806_dcdca_ranges,
341 			72, AXP806_DCDCC_V_CTRL, 0x7f, AXP806_PWR_OUT_CTRL1,
342 			BIT(2)),
343 	AXP_DESC_RANGES(AXP806, DCDCD, "dcdcd", "vind", axp806_dcdcd_ranges,
344 			64, AXP806_DCDCD_V_CTRL, 0x3f, AXP806_PWR_OUT_CTRL1,
345 			BIT(3)),
346 	AXP_DESC(AXP806, DCDCE, "dcdce", "vine", 1100, 3400, 100,
347 		 AXP806_DCDCE_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(4)),
348 	AXP_DESC(AXP806, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
349 		 AXP806_ALDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(5)),
350 	AXP_DESC(AXP806, ALDO2, "aldo2", "aldoin", 700, 3400, 100,
351 		 AXP806_ALDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(6)),
352 	AXP_DESC(AXP806, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
353 		 AXP806_ALDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL1, BIT(7)),
354 	AXP_DESC(AXP806, BLDO1, "bldo1", "bldoin", 700, 1900, 100,
355 		 AXP806_BLDO1_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(0)),
356 	AXP_DESC(AXP806, BLDO2, "bldo2", "bldoin", 700, 1900, 100,
357 		 AXP806_BLDO2_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(1)),
358 	AXP_DESC(AXP806, BLDO3, "bldo3", "bldoin", 700, 1900, 100,
359 		 AXP806_BLDO3_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(2)),
360 	AXP_DESC(AXP806, BLDO4, "bldo4", "bldoin", 700, 1900, 100,
361 		 AXP806_BLDO4_V_CTRL, 0x0f, AXP806_PWR_OUT_CTRL2, BIT(3)),
362 	AXP_DESC(AXP806, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
363 		 AXP806_CLDO1_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(4)),
364 	AXP_DESC_RANGES(AXP806, CLDO2, "cldo2", "cldoin", axp803_dldo2_ranges,
365 			32, AXP806_CLDO2_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2,
366 			BIT(5)),
367 	AXP_DESC(AXP806, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
368 		 AXP806_CLDO3_V_CTRL, 0x1f, AXP806_PWR_OUT_CTRL2, BIT(6)),
369 	AXP_DESC_SW(AXP806, SW, "sw", "swin", AXP806_PWR_OUT_CTRL2, BIT(7)),
370 };
371 
372 static const struct regulator_linear_range axp809_dcdc4_ranges[] = {
373 	REGULATOR_LINEAR_RANGE(600000, 0x0, 0x2f, 20000),
374 	REGULATOR_LINEAR_RANGE(1800000, 0x30, 0x38, 100000),
375 };
376 
377 static const struct regulator_desc axp809_regulators[] = {
378 	AXP_DESC(AXP809, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
379 		 AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(1)),
380 	AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
381 		 AXP22X_DCDC2_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(2)),
382 	AXP_DESC(AXP809, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
383 		 AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
384 	AXP_DESC_RANGES(AXP809, DCDC4, "dcdc4", "vin4", axp809_dcdc4_ranges,
385 			57, AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1,
386 			BIT(4)),
387 	AXP_DESC(AXP809, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
388 		 AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
389 	/* secondary switchable output of DCDC1 */
390 	AXP_DESC_SW(AXP809, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
391 		    BIT(7)),
392 	/* LDO regulator internally chained to DCDC5 */
393 	AXP_DESC(AXP809, DC5LDO, "dc5ldo", NULL, 700, 1400, 100,
394 		 AXP22X_DC5LDO_V_OUT, 0x7, AXP22X_PWR_OUT_CTRL1, BIT(0)),
395 	AXP_DESC(AXP809, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
396 		 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(6)),
397 	AXP_DESC(AXP809, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
398 		 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(7)),
399 	AXP_DESC(AXP809, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
400 		 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
401 	AXP_DESC_RANGES(AXP809, DLDO1, "dldo1", "dldoin", axp803_dldo2_ranges,
402 			32, AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
403 			BIT(3)),
404 	AXP_DESC(AXP809, DLDO2, "dldo2", "dldoin", 700, 3300, 100,
405 		 AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(4)),
406 	AXP_DESC(AXP809, ELDO1, "eldo1", "eldoin", 700, 3300, 100,
407 		 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
408 	AXP_DESC(AXP809, ELDO2, "eldo2", "eldoin", 700, 3300, 100,
409 		 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
410 	AXP_DESC(AXP809, ELDO3, "eldo3", "eldoin", 700, 3300, 100,
411 		 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
412 	/*
413 	 * Note the datasheet only guarantees reliable operation up to
414 	 * 3.3V, this needs to be enforced via dts provided constraints
415 	 */
416 	AXP_DESC_IO(AXP809, LDO_IO0, "ldo_io0", "ips", 700, 3800, 100,
417 		    AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
418 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
419 	/*
420 	 * Note the datasheet only guarantees reliable operation up to
421 	 * 3.3V, this needs to be enforced via dts provided constraints
422 	 */
423 	AXP_DESC_IO(AXP809, LDO_IO1, "ldo_io1", "ips", 700, 3800, 100,
424 		    AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
425 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
426 	AXP_DESC_FIXED(AXP809, RTC_LDO, "rtc_ldo", "ips", 1800),
427 	AXP_DESC_SW(AXP809, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(6)),
428 };
429 
430 static const struct regulator_desc axp813_regulators[] = {
431 	AXP_DESC(AXP813, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
432 		 AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
433 	AXP_DESC_RANGES(AXP813, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
434 			76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
435 			BIT(1)),
436 	AXP_DESC_RANGES(AXP813, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
437 			76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
438 			BIT(2)),
439 	AXP_DESC_RANGES(AXP813, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
440 			76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
441 			BIT(3)),
442 	AXP_DESC_RANGES(AXP813, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
443 			68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
444 			BIT(4)),
445 	AXP_DESC_RANGES(AXP813, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
446 			72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
447 			BIT(5)),
448 	AXP_DESC_RANGES(AXP813, DCDC7, "dcdc7", "vin7", axp803_dcdc6_ranges,
449 			72, AXP813_DCDC7_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
450 			BIT(6)),
451 	AXP_DESC(AXP813, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
452 		 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
453 	AXP_DESC(AXP813, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
454 		 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
455 	AXP_DESC(AXP813, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
456 		 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
457 	AXP_DESC(AXP813, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
458 		 AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
459 	AXP_DESC_RANGES(AXP813, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
460 			32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
461 			BIT(4)),
462 	AXP_DESC(AXP813, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
463 		 AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(5)),
464 	AXP_DESC(AXP813, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
465 		 AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(6)),
466 	AXP_DESC(AXP813, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
467 		 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
468 	AXP_DESC(AXP813, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
469 		 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
470 	AXP_DESC(AXP813, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
471 		 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
472 	/* to do / check ... */
473 	AXP_DESC(AXP813, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
474 		 AXP803_FLDO1_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
475 	AXP_DESC(AXP813, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
476 		 AXP803_FLDO2_V_OUT, 0x0f, AXP22X_PWR_OUT_CTRL3, BIT(3)),
477 	/*
478 	 * TODO: FLDO3 = {DCDC5, FLDOIN} / 2
479 	 *
480 	 * This means FLDO3 effectively switches supplies at runtime,
481 	 * something the regulator subsystem does not support.
482 	 */
483 	AXP_DESC_FIXED(AXP813, RTC_LDO, "rtc-ldo", "ips", 1800),
484 	AXP_DESC_IO(AXP813, LDO_IO0, "ldo-io0", "ips", 700, 3300, 100,
485 		    AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
486 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
487 	AXP_DESC_IO(AXP813, LDO_IO1, "ldo-io1", "ips", 700, 3300, 100,
488 		    AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
489 		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
490 	AXP_DESC_SW(AXP813, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(7)),
491 };
492 
493 static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
494 {
495 	struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
496 	unsigned int reg = AXP20X_DCDC_FREQ;
497 	u32 min, max, def, step;
498 
499 	switch (axp20x->variant) {
500 	case AXP202_ID:
501 	case AXP209_ID:
502 		min = 750;
503 		max = 1875;
504 		def = 1500;
505 		step = 75;
506 		break;
507 	case AXP803_ID:
508 	case AXP813_ID:
509 		/*
510 		 * AXP803/AXP813 DCDC work frequency setting has the same
511 		 * range and step as AXP22X, but at a different register.
512 		 * Fall through to the check below.
513 		 * (See include/linux/mfd/axp20x.h)
514 		 */
515 		reg = AXP803_DCDC_FREQ_CTRL;
516 	case AXP806_ID:
517 		/*
518 		 * AXP806 also have DCDC work frequency setting register at a
519 		 * different position.
520 		 */
521 		if (axp20x->variant == AXP806_ID)
522 			reg = AXP806_DCDC_FREQ_CTRL;
523 	case AXP221_ID:
524 	case AXP223_ID:
525 	case AXP809_ID:
526 		min = 1800;
527 		max = 4050;
528 		def = 3000;
529 		step = 150;
530 		break;
531 	default:
532 		dev_err(&pdev->dev,
533 			"Setting DCDC frequency for unsupported AXP variant\n");
534 		return -EINVAL;
535 	}
536 
537 	if (dcdcfreq == 0)
538 		dcdcfreq = def;
539 
540 	if (dcdcfreq < min) {
541 		dcdcfreq = min;
542 		dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n",
543 			 min);
544 	}
545 
546 	if (dcdcfreq > max) {
547 		dcdcfreq = max;
548 		dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n",
549 			 max);
550 	}
551 
552 	dcdcfreq = (dcdcfreq - min) / step;
553 
554 	return regmap_update_bits(axp20x->regmap, reg,
555 				  AXP20X_FREQ_DCDC_MASK, dcdcfreq);
556 }
557 
558 static int axp20x_regulator_parse_dt(struct platform_device *pdev)
559 {
560 	struct device_node *np, *regulators;
561 	int ret;
562 	u32 dcdcfreq = 0;
563 
564 	np = of_node_get(pdev->dev.parent->of_node);
565 	if (!np)
566 		return 0;
567 
568 	regulators = of_get_child_by_name(np, "regulators");
569 	if (!regulators) {
570 		dev_warn(&pdev->dev, "regulators node not found\n");
571 	} else {
572 		of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq);
573 		ret = axp20x_set_dcdc_freq(pdev, dcdcfreq);
574 		if (ret < 0) {
575 			dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret);
576 			return ret;
577 		}
578 
579 		of_node_put(regulators);
580 	}
581 
582 	return 0;
583 }
584 
585 static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode)
586 {
587 	struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
588 	unsigned int reg = AXP20X_DCDC_MODE;
589 	unsigned int mask;
590 
591 	switch (axp20x->variant) {
592 	case AXP202_ID:
593 	case AXP209_ID:
594 		if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3))
595 			return -EINVAL;
596 
597 		mask = AXP20X_WORKMODE_DCDC2_MASK;
598 		if (id == AXP20X_DCDC3)
599 			mask = AXP20X_WORKMODE_DCDC3_MASK;
600 
601 		workmode <<= ffs(mask) - 1;
602 		break;
603 
604 	case AXP806_ID:
605 		reg = AXP806_DCDC_MODE_CTRL2;
606 		/*
607 		 * AXP806 DCDC regulator IDs have the same range as AXP22X.
608 		 * Fall through to the check below.
609 		 * (See include/linux/mfd/axp20x.h)
610 		 */
611 	case AXP221_ID:
612 	case AXP223_ID:
613 	case AXP809_ID:
614 		if (id < AXP22X_DCDC1 || id > AXP22X_DCDC5)
615 			return -EINVAL;
616 
617 		mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
618 		workmode <<= id - AXP22X_DCDC1;
619 		break;
620 
621 	case AXP803_ID:
622 		if (id < AXP803_DCDC1 || id > AXP803_DCDC6)
623 			return -EINVAL;
624 
625 		mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1);
626 		workmode <<= id - AXP803_DCDC1;
627 		break;
628 
629 	case AXP813_ID:
630 		if (id < AXP813_DCDC1 || id > AXP813_DCDC7)
631 			return -EINVAL;
632 
633 		mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP813_DCDC1);
634 		workmode <<= id - AXP813_DCDC1;
635 		break;
636 
637 	default:
638 		/* should not happen */
639 		WARN_ON(1);
640 		return -EINVAL;
641 	}
642 
643 	return regmap_update_bits(rdev->regmap, reg, mask, workmode);
644 }
645 
646 /*
647  * This function checks whether a regulator is part of a poly-phase
648  * output setup based on the registers settings. Returns true if it is.
649  */
650 static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
651 {
652 	u32 reg = 0;
653 
654 	/*
655 	 * Currently in our supported AXP variants, only AXP803, AXP806,
656 	 * and AXP813 have polyphase regulators.
657 	 */
658 	switch (axp20x->variant) {
659 	case AXP803_ID:
660 	case AXP813_ID:
661 		regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, &reg);
662 
663 		switch (id) {
664 		case AXP803_DCDC3:
665 			return !!(reg & BIT(6));
666 		case AXP803_DCDC6:
667 			return !!(reg & BIT(5));
668 		}
669 		break;
670 
671 	case AXP806_ID:
672 		regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
673 
674 		switch (id) {
675 		case AXP806_DCDCB:
676 			return (((reg & GENMASK(7, 6)) == BIT(6)) ||
677 				((reg & GENMASK(7, 6)) == BIT(7)));
678 		case AXP806_DCDCC:
679 			return ((reg & GENMASK(7, 6)) == BIT(7));
680 		case AXP806_DCDCE:
681 			return !!(reg & BIT(5));
682 		}
683 		break;
684 
685 	default:
686 		return false;
687 	}
688 
689 	return false;
690 }
691 
692 static int axp20x_regulator_probe(struct platform_device *pdev)
693 {
694 	struct regulator_dev *rdev;
695 	struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
696 	const struct regulator_desc *regulators;
697 	struct regulator_config config = {
698 		.dev = pdev->dev.parent,
699 		.regmap = axp20x->regmap,
700 		.driver_data = axp20x,
701 	};
702 	int ret, i, nregulators;
703 	u32 workmode;
704 	const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name;
705 	const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name;
706 	bool drivevbus = false;
707 
708 	switch (axp20x->variant) {
709 	case AXP202_ID:
710 	case AXP209_ID:
711 		regulators = axp20x_regulators;
712 		nregulators = AXP20X_REG_ID_MAX;
713 		break;
714 	case AXP221_ID:
715 	case AXP223_ID:
716 		regulators = axp22x_regulators;
717 		nregulators = AXP22X_REG_ID_MAX;
718 		drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
719 						  "x-powers,drive-vbus-en");
720 		break;
721 	case AXP803_ID:
722 		regulators = axp803_regulators;
723 		nregulators = AXP803_REG_ID_MAX;
724 		drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
725 						  "x-powers,drive-vbus-en");
726 		break;
727 	case AXP806_ID:
728 		regulators = axp806_regulators;
729 		nregulators = AXP806_REG_ID_MAX;
730 		break;
731 	case AXP809_ID:
732 		regulators = axp809_regulators;
733 		nregulators = AXP809_REG_ID_MAX;
734 		break;
735 	case AXP813_ID:
736 		regulators = axp813_regulators;
737 		nregulators = AXP813_REG_ID_MAX;
738 		drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
739 						  "x-powers,drive-vbus-en");
740 		break;
741 	default:
742 		dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
743 			axp20x->variant);
744 		return -EINVAL;
745 	}
746 
747 	/* This only sets the dcdc freq. Ignore any errors */
748 	axp20x_regulator_parse_dt(pdev);
749 
750 	for (i = 0; i < nregulators; i++) {
751 		const struct regulator_desc *desc = &regulators[i];
752 		struct regulator_desc *new_desc;
753 
754 		/*
755 		 * If this regulator is a slave in a poly-phase setup,
756 		 * skip it, as its controls are bound to the master
757 		 * regulator and won't work.
758 		 */
759 		if (axp20x_is_polyphase_slave(axp20x, i))
760 			continue;
761 
762 		/* Support for AXP813's FLDO3 is not implemented */
763 		if (axp20x->variant == AXP813_ID && i == AXP813_FLDO3)
764 			continue;
765 
766 		/*
767 		 * Regulators DC1SW and DC5LDO are connected internally,
768 		 * so we have to handle their supply names separately.
769 		 *
770 		 * We always register the regulators in proper sequence,
771 		 * so the supply names are correctly read. See the last
772 		 * part of this loop to see where we save the DT defined
773 		 * name.
774 		 */
775 		if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
776 		    (regulators == axp803_regulators && i == AXP803_DC1SW) ||
777 		    (regulators == axp809_regulators && i == AXP809_DC1SW)) {
778 			new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
779 						GFP_KERNEL);
780 			if (!new_desc)
781 				return -ENOMEM;
782 
783 			*new_desc = regulators[i];
784 			new_desc->supply_name = dcdc1_name;
785 			desc = new_desc;
786 		}
787 
788 		if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) ||
789 		    (regulators == axp809_regulators && i == AXP809_DC5LDO)) {
790 			new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
791 						GFP_KERNEL);
792 			if (!new_desc)
793 				return -ENOMEM;
794 
795 			*new_desc = regulators[i];
796 			new_desc->supply_name = dcdc5_name;
797 			desc = new_desc;
798 		}
799 
800 		rdev = devm_regulator_register(&pdev->dev, desc, &config);
801 		if (IS_ERR(rdev)) {
802 			dev_err(&pdev->dev, "Failed to register %s\n",
803 				regulators[i].name);
804 
805 			return PTR_ERR(rdev);
806 		}
807 
808 		ret = of_property_read_u32(rdev->dev.of_node,
809 					   "x-powers,dcdc-workmode",
810 					   &workmode);
811 		if (!ret) {
812 			if (axp20x_set_dcdc_workmode(rdev, i, workmode))
813 				dev_err(&pdev->dev, "Failed to set workmode on %s\n",
814 					rdev->desc->name);
815 		}
816 
817 		/*
818 		 * Save AXP22X DCDC1 / DCDC5 regulator names for later.
819 		 */
820 		if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
821 		    (regulators == axp809_regulators && i == AXP809_DCDC1))
822 			of_property_read_string(rdev->dev.of_node,
823 						"regulator-name",
824 						&dcdc1_name);
825 
826 		if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) ||
827 		    (regulators == axp809_regulators && i == AXP809_DCDC5))
828 			of_property_read_string(rdev->dev.of_node,
829 						"regulator-name",
830 						&dcdc5_name);
831 	}
832 
833 	if (drivevbus) {
834 		/* Change N_VBUSEN sense pin to DRIVEVBUS output pin */
835 		regmap_update_bits(axp20x->regmap, AXP20X_OVER_TMP,
836 				   AXP22X_MISC_N_VBUSEN_FUNC, 0);
837 		rdev = devm_regulator_register(&pdev->dev,
838 					       &axp22x_drivevbus_regulator,
839 					       &config);
840 		if (IS_ERR(rdev)) {
841 			dev_err(&pdev->dev, "Failed to register drivevbus\n");
842 			return PTR_ERR(rdev);
843 		}
844 	}
845 
846 	return 0;
847 }
848 
849 static struct platform_driver axp20x_regulator_driver = {
850 	.probe	= axp20x_regulator_probe,
851 	.driver	= {
852 		.name		= "axp20x-regulator",
853 	},
854 };
855 
856 module_platform_driver(axp20x_regulator_driver);
857 
858 MODULE_LICENSE("GPL v2");
859 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
860 MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");
861 MODULE_ALIAS("platform:axp20x-regulator");
862