1e3e5aff7SYing-Chun Liu (PaulLiu) /*
2e3e5aff7SYing-Chun Liu (PaulLiu)  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3e3e5aff7SYing-Chun Liu (PaulLiu)  */
4e3e5aff7SYing-Chun Liu (PaulLiu) 
5e3e5aff7SYing-Chun Liu (PaulLiu) /*
6e3e5aff7SYing-Chun Liu (PaulLiu)  * This program is free software; you can redistribute it and/or modify
7e3e5aff7SYing-Chun Liu (PaulLiu)  * it under the terms of the GNU General Public License as published by
8e3e5aff7SYing-Chun Liu (PaulLiu)  * the Free Software Foundation; either version 2 of the License, or
9e3e5aff7SYing-Chun Liu (PaulLiu)  * (at your option) any later version.
10e3e5aff7SYing-Chun Liu (PaulLiu) 
11e3e5aff7SYing-Chun Liu (PaulLiu)  * This program is distributed in the hope that it will be useful,
12e3e5aff7SYing-Chun Liu (PaulLiu)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13e3e5aff7SYing-Chun Liu (PaulLiu)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14e3e5aff7SYing-Chun Liu (PaulLiu)  * GNU General Public License for more details.
15e3e5aff7SYing-Chun Liu (PaulLiu) 
16e3e5aff7SYing-Chun Liu (PaulLiu)  * You should have received a copy of the GNU General Public License along
17e3e5aff7SYing-Chun Liu (PaulLiu)  * with this program; if not, write to the Free Software Foundation, Inc.,
18e3e5aff7SYing-Chun Liu (PaulLiu)  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19e3e5aff7SYing-Chun Liu (PaulLiu)  */
20e3e5aff7SYing-Chun Liu (PaulLiu) 
21e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/slab.h>
22e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/device.h>
23e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/module.h>
24baa64151SDong Aisheng #include <linux/mfd/syscon.h>
25e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/err.h>
26e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/io.h>
27e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/platform_device.h>
28e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of.h>
29e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of_address.h>
30baa64151SDong Aisheng #include <linux/regmap.h>
31e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/driver.h>
32e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h>
33e3e5aff7SYing-Chun Liu (PaulLiu) 
349ee417c0SAnson Huang #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
359ee417c0SAnson Huang #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
369ee417c0SAnson Huang 
37e3e5aff7SYing-Chun Liu (PaulLiu) struct anatop_regulator {
38e3e5aff7SYing-Chun Liu (PaulLiu) 	const char *name;
39e3e5aff7SYing-Chun Liu (PaulLiu) 	u32 control_reg;
40baa64151SDong Aisheng 	struct regmap *anatop;
41e3e5aff7SYing-Chun Liu (PaulLiu) 	int vol_bit_shift;
42e3e5aff7SYing-Chun Liu (PaulLiu) 	int vol_bit_width;
439ee417c0SAnson Huang 	u32 delay_reg;
449ee417c0SAnson Huang 	int delay_bit_shift;
459ee417c0SAnson Huang 	int delay_bit_width;
46e3e5aff7SYing-Chun Liu (PaulLiu) 	int min_bit_val;
47e3e5aff7SYing-Chun Liu (PaulLiu) 	int min_voltage;
48e3e5aff7SYing-Chun Liu (PaulLiu) 	int max_voltage;
49e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_desc rdesc;
50e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_init_data *initdata;
51e3e5aff7SYing-Chun Liu (PaulLiu) };
52e3e5aff7SYing-Chun Liu (PaulLiu) 
53baa64151SDong Aisheng static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
54baa64151SDong Aisheng 					unsigned selector)
55e3e5aff7SYing-Chun Liu (PaulLiu) {
56e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
57e3e5aff7SYing-Chun Liu (PaulLiu) 
58e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!anatop_reg->control_reg)
59e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOTSUPP;
60e3e5aff7SYing-Chun Liu (PaulLiu) 
61e1b0144fSAxel Lin 	return regulator_set_voltage_sel_regmap(reg, selector);
62e3e5aff7SYing-Chun Liu (PaulLiu) }
63e3e5aff7SYing-Chun Liu (PaulLiu) 
649ee417c0SAnson Huang static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
659ee417c0SAnson Huang 	unsigned int old_sel,
669ee417c0SAnson Huang 	unsigned int new_sel)
679ee417c0SAnson Huang {
689ee417c0SAnson Huang 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
699ee417c0SAnson Huang 	u32 val;
709ee417c0SAnson Huang 	int ret = 0;
719ee417c0SAnson Huang 
729ee417c0SAnson Huang 	/* check whether need to care about LDO ramp up speed */
739ee417c0SAnson Huang 	if (anatop_reg->delay_bit_width && new_sel > old_sel) {
749ee417c0SAnson Huang 		/*
759ee417c0SAnson Huang 		 * the delay for LDO ramp up time is
769ee417c0SAnson Huang 		 * based on the register setting, we need
779ee417c0SAnson Huang 		 * to calculate how many steps LDO need to
789ee417c0SAnson Huang 		 * ramp up, and how much delay needed. (us)
799ee417c0SAnson Huang 		 */
809ee417c0SAnson Huang 		regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
819ee417c0SAnson Huang 		val = (val >> anatop_reg->delay_bit_shift) &
829ee417c0SAnson Huang 			((1 << anatop_reg->delay_bit_width) - 1);
83ff1ce057SShawn Guo 		ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
84ff1ce057SShawn Guo 			val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
859ee417c0SAnson Huang 	}
869ee417c0SAnson Huang 
879ee417c0SAnson Huang 	return ret;
889ee417c0SAnson Huang }
899ee417c0SAnson Huang 
90baa64151SDong Aisheng static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
91e3e5aff7SYing-Chun Liu (PaulLiu) {
92e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
93e3e5aff7SYing-Chun Liu (PaulLiu) 
94e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!anatop_reg->control_reg)
95e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOTSUPP;
96e3e5aff7SYing-Chun Liu (PaulLiu) 
97e1b0144fSAxel Lin 	return regulator_get_voltage_sel_regmap(reg);
98e3e5aff7SYing-Chun Liu (PaulLiu) }
99e3e5aff7SYing-Chun Liu (PaulLiu) 
100e3e5aff7SYing-Chun Liu (PaulLiu) static struct regulator_ops anatop_rops = {
101baa64151SDong Aisheng 	.set_voltage_sel = anatop_regmap_set_voltage_sel,
1029ee417c0SAnson Huang 	.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
103baa64151SDong Aisheng 	.get_voltage_sel = anatop_regmap_get_voltage_sel,
1040713e6abSAxel Lin 	.list_voltage = regulator_list_voltage_linear,
105d01c3a1eSAxel Lin 	.map_voltage = regulator_map_voltage_linear,
106e3e5aff7SYing-Chun Liu (PaulLiu) };
107e3e5aff7SYing-Chun Liu (PaulLiu) 
108a5023574SBill Pemberton static int anatop_regulator_probe(struct platform_device *pdev)
109e3e5aff7SYing-Chun Liu (PaulLiu) {
110e3e5aff7SYing-Chun Liu (PaulLiu) 	struct device *dev = &pdev->dev;
111e3e5aff7SYing-Chun Liu (PaulLiu) 	struct device_node *np = dev->of_node;
112baa64151SDong Aisheng 	struct device_node *anatop_np;
113e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_desc *rdesc;
114e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_dev *rdev;
115e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *sreg;
116e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_init_data *initdata;
117d914d81bSAxel Lin 	struct regulator_config config = { };
118e3e5aff7SYing-Chun Liu (PaulLiu) 	int ret = 0;
119e3e5aff7SYing-Chun Liu (PaulLiu) 
120e3e5aff7SYing-Chun Liu (PaulLiu) 	initdata = of_get_regulator_init_data(dev, np);
121e3e5aff7SYing-Chun Liu (PaulLiu) 	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
122e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!sreg)
123e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOMEM;
124e3e5aff7SYing-Chun Liu (PaulLiu) 	sreg->initdata = initdata;
125e3e5aff7SYing-Chun Liu (PaulLiu) 	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
126e3e5aff7SYing-Chun Liu (PaulLiu) 			     GFP_KERNEL);
127e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc = &sreg->rdesc;
128e3e5aff7SYing-Chun Liu (PaulLiu) 	memset(rdesc, 0, sizeof(*rdesc));
129e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->name = sreg->name;
130e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->ops = &anatop_rops;
131e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->type = REGULATOR_VOLTAGE;
132e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->owner = THIS_MODULE;
133baa64151SDong Aisheng 
134baa64151SDong Aisheng 	anatop_np = of_get_parent(np);
135baa64151SDong Aisheng 	if (!anatop_np)
136baa64151SDong Aisheng 		return -ENODEV;
137baa64151SDong Aisheng 	sreg->anatop = syscon_node_to_regmap(anatop_np);
138baa64151SDong Aisheng 	of_node_put(anatop_np);
139baa64151SDong Aisheng 	if (IS_ERR(sreg->anatop))
140baa64151SDong Aisheng 		return PTR_ERR(sreg->anatop);
141baa64151SDong Aisheng 
1422f2cc27fSYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-reg-offset",
1432f2cc27fSYing-Chun Liu (PaulLiu) 				   &sreg->control_reg);
144e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
1452f2cc27fSYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-reg-offset property set\n");
146e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
147e3e5aff7SYing-Chun Liu (PaulLiu) 	}
148e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-vol-bit-width",
149e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->vol_bit_width);
150e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
151e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-vol-bit-width property set\n");
152e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
153e3e5aff7SYing-Chun Liu (PaulLiu) 	}
154e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
155e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->vol_bit_shift);
156e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
157e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-vol-bit-shift property set\n");
158e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
159e3e5aff7SYing-Chun Liu (PaulLiu) 	}
160e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-min-bit-val",
161e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->min_bit_val);
162e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
163e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-min-bit-val property set\n");
164e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
165e3e5aff7SYing-Chun Liu (PaulLiu) 	}
166e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-min-voltage",
167e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->min_voltage);
168e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
169e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-min-voltage property set\n");
170e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
171e3e5aff7SYing-Chun Liu (PaulLiu) 	}
172e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-max-voltage",
173e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->max_voltage);
174e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
175e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-max-voltage property set\n");
176e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
177e3e5aff7SYing-Chun Liu (PaulLiu) 	}
178e3e5aff7SYing-Chun Liu (PaulLiu) 
1799ee417c0SAnson Huang 	/* read LDO ramp up setting, only for core reg */
1809ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-reg-offset",
1819ee417c0SAnson Huang 			     &sreg->delay_reg);
1829ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-bit-width",
1839ee417c0SAnson Huang 			     &sreg->delay_bit_width);
1849ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-bit-shift",
1859ee417c0SAnson Huang 			     &sreg->delay_bit_shift);
1869ee417c0SAnson Huang 
187985884dbSAxel Lin 	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
188985884dbSAxel Lin 			    + sreg->min_bit_val;
1890713e6abSAxel Lin 	rdesc->min_uV = sreg->min_voltage;
1900713e6abSAxel Lin 	rdesc->uV_step = 25000;
191985884dbSAxel Lin 	rdesc->linear_min_sel = sreg->min_bit_val;
192e1b0144fSAxel Lin 	rdesc->vsel_reg = sreg->control_reg;
193e1b0144fSAxel Lin 	rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
194e1b0144fSAxel Lin 			   sreg->vol_bit_shift;
195e3e5aff7SYing-Chun Liu (PaulLiu) 
196d914d81bSAxel Lin 	config.dev = &pdev->dev;
197d914d81bSAxel Lin 	config.init_data = initdata;
198d914d81bSAxel Lin 	config.driver_data = sreg;
199d914d81bSAxel Lin 	config.of_node = pdev->dev.of_node;
200e1b0144fSAxel Lin 	config.regmap = sreg->anatop;
201d914d81bSAxel Lin 
202e3e5aff7SYing-Chun Liu (PaulLiu) 	/* register regulator */
203be1221e8SSachin Kamat 	rdev = devm_regulator_register(dev, rdesc, &config);
204e3e5aff7SYing-Chun Liu (PaulLiu) 	if (IS_ERR(rdev)) {
205e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "failed to register %s\n",
206e3e5aff7SYing-Chun Liu (PaulLiu) 			rdesc->name);
207e3e5aff7SYing-Chun Liu (PaulLiu) 		ret = PTR_ERR(rdev);
208e3e5aff7SYing-Chun Liu (PaulLiu) 		goto anatop_probe_end;
209e3e5aff7SYing-Chun Liu (PaulLiu) 	}
210e3e5aff7SYing-Chun Liu (PaulLiu) 
211e3e5aff7SYing-Chun Liu (PaulLiu) 	platform_set_drvdata(pdev, rdev);
212e3e5aff7SYing-Chun Liu (PaulLiu) 
213e3e5aff7SYing-Chun Liu (PaulLiu) anatop_probe_end:
214e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret)
215e3e5aff7SYing-Chun Liu (PaulLiu) 		kfree(sreg->name);
216e3e5aff7SYing-Chun Liu (PaulLiu) 
217e3e5aff7SYing-Chun Liu (PaulLiu) 	return ret;
218e3e5aff7SYing-Chun Liu (PaulLiu) }
219e3e5aff7SYing-Chun Liu (PaulLiu) 
2208dc995f5SBill Pemberton static int anatop_regulator_remove(struct platform_device *pdev)
221e3e5aff7SYing-Chun Liu (PaulLiu) {
222e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_dev *rdev = platform_get_drvdata(pdev);
223e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
224e3e5aff7SYing-Chun Liu (PaulLiu) 	const char *name = sreg->name;
225e3e5aff7SYing-Chun Liu (PaulLiu) 
226e3e5aff7SYing-Chun Liu (PaulLiu) 	kfree(name);
227e3e5aff7SYing-Chun Liu (PaulLiu) 
228e3e5aff7SYing-Chun Liu (PaulLiu) 	return 0;
229e3e5aff7SYing-Chun Liu (PaulLiu) }
230e3e5aff7SYing-Chun Liu (PaulLiu) 
2313d68dfe3SGreg Kroah-Hartman static struct of_device_id of_anatop_regulator_match_tbl[] = {
232e3e5aff7SYing-Chun Liu (PaulLiu) 	{ .compatible = "fsl,anatop-regulator", },
233e3e5aff7SYing-Chun Liu (PaulLiu) 	{ /* end */ }
234e3e5aff7SYing-Chun Liu (PaulLiu) };
235e3e5aff7SYing-Chun Liu (PaulLiu) 
236c0d78c23SShawn Guo static struct platform_driver anatop_regulator_driver = {
237e3e5aff7SYing-Chun Liu (PaulLiu) 	.driver = {
238e3e5aff7SYing-Chun Liu (PaulLiu) 		.name	= "anatop_regulator",
239e3e5aff7SYing-Chun Liu (PaulLiu) 		.owner  = THIS_MODULE,
240e3e5aff7SYing-Chun Liu (PaulLiu) 		.of_match_table = of_anatop_regulator_match_tbl,
241e3e5aff7SYing-Chun Liu (PaulLiu) 	},
242e3e5aff7SYing-Chun Liu (PaulLiu) 	.probe	= anatop_regulator_probe,
2435eb9f2b9SBill Pemberton 	.remove	= anatop_regulator_remove,
244e3e5aff7SYing-Chun Liu (PaulLiu) };
245e3e5aff7SYing-Chun Liu (PaulLiu) 
246e3e5aff7SYing-Chun Liu (PaulLiu) static int __init anatop_regulator_init(void)
247e3e5aff7SYing-Chun Liu (PaulLiu) {
248c0d78c23SShawn Guo 	return platform_driver_register(&anatop_regulator_driver);
249e3e5aff7SYing-Chun Liu (PaulLiu) }
250e3e5aff7SYing-Chun Liu (PaulLiu) postcore_initcall(anatop_regulator_init);
251e3e5aff7SYing-Chun Liu (PaulLiu) 
252e3e5aff7SYing-Chun Liu (PaulLiu) static void __exit anatop_regulator_exit(void)
253e3e5aff7SYing-Chun Liu (PaulLiu) {
254c0d78c23SShawn Guo 	platform_driver_unregister(&anatop_regulator_driver);
255e3e5aff7SYing-Chun Liu (PaulLiu) }
256e3e5aff7SYing-Chun Liu (PaulLiu) module_exit(anatop_regulator_exit);
257e3e5aff7SYing-Chun Liu (PaulLiu) 
25834f75685SJingoo Han MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
25934f75685SJingoo Han MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
260e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_DESCRIPTION("ANATOP Regulator driver");
261e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_LICENSE("GPL v2");
26289705b9eSFabio Estevam MODULE_ALIAS("platform:anatop_regulator");
263