1e3e5aff7SYing-Chun Liu (PaulLiu) /*
2e3e5aff7SYing-Chun Liu (PaulLiu)  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3e3e5aff7SYing-Chun Liu (PaulLiu)  */
4e3e5aff7SYing-Chun Liu (PaulLiu) 
5e3e5aff7SYing-Chun Liu (PaulLiu) /*
6e3e5aff7SYing-Chun Liu (PaulLiu)  * This program is free software; you can redistribute it and/or modify
7e3e5aff7SYing-Chun Liu (PaulLiu)  * it under the terms of the GNU General Public License as published by
8e3e5aff7SYing-Chun Liu (PaulLiu)  * the Free Software Foundation; either version 2 of the License, or
9e3e5aff7SYing-Chun Liu (PaulLiu)  * (at your option) any later version.
10e3e5aff7SYing-Chun Liu (PaulLiu) 
11e3e5aff7SYing-Chun Liu (PaulLiu)  * This program is distributed in the hope that it will be useful,
12e3e5aff7SYing-Chun Liu (PaulLiu)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13e3e5aff7SYing-Chun Liu (PaulLiu)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14e3e5aff7SYing-Chun Liu (PaulLiu)  * GNU General Public License for more details.
15e3e5aff7SYing-Chun Liu (PaulLiu) 
16e3e5aff7SYing-Chun Liu (PaulLiu)  * You should have received a copy of the GNU General Public License along
17e3e5aff7SYing-Chun Liu (PaulLiu)  * with this program; if not, write to the Free Software Foundation, Inc.,
18e3e5aff7SYing-Chun Liu (PaulLiu)  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19e3e5aff7SYing-Chun Liu (PaulLiu)  */
20e3e5aff7SYing-Chun Liu (PaulLiu) 
21e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/slab.h>
22e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/device.h>
23e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/module.h>
24baa64151SDong Aisheng #include <linux/mfd/syscon.h>
25e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/err.h>
26e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/io.h>
27e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/platform_device.h>
28e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of.h>
29e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/of_address.h>
30baa64151SDong Aisheng #include <linux/regmap.h>
31e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/driver.h>
32e3e5aff7SYing-Chun Liu (PaulLiu) #include <linux/regulator/of_regulator.h>
33e3e5aff7SYing-Chun Liu (PaulLiu) 
349ee417c0SAnson Huang #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
359ee417c0SAnson Huang #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
369ee417c0SAnson Huang 
37605ebd35SPhilipp Zabel #define LDO_POWER_GATE			0x00
38605ebd35SPhilipp Zabel 
39e3e5aff7SYing-Chun Liu (PaulLiu) struct anatop_regulator {
40e3e5aff7SYing-Chun Liu (PaulLiu) 	const char *name;
41e3e5aff7SYing-Chun Liu (PaulLiu) 	u32 control_reg;
42baa64151SDong Aisheng 	struct regmap *anatop;
43e3e5aff7SYing-Chun Liu (PaulLiu) 	int vol_bit_shift;
44e3e5aff7SYing-Chun Liu (PaulLiu) 	int vol_bit_width;
459ee417c0SAnson Huang 	u32 delay_reg;
469ee417c0SAnson Huang 	int delay_bit_shift;
479ee417c0SAnson Huang 	int delay_bit_width;
48e3e5aff7SYing-Chun Liu (PaulLiu) 	int min_bit_val;
49e3e5aff7SYing-Chun Liu (PaulLiu) 	int min_voltage;
50e3e5aff7SYing-Chun Liu (PaulLiu) 	int max_voltage;
51e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_desc rdesc;
52e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_init_data *initdata;
53605ebd35SPhilipp Zabel 	int sel;
54e3e5aff7SYing-Chun Liu (PaulLiu) };
55e3e5aff7SYing-Chun Liu (PaulLiu) 
56baa64151SDong Aisheng static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg,
57baa64151SDong Aisheng 					unsigned selector)
58e3e5aff7SYing-Chun Liu (PaulLiu) {
59e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
60e3e5aff7SYing-Chun Liu (PaulLiu) 
61e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!anatop_reg->control_reg)
62e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOTSUPP;
63e3e5aff7SYing-Chun Liu (PaulLiu) 
64e1b0144fSAxel Lin 	return regulator_set_voltage_sel_regmap(reg, selector);
65e3e5aff7SYing-Chun Liu (PaulLiu) }
66e3e5aff7SYing-Chun Liu (PaulLiu) 
679ee417c0SAnson Huang static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
689ee417c0SAnson Huang 	unsigned int old_sel,
699ee417c0SAnson Huang 	unsigned int new_sel)
709ee417c0SAnson Huang {
719ee417c0SAnson Huang 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
729ee417c0SAnson Huang 	u32 val;
739ee417c0SAnson Huang 	int ret = 0;
749ee417c0SAnson Huang 
759ee417c0SAnson Huang 	/* check whether need to care about LDO ramp up speed */
769ee417c0SAnson Huang 	if (anatop_reg->delay_bit_width && new_sel > old_sel) {
779ee417c0SAnson Huang 		/*
789ee417c0SAnson Huang 		 * the delay for LDO ramp up time is
799ee417c0SAnson Huang 		 * based on the register setting, we need
809ee417c0SAnson Huang 		 * to calculate how many steps LDO need to
819ee417c0SAnson Huang 		 * ramp up, and how much delay needed. (us)
829ee417c0SAnson Huang 		 */
839ee417c0SAnson Huang 		regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
849ee417c0SAnson Huang 		val = (val >> anatop_reg->delay_bit_shift) &
859ee417c0SAnson Huang 			((1 << anatop_reg->delay_bit_width) - 1);
86ff1ce057SShawn Guo 		ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
87ff1ce057SShawn Guo 			val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
889ee417c0SAnson Huang 	}
899ee417c0SAnson Huang 
909ee417c0SAnson Huang 	return ret;
919ee417c0SAnson Huang }
929ee417c0SAnson Huang 
93baa64151SDong Aisheng static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg)
94e3e5aff7SYing-Chun Liu (PaulLiu) {
95e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
96e3e5aff7SYing-Chun Liu (PaulLiu) 
97e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!anatop_reg->control_reg)
98e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOTSUPP;
99e3e5aff7SYing-Chun Liu (PaulLiu) 
100e1b0144fSAxel Lin 	return regulator_get_voltage_sel_regmap(reg);
101e3e5aff7SYing-Chun Liu (PaulLiu) }
102e3e5aff7SYing-Chun Liu (PaulLiu) 
103605ebd35SPhilipp Zabel static int anatop_regmap_enable(struct regulator_dev *reg)
104605ebd35SPhilipp Zabel {
105605ebd35SPhilipp Zabel 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
106605ebd35SPhilipp Zabel 
107605ebd35SPhilipp Zabel 	return regulator_set_voltage_sel_regmap(reg, anatop_reg->sel);
108605ebd35SPhilipp Zabel }
109605ebd35SPhilipp Zabel 
110605ebd35SPhilipp Zabel static int anatop_regmap_disable(struct regulator_dev *reg)
111605ebd35SPhilipp Zabel {
112605ebd35SPhilipp Zabel 	return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
113605ebd35SPhilipp Zabel }
114605ebd35SPhilipp Zabel 
115605ebd35SPhilipp Zabel static int anatop_regmap_is_enabled(struct regulator_dev *reg)
116605ebd35SPhilipp Zabel {
117605ebd35SPhilipp Zabel 	return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
118605ebd35SPhilipp Zabel }
119605ebd35SPhilipp Zabel 
120605ebd35SPhilipp Zabel static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
121605ebd35SPhilipp Zabel 					      unsigned selector)
122605ebd35SPhilipp Zabel {
123605ebd35SPhilipp Zabel 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
124605ebd35SPhilipp Zabel 	int ret;
125605ebd35SPhilipp Zabel 
126605ebd35SPhilipp Zabel 	if (!anatop_regmap_is_enabled(reg)) {
127605ebd35SPhilipp Zabel 		anatop_reg->sel = selector;
128605ebd35SPhilipp Zabel 		return 0;
129605ebd35SPhilipp Zabel 	}
130605ebd35SPhilipp Zabel 
131605ebd35SPhilipp Zabel 	ret = regulator_set_voltage_sel_regmap(reg, selector);
132605ebd35SPhilipp Zabel 	if (!ret)
133605ebd35SPhilipp Zabel 		anatop_reg->sel = selector;
134605ebd35SPhilipp Zabel 	return ret;
135605ebd35SPhilipp Zabel }
136605ebd35SPhilipp Zabel 
137605ebd35SPhilipp Zabel static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
138605ebd35SPhilipp Zabel {
139605ebd35SPhilipp Zabel 	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
140605ebd35SPhilipp Zabel 
141605ebd35SPhilipp Zabel 	if (!anatop_regmap_is_enabled(reg))
142605ebd35SPhilipp Zabel 		return anatop_reg->sel;
143605ebd35SPhilipp Zabel 
144605ebd35SPhilipp Zabel 	return regulator_get_voltage_sel_regmap(reg);
145605ebd35SPhilipp Zabel }
146605ebd35SPhilipp Zabel 
147e3e5aff7SYing-Chun Liu (PaulLiu) static struct regulator_ops anatop_rops = {
148baa64151SDong Aisheng 	.set_voltage_sel = anatop_regmap_set_voltage_sel,
149baa64151SDong Aisheng 	.get_voltage_sel = anatop_regmap_get_voltage_sel,
1500713e6abSAxel Lin 	.list_voltage = regulator_list_voltage_linear,
151d01c3a1eSAxel Lin 	.map_voltage = regulator_map_voltage_linear,
152e3e5aff7SYing-Chun Liu (PaulLiu) };
153e3e5aff7SYing-Chun Liu (PaulLiu) 
154605ebd35SPhilipp Zabel static struct regulator_ops anatop_core_rops = {
155605ebd35SPhilipp Zabel 	.enable = anatop_regmap_enable,
156605ebd35SPhilipp Zabel 	.disable = anatop_regmap_disable,
157605ebd35SPhilipp Zabel 	.is_enabled = anatop_regmap_is_enabled,
158605ebd35SPhilipp Zabel 	.set_voltage_sel = anatop_regmap_core_set_voltage_sel,
159605ebd35SPhilipp Zabel 	.set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
160605ebd35SPhilipp Zabel 	.get_voltage_sel = anatop_regmap_core_get_voltage_sel,
161605ebd35SPhilipp Zabel 	.list_voltage = regulator_list_voltage_linear,
162605ebd35SPhilipp Zabel 	.map_voltage = regulator_map_voltage_linear,
163605ebd35SPhilipp Zabel };
164605ebd35SPhilipp Zabel 
165a5023574SBill Pemberton static int anatop_regulator_probe(struct platform_device *pdev)
166e3e5aff7SYing-Chun Liu (PaulLiu) {
167e3e5aff7SYing-Chun Liu (PaulLiu) 	struct device *dev = &pdev->dev;
168e3e5aff7SYing-Chun Liu (PaulLiu) 	struct device_node *np = dev->of_node;
169baa64151SDong Aisheng 	struct device_node *anatop_np;
170e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_desc *rdesc;
171e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_dev *rdev;
172e3e5aff7SYing-Chun Liu (PaulLiu) 	struct anatop_regulator *sreg;
173e3e5aff7SYing-Chun Liu (PaulLiu) 	struct regulator_init_data *initdata;
174d914d81bSAxel Lin 	struct regulator_config config = { };
175e3e5aff7SYing-Chun Liu (PaulLiu) 	int ret = 0;
176605ebd35SPhilipp Zabel 	u32 val;
177e3e5aff7SYing-Chun Liu (PaulLiu) 
178e3e5aff7SYing-Chun Liu (PaulLiu) 	initdata = of_get_regulator_init_data(dev, np);
179e3e5aff7SYing-Chun Liu (PaulLiu) 	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
180e3e5aff7SYing-Chun Liu (PaulLiu) 	if (!sreg)
181e3e5aff7SYing-Chun Liu (PaulLiu) 		return -ENOMEM;
182e3e5aff7SYing-Chun Liu (PaulLiu) 	sreg->initdata = initdata;
183f2b269b8SFabio Estevam 	sreg->name = of_get_property(np, "regulator-name", NULL);
184e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc = &sreg->rdesc;
185e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->name = sreg->name;
186e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->type = REGULATOR_VOLTAGE;
187e3e5aff7SYing-Chun Liu (PaulLiu) 	rdesc->owner = THIS_MODULE;
188baa64151SDong Aisheng 
189baa64151SDong Aisheng 	anatop_np = of_get_parent(np);
190baa64151SDong Aisheng 	if (!anatop_np)
191baa64151SDong Aisheng 		return -ENODEV;
192baa64151SDong Aisheng 	sreg->anatop = syscon_node_to_regmap(anatop_np);
193baa64151SDong Aisheng 	of_node_put(anatop_np);
194baa64151SDong Aisheng 	if (IS_ERR(sreg->anatop))
195baa64151SDong Aisheng 		return PTR_ERR(sreg->anatop);
196baa64151SDong Aisheng 
1972f2cc27fSYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-reg-offset",
1982f2cc27fSYing-Chun Liu (PaulLiu) 				   &sreg->control_reg);
199e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
2002f2cc27fSYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-reg-offset property set\n");
201f2b269b8SFabio Estevam 		return ret;
202e3e5aff7SYing-Chun Liu (PaulLiu) 	}
203e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-vol-bit-width",
204e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->vol_bit_width);
205e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
206e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-vol-bit-width property set\n");
207f2b269b8SFabio Estevam 		return ret;
208e3e5aff7SYing-Chun Liu (PaulLiu) 	}
209e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
210e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->vol_bit_shift);
211e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
212e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-vol-bit-shift property set\n");
213f2b269b8SFabio Estevam 		return ret;
214e3e5aff7SYing-Chun Liu (PaulLiu) 	}
215e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-min-bit-val",
216e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->min_bit_val);
217e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
218e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-min-bit-val property set\n");
219f2b269b8SFabio Estevam 		return ret;
220e3e5aff7SYing-Chun Liu (PaulLiu) 	}
221e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-min-voltage",
222e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->min_voltage);
223e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
224e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-min-voltage property set\n");
225f2b269b8SFabio Estevam 		return ret;
226e3e5aff7SYing-Chun Liu (PaulLiu) 	}
227e3e5aff7SYing-Chun Liu (PaulLiu) 	ret = of_property_read_u32(np, "anatop-max-voltage",
228e3e5aff7SYing-Chun Liu (PaulLiu) 				   &sreg->max_voltage);
229e3e5aff7SYing-Chun Liu (PaulLiu) 	if (ret) {
230e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "no anatop-max-voltage property set\n");
231f2b269b8SFabio Estevam 		return ret;
232e3e5aff7SYing-Chun Liu (PaulLiu) 	}
233e3e5aff7SYing-Chun Liu (PaulLiu) 
2349ee417c0SAnson Huang 	/* read LDO ramp up setting, only for core reg */
2359ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-reg-offset",
2369ee417c0SAnson Huang 			     &sreg->delay_reg);
2379ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-bit-width",
2389ee417c0SAnson Huang 			     &sreg->delay_bit_width);
2399ee417c0SAnson Huang 	of_property_read_u32(np, "anatop-delay-bit-shift",
2409ee417c0SAnson Huang 			     &sreg->delay_bit_shift);
2419ee417c0SAnson Huang 
242985884dbSAxel Lin 	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
243985884dbSAxel Lin 			    + sreg->min_bit_val;
2440713e6abSAxel Lin 	rdesc->min_uV = sreg->min_voltage;
2450713e6abSAxel Lin 	rdesc->uV_step = 25000;
246985884dbSAxel Lin 	rdesc->linear_min_sel = sreg->min_bit_val;
247e1b0144fSAxel Lin 	rdesc->vsel_reg = sreg->control_reg;
248e1b0144fSAxel Lin 	rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
249e1b0144fSAxel Lin 			   sreg->vol_bit_shift;
250e3e5aff7SYing-Chun Liu (PaulLiu) 
251d914d81bSAxel Lin 	config.dev = &pdev->dev;
252d914d81bSAxel Lin 	config.init_data = initdata;
253d914d81bSAxel Lin 	config.driver_data = sreg;
254d914d81bSAxel Lin 	config.of_node = pdev->dev.of_node;
255e1b0144fSAxel Lin 	config.regmap = sreg->anatop;
256d914d81bSAxel Lin 
257605ebd35SPhilipp Zabel 	/* Only core regulators have the ramp up delay configuration. */
258605ebd35SPhilipp Zabel 	if (sreg->control_reg && sreg->delay_bit_width) {
259605ebd35SPhilipp Zabel 		rdesc->ops = &anatop_core_rops;
260605ebd35SPhilipp Zabel 
261605ebd35SPhilipp Zabel 		ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
262605ebd35SPhilipp Zabel 		if (ret) {
263605ebd35SPhilipp Zabel 			dev_err(dev, "failed to read initial state\n");
264605ebd35SPhilipp Zabel 			return ret;
265605ebd35SPhilipp Zabel 		}
266605ebd35SPhilipp Zabel 
267605ebd35SPhilipp Zabel 		sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
268605ebd35SPhilipp Zabel 	} else {
269605ebd35SPhilipp Zabel 		rdesc->ops = &anatop_rops;
270605ebd35SPhilipp Zabel 	}
271605ebd35SPhilipp Zabel 
272e3e5aff7SYing-Chun Liu (PaulLiu) 	/* register regulator */
273be1221e8SSachin Kamat 	rdev = devm_regulator_register(dev, rdesc, &config);
274e3e5aff7SYing-Chun Liu (PaulLiu) 	if (IS_ERR(rdev)) {
275e3e5aff7SYing-Chun Liu (PaulLiu) 		dev_err(dev, "failed to register %s\n",
276e3e5aff7SYing-Chun Liu (PaulLiu) 			rdesc->name);
277f2b269b8SFabio Estevam 		return PTR_ERR(rdev);
278e3e5aff7SYing-Chun Liu (PaulLiu) 	}
279e3e5aff7SYing-Chun Liu (PaulLiu) 
280e3e5aff7SYing-Chun Liu (PaulLiu) 	platform_set_drvdata(pdev, rdev);
281e3e5aff7SYing-Chun Liu (PaulLiu) 
282e3e5aff7SYing-Chun Liu (PaulLiu) 	return 0;
283e3e5aff7SYing-Chun Liu (PaulLiu) }
284e3e5aff7SYing-Chun Liu (PaulLiu) 
2853d68dfe3SGreg Kroah-Hartman static struct of_device_id of_anatop_regulator_match_tbl[] = {
286e3e5aff7SYing-Chun Liu (PaulLiu) 	{ .compatible = "fsl,anatop-regulator", },
287e3e5aff7SYing-Chun Liu (PaulLiu) 	{ /* end */ }
288e3e5aff7SYing-Chun Liu (PaulLiu) };
289e3e5aff7SYing-Chun Liu (PaulLiu) 
290c0d78c23SShawn Guo static struct platform_driver anatop_regulator_driver = {
291e3e5aff7SYing-Chun Liu (PaulLiu) 	.driver = {
292e3e5aff7SYing-Chun Liu (PaulLiu) 		.name	= "anatop_regulator",
293e3e5aff7SYing-Chun Liu (PaulLiu) 		.owner  = THIS_MODULE,
294e3e5aff7SYing-Chun Liu (PaulLiu) 		.of_match_table = of_anatop_regulator_match_tbl,
295e3e5aff7SYing-Chun Liu (PaulLiu) 	},
296e3e5aff7SYing-Chun Liu (PaulLiu) 	.probe	= anatop_regulator_probe,
297e3e5aff7SYing-Chun Liu (PaulLiu) };
298e3e5aff7SYing-Chun Liu (PaulLiu) 
299e3e5aff7SYing-Chun Liu (PaulLiu) static int __init anatop_regulator_init(void)
300e3e5aff7SYing-Chun Liu (PaulLiu) {
301c0d78c23SShawn Guo 	return platform_driver_register(&anatop_regulator_driver);
302e3e5aff7SYing-Chun Liu (PaulLiu) }
303e3e5aff7SYing-Chun Liu (PaulLiu) postcore_initcall(anatop_regulator_init);
304e3e5aff7SYing-Chun Liu (PaulLiu) 
305e3e5aff7SYing-Chun Liu (PaulLiu) static void __exit anatop_regulator_exit(void)
306e3e5aff7SYing-Chun Liu (PaulLiu) {
307c0d78c23SShawn Guo 	platform_driver_unregister(&anatop_regulator_driver);
308e3e5aff7SYing-Chun Liu (PaulLiu) }
309e3e5aff7SYing-Chun Liu (PaulLiu) module_exit(anatop_regulator_exit);
310e3e5aff7SYing-Chun Liu (PaulLiu) 
31134f75685SJingoo Han MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
31234f75685SJingoo Han MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
313e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_DESCRIPTION("ANATOP Regulator driver");
314e3e5aff7SYing-Chun Liu (PaulLiu) MODULE_LICENSE("GPL v2");
31589705b9eSFabio Estevam MODULE_ALIAS("platform:anatop_regulator");
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