1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PWM device driver for ST SoCs 4 * 5 * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited 6 * 7 * Author: Ajit Pal Singh <ajitpal.singh@st.com> 8 * Lee Jones <lee.jones@linaro.org> 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/interrupt.h> 13 #include <linux/math64.h> 14 #include <linux/mfd/syscon.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/platform_device.h> 18 #include <linux/pwm.h> 19 #include <linux/regmap.h> 20 #include <linux/sched.h> 21 #include <linux/slab.h> 22 #include <linux/time.h> 23 #include <linux/wait.h> 24 25 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */ 26 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */ 27 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */ 28 29 #define STI_PWM_CTRL 0x50 /* Control/Config register */ 30 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */ 31 #define STI_INT_STA 0x58 /* Interrupt Status register */ 32 #define PWM_INT_ACK 0x5c 33 #define PWM_PRESCALE_LOW_MASK 0x0f 34 #define PWM_PRESCALE_HIGH_MASK 0xf0 35 #define PWM_CPT_EDGE_MASK 0x03 36 #define PWM_INT_ACK_MASK 0x1ff 37 38 #define STI_MAX_CPT_DEVS 4 39 #define CPT_DC_MAX 0xff 40 41 /* Regfield IDs */ 42 enum { 43 /* Bits in PWM_CTRL*/ 44 PWMCLK_PRESCALE_LOW, 45 PWMCLK_PRESCALE_HIGH, 46 CPTCLK_PRESCALE, 47 48 PWM_OUT_EN, 49 PWM_CPT_EN, 50 51 PWM_CPT_INT_EN, 52 PWM_CPT_INT_STAT, 53 54 /* Keep last */ 55 MAX_REGFIELDS 56 }; 57 58 /* 59 * Each capture input can be programmed to detect rising-edge, falling-edge, 60 * either edge or neither egde. 61 */ 62 enum sti_cpt_edge { 63 CPT_EDGE_DISABLED, 64 CPT_EDGE_RISING, 65 CPT_EDGE_FALLING, 66 CPT_EDGE_BOTH, 67 }; 68 69 struct sti_cpt_ddata { 70 u32 snapshot[3]; 71 unsigned int index; 72 struct mutex lock; 73 wait_queue_head_t wait; 74 }; 75 76 struct sti_pwm_compat_data { 77 const struct reg_field *reg_fields; 78 unsigned int pwm_num_devs; 79 unsigned int cpt_num_devs; 80 unsigned int max_pwm_cnt; 81 unsigned int max_prescale; 82 }; 83 84 struct sti_pwm_chip { 85 struct device *dev; 86 struct clk *pwm_clk; 87 struct clk *cpt_clk; 88 struct regmap *regmap; 89 struct sti_pwm_compat_data *cdata; 90 struct regmap_field *prescale_low; 91 struct regmap_field *prescale_high; 92 struct regmap_field *pwm_out_en; 93 struct regmap_field *pwm_cpt_en; 94 struct regmap_field *pwm_cpt_int_en; 95 struct regmap_field *pwm_cpt_int_stat; 96 struct pwm_chip chip; 97 struct pwm_device *cur; 98 unsigned long configured; 99 unsigned int en_count; 100 struct mutex sti_pwm_lock; /* To sync between enable/disable calls */ 101 void __iomem *mmio; 102 }; 103 104 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = { 105 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3), 106 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14), 107 [CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8), 108 [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9), 109 [PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10), 110 [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4), 111 [PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4), 112 }; 113 114 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip) 115 { 116 return container_of(chip, struct sti_pwm_chip, chip); 117 } 118 119 /* 120 * Calculate the prescaler value corresponding to the period. 121 */ 122 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period, 123 unsigned int *prescale) 124 { 125 struct sti_pwm_compat_data *cdata = pc->cdata; 126 unsigned long clk_rate; 127 unsigned long value; 128 unsigned int ps; 129 130 clk_rate = clk_get_rate(pc->pwm_clk); 131 if (!clk_rate) { 132 dev_err(pc->dev, "failed to get clock rate\n"); 133 return -EINVAL; 134 } 135 136 /* 137 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1 138 */ 139 value = NSEC_PER_SEC / clk_rate; 140 value *= cdata->max_pwm_cnt + 1; 141 142 if (period % value) 143 return -EINVAL; 144 145 ps = period / value - 1; 146 if (ps > cdata->max_prescale) 147 return -EINVAL; 148 149 *prescale = ps; 150 151 return 0; 152 } 153 154 /* 155 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The 156 * only way to change the period (apart from changing the PWM input clock) is 157 * to change the PWM clock prescaler. 158 * 159 * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible 160 * period values are supported (for a particular clock rate). The requested 161 * period will be applied only if it matches one of these 256 values. 162 */ 163 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 164 int duty_ns, int period_ns) 165 { 166 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); 167 struct sti_pwm_compat_data *cdata = pc->cdata; 168 unsigned int ncfg, value, prescale = 0; 169 struct pwm_device *cur = pc->cur; 170 struct device *dev = pc->dev; 171 bool period_same = false; 172 int ret; 173 174 ncfg = hweight_long(pc->configured); 175 if (ncfg) 176 period_same = (period_ns == pwm_get_period(cur)); 177 178 /* 179 * Allow configuration changes if one of the following conditions 180 * satisfy. 181 * 1. No devices have been configured. 182 * 2. Only one device has been configured and the new request is for 183 * the same device. 184 * 3. Only one device has been configured and the new request is for 185 * a new device and period of the new device is same as the current 186 * configured period. 187 * 4. More than one devices are configured and period of the new 188 * requestis the same as the current period. 189 */ 190 if (!ncfg || 191 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) || 192 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) || 193 ((ncfg > 1) && period_same)) { 194 /* Enable clock before writing to PWM registers. */ 195 ret = clk_enable(pc->pwm_clk); 196 if (ret) 197 return ret; 198 199 ret = clk_enable(pc->cpt_clk); 200 if (ret) 201 return ret; 202 203 if (!period_same) { 204 ret = sti_pwm_get_prescale(pc, period_ns, &prescale); 205 if (ret) 206 goto clk_dis; 207 208 value = prescale & PWM_PRESCALE_LOW_MASK; 209 210 ret = regmap_field_write(pc->prescale_low, value); 211 if (ret) 212 goto clk_dis; 213 214 value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4; 215 216 ret = regmap_field_write(pc->prescale_high, value); 217 if (ret) 218 goto clk_dis; 219 } 220 221 /* 222 * When PWMVal == 0, PWM pulse = 1 local clock cycle. 223 * When PWMVal == max_pwm_count, 224 * PWM pulse = (max_pwm_count + 1) local cycles, 225 * that is continuous pulse: signal never goes low. 226 */ 227 value = cdata->max_pwm_cnt * duty_ns / period_ns; 228 229 ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value); 230 if (ret) 231 goto clk_dis; 232 233 ret = regmap_field_write(pc->pwm_cpt_int_en, 0); 234 235 set_bit(pwm->hwpwm, &pc->configured); 236 pc->cur = pwm; 237 238 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n", 239 prescale, period_ns, duty_ns, value); 240 } else { 241 return -EINVAL; 242 } 243 244 clk_dis: 245 clk_disable(pc->pwm_clk); 246 clk_disable(pc->cpt_clk); 247 return ret; 248 } 249 250 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 251 { 252 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); 253 struct device *dev = pc->dev; 254 int ret = 0; 255 256 /* 257 * Since we have a common enable for all PWM devices, do not enable if 258 * already enabled. 259 */ 260 mutex_lock(&pc->sti_pwm_lock); 261 262 if (!pc->en_count) { 263 ret = clk_enable(pc->pwm_clk); 264 if (ret) 265 goto out; 266 267 ret = clk_enable(pc->cpt_clk); 268 if (ret) 269 goto out; 270 271 ret = regmap_field_write(pc->pwm_out_en, 1); 272 if (ret) { 273 dev_err(dev, "failed to enable PWM device %u: %d\n", 274 pwm->hwpwm, ret); 275 goto out; 276 } 277 } 278 279 pc->en_count++; 280 281 out: 282 mutex_unlock(&pc->sti_pwm_lock); 283 return ret; 284 } 285 286 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 287 { 288 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); 289 290 mutex_lock(&pc->sti_pwm_lock); 291 292 if (--pc->en_count) { 293 mutex_unlock(&pc->sti_pwm_lock); 294 return; 295 } 296 297 regmap_field_write(pc->pwm_out_en, 0); 298 299 clk_disable(pc->pwm_clk); 300 clk_disable(pc->cpt_clk); 301 302 mutex_unlock(&pc->sti_pwm_lock); 303 } 304 305 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 306 { 307 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); 308 309 clear_bit(pwm->hwpwm, &pc->configured); 310 } 311 312 static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm, 313 struct pwm_capture *result, unsigned long timeout) 314 { 315 struct sti_pwm_chip *pc = to_sti_pwmchip(chip); 316 struct sti_pwm_compat_data *cdata = pc->cdata; 317 struct sti_cpt_ddata *ddata = pwm_get_chip_data(pwm); 318 struct device *dev = pc->dev; 319 unsigned int effective_ticks; 320 unsigned long long high, low; 321 int ret; 322 323 if (pwm->hwpwm >= cdata->cpt_num_devs) { 324 dev_err(dev, "device %u is not valid\n", pwm->hwpwm); 325 return -EINVAL; 326 } 327 328 mutex_lock(&ddata->lock); 329 ddata->index = 0; 330 331 /* Prepare capture measurement */ 332 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING); 333 regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm)); 334 335 /* Enable capture */ 336 ret = regmap_field_write(pc->pwm_cpt_en, 1); 337 if (ret) { 338 dev_err(dev, "failed to enable PWM capture %u: %d\n", 339 pwm->hwpwm, ret); 340 goto out; 341 } 342 343 ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1, 344 msecs_to_jiffies(timeout)); 345 346 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED); 347 348 if (ret == -ERESTARTSYS) 349 goto out; 350 351 switch (ddata->index) { 352 case 0: 353 case 1: 354 /* 355 * Getting here could mean: 356 * - input signal is constant of less than 1 Hz 357 * - there is no input signal at all 358 * 359 * In such case the frequency is rounded down to 0 360 */ 361 result->period = 0; 362 result->duty_cycle = 0; 363 364 break; 365 366 case 2: 367 /* We have everying we need */ 368 high = ddata->snapshot[1] - ddata->snapshot[0]; 369 low = ddata->snapshot[2] - ddata->snapshot[1]; 370 371 effective_ticks = clk_get_rate(pc->cpt_clk); 372 373 result->period = (high + low) * NSEC_PER_SEC; 374 result->period /= effective_ticks; 375 376 result->duty_cycle = high * NSEC_PER_SEC; 377 result->duty_cycle /= effective_ticks; 378 379 break; 380 381 default: 382 dev_err(dev, "internal error\n"); 383 break; 384 } 385 386 out: 387 /* Disable capture */ 388 regmap_field_write(pc->pwm_cpt_en, 0); 389 390 mutex_unlock(&ddata->lock); 391 return ret; 392 } 393 394 static const struct pwm_ops sti_pwm_ops = { 395 .capture = sti_pwm_capture, 396 .config = sti_pwm_config, 397 .enable = sti_pwm_enable, 398 .disable = sti_pwm_disable, 399 .free = sti_pwm_free, 400 .owner = THIS_MODULE, 401 }; 402 403 static irqreturn_t sti_pwm_interrupt(int irq, void *data) 404 { 405 struct sti_pwm_chip *pc = data; 406 struct device *dev = pc->dev; 407 struct sti_cpt_ddata *ddata; 408 int devicenum; 409 unsigned int cpt_int_stat; 410 unsigned int reg; 411 int ret = IRQ_NONE; 412 413 ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat); 414 if (ret) 415 return ret; 416 417 while (cpt_int_stat) { 418 devicenum = ffs(cpt_int_stat) - 1; 419 420 ddata = pwm_get_chip_data(&pc->chip.pwms[devicenum]); 421 422 /* 423 * Capture input: 424 * _______ _______ 425 * | | | | 426 * __| |_________________| |________ 427 * ^0 ^1 ^2 428 * 429 * Capture start by the first available rising edge. When a 430 * capture event occurs, capture value (CPT_VALx) is stored, 431 * index incremented, capture edge changed. 432 * 433 * After the capture, if the index > 1, we have collected the 434 * necessary data so we signal the thread waiting for it and 435 * disable the capture by setting capture edge to none 436 */ 437 438 regmap_read(pc->regmap, 439 PWM_CPT_VAL(devicenum), 440 &ddata->snapshot[ddata->index]); 441 442 switch (ddata->index) { 443 case 0: 444 case 1: 445 regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), ®); 446 reg ^= PWM_CPT_EDGE_MASK; 447 regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg); 448 449 ddata->index++; 450 break; 451 452 case 2: 453 regmap_write(pc->regmap, 454 PWM_CPT_EDGE(devicenum), 455 CPT_EDGE_DISABLED); 456 wake_up(&ddata->wait); 457 break; 458 459 default: 460 dev_err(dev, "Internal error\n"); 461 } 462 463 cpt_int_stat &= ~BIT_MASK(devicenum); 464 465 ret = IRQ_HANDLED; 466 } 467 468 /* Just ACK everything */ 469 regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK); 470 471 return ret; 472 } 473 474 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc) 475 { 476 struct device *dev = pc->dev; 477 const struct reg_field *reg_fields; 478 struct device_node *np = dev->of_node; 479 struct sti_pwm_compat_data *cdata = pc->cdata; 480 u32 num_devs; 481 int ret; 482 483 ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs); 484 if (!ret) 485 cdata->pwm_num_devs = num_devs; 486 487 ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs); 488 if (!ret) 489 cdata->cpt_num_devs = num_devs; 490 491 if (!cdata->pwm_num_devs && !cdata->cpt_num_devs) { 492 dev_err(dev, "No channels configured\n"); 493 return -EINVAL; 494 } 495 496 reg_fields = cdata->reg_fields; 497 498 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap, 499 reg_fields[PWMCLK_PRESCALE_LOW]); 500 if (IS_ERR(pc->prescale_low)) 501 return PTR_ERR(pc->prescale_low); 502 503 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap, 504 reg_fields[PWMCLK_PRESCALE_HIGH]); 505 if (IS_ERR(pc->prescale_high)) 506 return PTR_ERR(pc->prescale_high); 507 508 509 pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap, 510 reg_fields[PWM_OUT_EN]); 511 if (IS_ERR(pc->pwm_out_en)) 512 return PTR_ERR(pc->pwm_out_en); 513 514 pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap, 515 reg_fields[PWM_CPT_EN]); 516 if (IS_ERR(pc->pwm_cpt_en)) 517 return PTR_ERR(pc->pwm_cpt_en); 518 519 pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap, 520 reg_fields[PWM_CPT_INT_EN]); 521 if (IS_ERR(pc->pwm_cpt_int_en)) 522 return PTR_ERR(pc->pwm_cpt_int_en); 523 524 pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap, 525 reg_fields[PWM_CPT_INT_STAT]); 526 if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat)) 527 return PTR_ERR(pc->pwm_cpt_int_stat); 528 529 return 0; 530 } 531 532 static const struct regmap_config sti_pwm_regmap_config = { 533 .reg_bits = 32, 534 .val_bits = 32, 535 .reg_stride = 4, 536 }; 537 538 static int sti_pwm_probe(struct platform_device *pdev) 539 { 540 struct device *dev = &pdev->dev; 541 struct sti_pwm_compat_data *cdata; 542 struct sti_pwm_chip *pc; 543 struct resource *res; 544 unsigned int i; 545 int irq, ret; 546 547 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL); 548 if (!pc) 549 return -ENOMEM; 550 551 cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL); 552 if (!cdata) 553 return -ENOMEM; 554 555 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 556 557 pc->mmio = devm_ioremap_resource(dev, res); 558 if (IS_ERR(pc->mmio)) 559 return PTR_ERR(pc->mmio); 560 561 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio, 562 &sti_pwm_regmap_config); 563 if (IS_ERR(pc->regmap)) 564 return PTR_ERR(pc->regmap); 565 566 irq = platform_get_irq(pdev, 0); 567 if (irq < 0) { 568 dev_err(&pdev->dev, "Failed to obtain IRQ\n"); 569 return irq; 570 } 571 572 ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0, 573 pdev->name, pc); 574 if (ret < 0) { 575 dev_err(&pdev->dev, "Failed to request IRQ\n"); 576 return ret; 577 } 578 579 /* 580 * Setup PWM data with default values: some values could be replaced 581 * with specific ones provided from Device Tree. 582 */ 583 cdata->reg_fields = sti_pwm_regfields; 584 cdata->max_prescale = 0xff; 585 cdata->max_pwm_cnt = 255; 586 cdata->pwm_num_devs = 0; 587 cdata->cpt_num_devs = 0; 588 589 pc->cdata = cdata; 590 pc->dev = dev; 591 pc->en_count = 0; 592 mutex_init(&pc->sti_pwm_lock); 593 594 ret = sti_pwm_probe_dt(pc); 595 if (ret) 596 return ret; 597 598 if (!cdata->pwm_num_devs) 599 goto skip_pwm; 600 601 pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm"); 602 if (IS_ERR(pc->pwm_clk)) { 603 dev_err(dev, "failed to get PWM clock\n"); 604 return PTR_ERR(pc->pwm_clk); 605 } 606 607 ret = clk_prepare(pc->pwm_clk); 608 if (ret) { 609 dev_err(dev, "failed to prepare clock\n"); 610 return ret; 611 } 612 613 skip_pwm: 614 if (!cdata->cpt_num_devs) 615 goto skip_cpt; 616 617 pc->cpt_clk = of_clk_get_by_name(dev->of_node, "capture"); 618 if (IS_ERR(pc->cpt_clk)) { 619 dev_err(dev, "failed to get PWM capture clock\n"); 620 return PTR_ERR(pc->cpt_clk); 621 } 622 623 ret = clk_prepare(pc->cpt_clk); 624 if (ret) { 625 dev_err(dev, "failed to prepare clock\n"); 626 return ret; 627 } 628 629 skip_cpt: 630 pc->chip.dev = dev; 631 pc->chip.ops = &sti_pwm_ops; 632 pc->chip.base = -1; 633 pc->chip.npwm = pc->cdata->pwm_num_devs; 634 635 ret = pwmchip_add(&pc->chip); 636 if (ret < 0) { 637 clk_unprepare(pc->pwm_clk); 638 clk_unprepare(pc->cpt_clk); 639 return ret; 640 } 641 642 for (i = 0; i < cdata->cpt_num_devs; i++) { 643 struct sti_cpt_ddata *ddata; 644 645 ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL); 646 if (!ddata) 647 return -ENOMEM; 648 649 init_waitqueue_head(&ddata->wait); 650 mutex_init(&ddata->lock); 651 652 pwm_set_chip_data(&pc->chip.pwms[i], ddata); 653 } 654 655 platform_set_drvdata(pdev, pc); 656 657 return 0; 658 } 659 660 static int sti_pwm_remove(struct platform_device *pdev) 661 { 662 struct sti_pwm_chip *pc = platform_get_drvdata(pdev); 663 unsigned int i; 664 665 for (i = 0; i < pc->cdata->pwm_num_devs; i++) 666 pwm_disable(&pc->chip.pwms[i]); 667 668 clk_unprepare(pc->pwm_clk); 669 clk_unprepare(pc->cpt_clk); 670 671 return pwmchip_remove(&pc->chip); 672 } 673 674 static const struct of_device_id sti_pwm_of_match[] = { 675 { .compatible = "st,sti-pwm", }, 676 { /* sentinel */ } 677 }; 678 MODULE_DEVICE_TABLE(of, sti_pwm_of_match); 679 680 static struct platform_driver sti_pwm_driver = { 681 .driver = { 682 .name = "sti-pwm", 683 .of_match_table = sti_pwm_of_match, 684 }, 685 .probe = sti_pwm_probe, 686 .remove = sti_pwm_remove, 687 }; 688 module_platform_driver(sti_pwm_driver); 689 690 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>"); 691 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver"); 692 MODULE_LICENSE("GPL"); 693