1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PWM framework driver for Cirrus Logic EP93xx 4 * 5 * Copyright (c) 2009 Matthieu Crapet <mcrapet@gmail.com> 6 * Copyright (c) 2009, 2013 H Hartley Sweeten <hsweeten@visionengravers.com> 7 * 8 * EP9301/02 have only one channel: 9 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14) 10 * 11 * EP9307 has only one channel: 12 * platform device ep93xx-pwm.0 - PWMOUT 13 * 14 * EP9312/15 have two channels: 15 * platform device ep93xx-pwm.0 - PWMOUT 16 * platform device ep93xx-pwm.1 - PWMOUT1 (EGPIO14) 17 */ 18 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 #include <linux/slab.h> 22 #include <linux/clk.h> 23 #include <linux/err.h> 24 #include <linux/io.h> 25 #include <linux/pwm.h> 26 27 #include <asm/div64.h> 28 29 #include <linux/soc/cirrus/ep93xx.h> /* for ep93xx_pwm_{acquire,release}_gpio() */ 30 31 #define EP93XX_PWMx_TERM_COUNT 0x00 32 #define EP93XX_PWMx_DUTY_CYCLE 0x04 33 #define EP93XX_PWMx_ENABLE 0x08 34 #define EP93XX_PWMx_INVERT 0x0c 35 36 struct ep93xx_pwm { 37 void __iomem *base; 38 struct clk *clk; 39 struct pwm_chip chip; 40 }; 41 42 static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip) 43 { 44 return container_of(chip, struct ep93xx_pwm, chip); 45 } 46 47 static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 48 { 49 struct platform_device *pdev = to_platform_device(chip->dev); 50 51 return ep93xx_pwm_acquire_gpio(pdev); 52 } 53 54 static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) 55 { 56 struct platform_device *pdev = to_platform_device(chip->dev); 57 58 ep93xx_pwm_release_gpio(pdev); 59 } 60 61 static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 62 const struct pwm_state *state) 63 { 64 int ret; 65 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); 66 bool enabled = state->enabled; 67 68 if (state->polarity != pwm->state.polarity) { 69 if (enabled) { 70 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); 71 clk_disable_unprepare(ep93xx_pwm->clk); 72 enabled = false; 73 } 74 75 /* 76 * The clock needs to be enabled to access the PWM registers. 77 * Polarity can only be changed when the PWM is disabled. 78 */ 79 ret = clk_prepare_enable(ep93xx_pwm->clk); 80 if (ret) 81 return ret; 82 83 if (state->polarity == PWM_POLARITY_INVERSED) 84 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_INVERT); 85 else 86 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_INVERT); 87 88 clk_disable_unprepare(ep93xx_pwm->clk); 89 } 90 91 if (!state->enabled) { 92 if (enabled) { 93 writew(0x0, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); 94 clk_disable_unprepare(ep93xx_pwm->clk); 95 } 96 97 return 0; 98 } 99 100 if (state->period != pwm->state.period || 101 state->duty_cycle != pwm->state.duty_cycle) { 102 struct ep93xx_pwm *ep93xx_pwm = to_ep93xx_pwm(chip); 103 void __iomem *base = ep93xx_pwm->base; 104 unsigned long long c; 105 unsigned long period_cycles; 106 unsigned long duty_cycles; 107 unsigned long term; 108 109 /* 110 * The clock needs to be enabled to access the PWM registers. 111 * Configuration can be changed at any time. 112 */ 113 if (!pwm_is_enabled(pwm)) { 114 ret = clk_prepare_enable(ep93xx_pwm->clk); 115 if (ret) 116 return ret; 117 } 118 119 c = clk_get_rate(ep93xx_pwm->clk); 120 c *= state->period; 121 do_div(c, 1000000000); 122 period_cycles = c; 123 124 c = period_cycles; 125 c *= state->duty_cycle; 126 do_div(c, state->period); 127 duty_cycles = c; 128 129 if (period_cycles < 0x10000 && duty_cycles < 0x10000) { 130 term = readw(base + EP93XX_PWMx_TERM_COUNT); 131 132 /* Order is important if PWM is running */ 133 if (period_cycles > term) { 134 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); 135 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); 136 } else { 137 writew(duty_cycles, base + EP93XX_PWMx_DUTY_CYCLE); 138 writew(period_cycles, base + EP93XX_PWMx_TERM_COUNT); 139 } 140 ret = 0; 141 } else { 142 ret = -EINVAL; 143 } 144 145 if (!pwm_is_enabled(pwm)) 146 clk_disable_unprepare(ep93xx_pwm->clk); 147 148 if (ret) 149 return ret; 150 } 151 152 if (!enabled) { 153 ret = clk_prepare_enable(ep93xx_pwm->clk); 154 if (ret) 155 return ret; 156 157 writew(0x1, ep93xx_pwm->base + EP93XX_PWMx_ENABLE); 158 } 159 160 return 0; 161 } 162 163 static const struct pwm_ops ep93xx_pwm_ops = { 164 .request = ep93xx_pwm_request, 165 .free = ep93xx_pwm_free, 166 .apply = ep93xx_pwm_apply, 167 .owner = THIS_MODULE, 168 }; 169 170 static int ep93xx_pwm_probe(struct platform_device *pdev) 171 { 172 struct ep93xx_pwm *ep93xx_pwm; 173 int ret; 174 175 ep93xx_pwm = devm_kzalloc(&pdev->dev, sizeof(*ep93xx_pwm), GFP_KERNEL); 176 if (!ep93xx_pwm) 177 return -ENOMEM; 178 179 ep93xx_pwm->base = devm_platform_ioremap_resource(pdev, 0); 180 if (IS_ERR(ep93xx_pwm->base)) 181 return PTR_ERR(ep93xx_pwm->base); 182 183 ep93xx_pwm->clk = devm_clk_get(&pdev->dev, "pwm_clk"); 184 if (IS_ERR(ep93xx_pwm->clk)) 185 return PTR_ERR(ep93xx_pwm->clk); 186 187 ep93xx_pwm->chip.dev = &pdev->dev; 188 ep93xx_pwm->chip.ops = &ep93xx_pwm_ops; 189 ep93xx_pwm->chip.npwm = 1; 190 191 ret = pwmchip_add(&ep93xx_pwm->chip); 192 if (ret < 0) 193 return ret; 194 195 platform_set_drvdata(pdev, ep93xx_pwm); 196 return 0; 197 } 198 199 static int ep93xx_pwm_remove(struct platform_device *pdev) 200 { 201 struct ep93xx_pwm *ep93xx_pwm = platform_get_drvdata(pdev); 202 203 return pwmchip_remove(&ep93xx_pwm->chip); 204 } 205 206 static struct platform_driver ep93xx_pwm_driver = { 207 .driver = { 208 .name = "ep93xx-pwm", 209 }, 210 .probe = ep93xx_pwm_probe, 211 .remove = ep93xx_pwm_remove, 212 }; 213 module_platform_driver(ep93xx_pwm_driver); 214 215 MODULE_DESCRIPTION("Cirrus Logic EP93xx PWM driver"); 216 MODULE_AUTHOR("Matthieu Crapet <mcrapet@gmail.com>"); 217 MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>"); 218 MODULE_ALIAS("platform:ep93xx-pwm"); 219 MODULE_LICENSE("GPL"); 220