1af873fceSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
26173f8f4SThierry Reding /*
36173f8f4SThierry Reding * Copyright (C) ST-Ericsson SA 2010
46173f8f4SThierry Reding *
56173f8f4SThierry Reding * Author: Arun R Murthy <arun.murthy@stericsson.com>
6486dd4e8SUwe Kleine-König * Datasheet: https://web.archive.org/web/20130614115108/http://www.stericsson.com/developers/CD00291561_UM1031_AB8500_user_manual-rev5_CTDS_public.pdf
76173f8f4SThierry Reding */
86173f8f4SThierry Reding #include <linux/err.h>
96173f8f4SThierry Reding #include <linux/platform_device.h>
106173f8f4SThierry Reding #include <linux/slab.h>
116173f8f4SThierry Reding #include <linux/pwm.h>
126173f8f4SThierry Reding #include <linux/mfd/abx500.h>
136173f8f4SThierry Reding #include <linux/mfd/abx500/ab8500.h>
146173f8f4SThierry Reding #include <linux/module.h>
156173f8f4SThierry Reding
166173f8f4SThierry Reding /*
176173f8f4SThierry Reding * PWM Out generators
186173f8f4SThierry Reding * Bank: 0x10
196173f8f4SThierry Reding */
206173f8f4SThierry Reding #define AB8500_PWM_OUT_CTRL1_REG 0x60
216173f8f4SThierry Reding #define AB8500_PWM_OUT_CTRL2_REG 0x61
226173f8f4SThierry Reding #define AB8500_PWM_OUT_CTRL7_REG 0x66
236173f8f4SThierry Reding
24486dd4e8SUwe Kleine-König #define AB8500_PWM_CLKRATE 9600000
25486dd4e8SUwe Kleine-König
266173f8f4SThierry Reding struct ab8500_pwm_chip {
276173f8f4SThierry Reding struct pwm_chip chip;
28eb41f334SUwe Kleine-König unsigned int hwid;
296173f8f4SThierry Reding };
306173f8f4SThierry Reding
ab8500_pwm_from_chip(struct pwm_chip * chip)31eb41f334SUwe Kleine-König static struct ab8500_pwm_chip *ab8500_pwm_from_chip(struct pwm_chip *chip)
32eb41f334SUwe Kleine-König {
33eb41f334SUwe Kleine-König return container_of(chip, struct ab8500_pwm_chip, chip);
34eb41f334SUwe Kleine-König }
35eb41f334SUwe Kleine-König
ab8500_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)36acf3402dSUwe Kleine-König static int ab8500_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
37acf3402dSUwe Kleine-König const struct pwm_state *state)
386173f8f4SThierry Reding {
39acf3402dSUwe Kleine-König int ret;
406173f8f4SThierry Reding u8 reg;
41486dd4e8SUwe Kleine-König u8 higher_val, lower_val;
42486dd4e8SUwe Kleine-König unsigned int duty_steps, div;
43eb41f334SUwe Kleine-König struct ab8500_pwm_chip *ab8500 = ab8500_pwm_from_chip(chip);
44acf3402dSUwe Kleine-König
45acf3402dSUwe Kleine-König if (state->polarity != PWM_POLARITY_NORMAL)
46acf3402dSUwe Kleine-König return -EINVAL;
47acf3402dSUwe Kleine-König
48486dd4e8SUwe Kleine-König if (state->enabled) {
49486dd4e8SUwe Kleine-König /*
50486dd4e8SUwe Kleine-König * A time quantum is
51486dd4e8SUwe Kleine-König * q = (32 - FreqPWMOutx[3:0]) / AB8500_PWM_CLKRATE
52486dd4e8SUwe Kleine-König * The period is always 1024 q, duty_cycle is between 1q and 1024q.
53486dd4e8SUwe Kleine-König *
54486dd4e8SUwe Kleine-König * FreqPWMOutx[3:0] | output frequency | output frequency | 1024q = period
55486dd4e8SUwe Kleine-König * | (from manual) | (1 / 1024q) | = 1 / freq
56486dd4e8SUwe Kleine-König * -----------------+------------------+------------------+--------------
57486dd4e8SUwe Kleine-König * b0000 | 293 Hz | 292.968750 Hz | 3413333.33 ns
58486dd4e8SUwe Kleine-König * b0001 | 302 Hz | 302.419355 Hz | 3306666.66 ns
59486dd4e8SUwe Kleine-König * b0010 | 312 Hz | 312.500000 Hz | 3200000 ns
60486dd4e8SUwe Kleine-König * b0011 | 323 Hz | 323.275862 Hz | 3093333.33 ns
61486dd4e8SUwe Kleine-König * b0100 | 334 Hz | 334.821429 Hz | 2986666.66 ns
62486dd4e8SUwe Kleine-König * b0101 | 347 Hz | 347.222222 Hz | 2880000 ns
63486dd4e8SUwe Kleine-König * b0110 | 360 Hz | 360.576923 Hz | 2773333.33 ns
64486dd4e8SUwe Kleine-König * b0111 | 375 Hz | 375.000000 Hz | 2666666.66 ns
65486dd4e8SUwe Kleine-König * b1000 | 390 Hz | 390.625000 Hz | 2560000 ns
66486dd4e8SUwe Kleine-König * b1001 | 407 Hz | 407.608696 Hz | 2453333.33 ns
67486dd4e8SUwe Kleine-König * b1010 | 426 Hz | 426.136364 Hz | 2346666.66 ns
68486dd4e8SUwe Kleine-König * b1011 | 446 Hz | 446.428571 Hz | 2240000 ns
69486dd4e8SUwe Kleine-König * b1100 | 468 Hz | 468.750000 Hz | 2133333.33 ns
70486dd4e8SUwe Kleine-König * b1101 | 493 Hz | 493.421053 Hz | 2026666.66 ns
71486dd4e8SUwe Kleine-König * b1110 | 520 Hz | 520.833333 Hz | 1920000 ns
72486dd4e8SUwe Kleine-König * b1111 | 551 Hz | 551.470588 Hz | 1813333.33 ns
73486dd4e8SUwe Kleine-König *
74486dd4e8SUwe Kleine-König *
75486dd4e8SUwe Kleine-König * AB8500_PWM_CLKRATE is a multiple of 1024, so the division by
76486dd4e8SUwe Kleine-König * 1024 can be done in this factor without loss of precision.
77486dd4e8SUwe Kleine-König */
78486dd4e8SUwe Kleine-König div = min_t(u64, mul_u64_u64_div_u64(state->period,
79486dd4e8SUwe Kleine-König AB8500_PWM_CLKRATE >> 10,
80486dd4e8SUwe Kleine-König NSEC_PER_SEC), 32); /* 32 - FreqPWMOutx[3:0] */
81486dd4e8SUwe Kleine-König if (div <= 16)
82486dd4e8SUwe Kleine-König /* requested period < 3413333.33 */
83486dd4e8SUwe Kleine-König return -EINVAL;
84486dd4e8SUwe Kleine-König
85486dd4e8SUwe Kleine-König duty_steps = max_t(u64, mul_u64_u64_div_u64(state->duty_cycle,
86486dd4e8SUwe Kleine-König AB8500_PWM_CLKRATE,
87486dd4e8SUwe Kleine-König (u64)NSEC_PER_SEC * div), 1024);
88486dd4e8SUwe Kleine-König }
89486dd4e8SUwe Kleine-König
90486dd4e8SUwe Kleine-König /*
91486dd4e8SUwe Kleine-König * The hardware doesn't support duty_steps = 0 explicitly, but emits low
92486dd4e8SUwe Kleine-König * when disabled.
93486dd4e8SUwe Kleine-König */
94486dd4e8SUwe Kleine-König if (!state->enabled || duty_steps == 0) {
95acf3402dSUwe Kleine-König ret = abx500_mask_and_set_register_interruptible(chip->dev,
96acf3402dSUwe Kleine-König AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
97eb41f334SUwe Kleine-König 1 << ab8500->hwid, 0);
98acf3402dSUwe Kleine-König
99acf3402dSUwe Kleine-König if (ret < 0)
100acf3402dSUwe Kleine-König dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n",
101acf3402dSUwe Kleine-König pwm->label, ret);
102acf3402dSUwe Kleine-König return ret;
103acf3402dSUwe Kleine-König }
1046173f8f4SThierry Reding
1056173f8f4SThierry Reding /*
106486dd4e8SUwe Kleine-König * The lower 8 bits of duty_steps is written to ...
1076173f8f4SThierry Reding * AB8500_PWM_OUT_CTRL1_REG[0:7]
1086173f8f4SThierry Reding */
109486dd4e8SUwe Kleine-König lower_val = (duty_steps - 1) & 0x00ff;
1106173f8f4SThierry Reding /*
111486dd4e8SUwe Kleine-König * The two remaining high bits to
112486dd4e8SUwe Kleine-König * AB8500_PWM_OUT_CTRL2_REG[0:1]; together with FreqPWMOutx.
1136173f8f4SThierry Reding */
114486dd4e8SUwe Kleine-König higher_val = ((duty_steps - 1) & 0x0300) >> 8 | (32 - div) << 4;
1156173f8f4SThierry Reding
116eb41f334SUwe Kleine-König reg = AB8500_PWM_OUT_CTRL1_REG + (ab8500->hwid * 2);
1176173f8f4SThierry Reding
1186173f8f4SThierry Reding ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC,
119486dd4e8SUwe Kleine-König reg, lower_val);
1206173f8f4SThierry Reding if (ret < 0)
1216173f8f4SThierry Reding return ret;
122acf3402dSUwe Kleine-König
1236173f8f4SThierry Reding ret = abx500_set_register_interruptible(chip->dev, AB8500_MISC,
124486dd4e8SUwe Kleine-König (reg + 1), higher_val);
125acf3402dSUwe Kleine-König if (ret < 0)
1266173f8f4SThierry Reding return ret;
1276173f8f4SThierry Reding
128486dd4e8SUwe Kleine-König /* enable */
1296173f8f4SThierry Reding ret = abx500_mask_and_set_register_interruptible(chip->dev,
1306173f8f4SThierry Reding AB8500_MISC, AB8500_PWM_OUT_CTRL7_REG,
131eb41f334SUwe Kleine-König 1 << ab8500->hwid, 1 << ab8500->hwid);
1326173f8f4SThierry Reding if (ret < 0)
133622fc5d4SAxel Lin dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n",
1346173f8f4SThierry Reding pwm->label, ret);
135acf3402dSUwe Kleine-König
1366173f8f4SThierry Reding return ret;
1376173f8f4SThierry Reding }
1386173f8f4SThierry Reding
ab8500_pwm_get_state(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_state * state)13932743788SUwe Kleine-König static int ab8500_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
14032743788SUwe Kleine-König struct pwm_state *state)
14132743788SUwe Kleine-König {
14232743788SUwe Kleine-König u8 ctrl7, lower_val, higher_val;
14332743788SUwe Kleine-König int ret;
14432743788SUwe Kleine-König struct ab8500_pwm_chip *ab8500 = ab8500_pwm_from_chip(chip);
14532743788SUwe Kleine-König unsigned int div, duty_steps;
14632743788SUwe Kleine-König
14732743788SUwe Kleine-König ret = abx500_get_register_interruptible(chip->dev, AB8500_MISC,
14832743788SUwe Kleine-König AB8500_PWM_OUT_CTRL7_REG,
14932743788SUwe Kleine-König &ctrl7);
15032743788SUwe Kleine-König if (ret)
15132743788SUwe Kleine-König return ret;
15232743788SUwe Kleine-König
15332743788SUwe Kleine-König state->polarity = PWM_POLARITY_NORMAL;
15432743788SUwe Kleine-König
15532743788SUwe Kleine-König if (!(ctrl7 & 1 << ab8500->hwid)) {
15632743788SUwe Kleine-König state->enabled = false;
15732743788SUwe Kleine-König return 0;
15832743788SUwe Kleine-König }
15932743788SUwe Kleine-König
16032743788SUwe Kleine-König ret = abx500_get_register_interruptible(chip->dev, AB8500_MISC,
16132743788SUwe Kleine-König AB8500_PWM_OUT_CTRL1_REG + (ab8500->hwid * 2),
16232743788SUwe Kleine-König &lower_val);
16332743788SUwe Kleine-König if (ret)
16432743788SUwe Kleine-König return ret;
16532743788SUwe Kleine-König
16632743788SUwe Kleine-König ret = abx500_get_register_interruptible(chip->dev, AB8500_MISC,
16732743788SUwe Kleine-König AB8500_PWM_OUT_CTRL2_REG + (ab8500->hwid * 2),
16832743788SUwe Kleine-König &higher_val);
16932743788SUwe Kleine-König if (ret)
17032743788SUwe Kleine-König return ret;
17132743788SUwe Kleine-König
17232743788SUwe Kleine-König div = 32 - ((higher_val & 0xf0) >> 4);
17332743788SUwe Kleine-König duty_steps = ((higher_val & 3) << 8 | lower_val) + 1;
17432743788SUwe Kleine-König
17532743788SUwe Kleine-König state->period = DIV64_U64_ROUND_UP((u64)div << 10, AB8500_PWM_CLKRATE);
17632743788SUwe Kleine-König state->duty_cycle = DIV64_U64_ROUND_UP((u64)div * duty_steps, AB8500_PWM_CLKRATE);
17732743788SUwe Kleine-König
17832743788SUwe Kleine-König return 0;
17932743788SUwe Kleine-König }
18032743788SUwe Kleine-König
1816173f8f4SThierry Reding static const struct pwm_ops ab8500_pwm_ops = {
182acf3402dSUwe Kleine-König .apply = ab8500_pwm_apply,
18332743788SUwe Kleine-König .get_state = ab8500_pwm_get_state,
184fa0abee9SAxel Lin .owner = THIS_MODULE,
1856173f8f4SThierry Reding };
1866173f8f4SThierry Reding
ab8500_pwm_probe(struct platform_device * pdev)1873e9fe83dSBill Pemberton static int ab8500_pwm_probe(struct platform_device *pdev)
1886173f8f4SThierry Reding {
1896173f8f4SThierry Reding struct ab8500_pwm_chip *ab8500;
1906173f8f4SThierry Reding int err;
1916173f8f4SThierry Reding
192eb41f334SUwe Kleine-König if (pdev->id < 1 || pdev->id > 31)
193*cdcffafcSDan Carpenter return dev_err_probe(&pdev->dev, -EINVAL, "Invalid device id %d\n", pdev->id);
194eb41f334SUwe Kleine-König
1956173f8f4SThierry Reding /*
1966173f8f4SThierry Reding * Nothing to be done in probe, this is required to get the
1976173f8f4SThierry Reding * device which is required for ab8500 read and write
1986173f8f4SThierry Reding */
199482467adSJingoo Han ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
200a2fc1db6SJingoo Han if (ab8500 == NULL)
2016173f8f4SThierry Reding return -ENOMEM;
2026173f8f4SThierry Reding
2036173f8f4SThierry Reding ab8500->chip.dev = &pdev->dev;
2046173f8f4SThierry Reding ab8500->chip.ops = &ab8500_pwm_ops;
2056173f8f4SThierry Reding ab8500->chip.npwm = 1;
206eb41f334SUwe Kleine-König ab8500->hwid = pdev->id - 1;
2076173f8f4SThierry Reding
20814ac9e17SUwe Kleine-König err = devm_pwmchip_add(&pdev->dev, &ab8500->chip);
209482467adSJingoo Han if (err < 0)
2102e978a45SUwe Kleine-König return dev_err_probe(&pdev->dev, err, "Failed to add pwm chip\n");
2116173f8f4SThierry Reding
2126173f8f4SThierry Reding dev_dbg(&pdev->dev, "pwm probe successful\n");
2136173f8f4SThierry Reding
2146173f8f4SThierry Reding return 0;
2156173f8f4SThierry Reding }
2166173f8f4SThierry Reding
2176173f8f4SThierry Reding static struct platform_driver ab8500_pwm_driver = {
2186173f8f4SThierry Reding .driver = {
2196173f8f4SThierry Reding .name = "ab8500-pwm",
2206173f8f4SThierry Reding },
2216173f8f4SThierry Reding .probe = ab8500_pwm_probe,
2226173f8f4SThierry Reding };
2236173f8f4SThierry Reding module_platform_driver(ab8500_pwm_driver);
2246173f8f4SThierry Reding
2256173f8f4SThierry Reding MODULE_AUTHOR("Arun MURTHY <arun.murthy@stericsson.com>");
2266173f8f4SThierry Reding MODULE_DESCRIPTION("AB8500 Pulse Width Modulation Driver");
2276173f8f4SThierry Reding MODULE_ALIAS("platform:ab8500-pwm");
2286173f8f4SThierry Reding MODULE_LICENSE("GPL v2");
229