1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * PTP 1588 clock for Freescale QorIQ 1588 timer 4 * 5 * Copyright (C) 2010 OMICRON electronics GmbH 6 */ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/device.h> 11 #include <linux/hrtimer.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/of.h> 15 #include <linux/of_platform.h> 16 #include <linux/timex.h> 17 #include <linux/slab.h> 18 #include <linux/clk.h> 19 20 #include <linux/fsl/ptp_qoriq.h> 21 22 /* 23 * Register access functions 24 */ 25 26 /* Caller must hold ptp_qoriq->lock. */ 27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq) 28 { 29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 30 u64 ns; 31 u32 lo, hi; 32 33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l); 34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h); 35 ns = ((u64) hi) << 32; 36 ns |= lo; 37 return ns; 38 } 39 40 /* Caller must hold ptp_qoriq->lock. */ 41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns) 42 { 43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 44 u32 hi = ns >> 32; 45 u32 lo = ns & 0xffffffff; 46 47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo); 48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi); 49 } 50 51 /* Caller must hold ptp_qoriq->lock. */ 52 static void set_alarm(struct ptp_qoriq *ptp_qoriq) 53 { 54 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 55 u64 ns; 56 u32 lo, hi; 57 58 ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL; 59 ns = div_u64(ns, 1000000000UL) * 1000000000ULL; 60 ns -= ptp_qoriq->tclk_period; 61 hi = ns >> 32; 62 lo = ns & 0xffffffff; 63 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo); 64 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi); 65 } 66 67 /* Caller must hold ptp_qoriq->lock. */ 68 static void set_fipers(struct ptp_qoriq *ptp_qoriq) 69 { 70 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 71 72 set_alarm(ptp_qoriq); 73 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1); 74 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2); 75 } 76 77 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event) 78 { 79 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 80 struct ptp_clock_event event; 81 void __iomem *reg_etts_l; 82 void __iomem *reg_etts_h; 83 u32 valid, lo, hi; 84 85 switch (index) { 86 case 0: 87 valid = ETS1_VLD; 88 reg_etts_l = ®s->etts_regs->tmr_etts1_l; 89 reg_etts_h = ®s->etts_regs->tmr_etts1_h; 90 break; 91 case 1: 92 valid = ETS2_VLD; 93 reg_etts_l = ®s->etts_regs->tmr_etts2_l; 94 reg_etts_h = ®s->etts_regs->tmr_etts2_h; 95 break; 96 default: 97 return -EINVAL; 98 } 99 100 event.type = PTP_CLOCK_EXTTS; 101 event.index = index; 102 103 if (ptp_qoriq->extts_fifo_support) 104 if (!(ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid)) 105 return 0; 106 107 do { 108 lo = ptp_qoriq->read(reg_etts_l); 109 hi = ptp_qoriq->read(reg_etts_h); 110 111 if (update_event) { 112 event.timestamp = ((u64) hi) << 32; 113 event.timestamp |= lo; 114 ptp_clock_event(ptp_qoriq->clock, &event); 115 } 116 117 if (!ptp_qoriq->extts_fifo_support) 118 break; 119 } while (ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid); 120 121 return 0; 122 } 123 EXPORT_SYMBOL_GPL(extts_clean_up); 124 125 /* 126 * Interrupt service routine 127 */ 128 129 irqreturn_t ptp_qoriq_isr(int irq, void *priv) 130 { 131 struct ptp_qoriq *ptp_qoriq = priv; 132 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 133 struct ptp_clock_event event; 134 u64 ns; 135 u32 ack = 0, lo, hi, mask, val, irqs; 136 137 spin_lock(&ptp_qoriq->lock); 138 139 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent); 140 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask); 141 142 spin_unlock(&ptp_qoriq->lock); 143 144 irqs = val & mask; 145 146 if (irqs & ETS1) { 147 ack |= ETS1; 148 extts_clean_up(ptp_qoriq, 0, true); 149 } 150 151 if (irqs & ETS2) { 152 ack |= ETS2; 153 extts_clean_up(ptp_qoriq, 1, true); 154 } 155 156 if (irqs & ALM2) { 157 ack |= ALM2; 158 if (ptp_qoriq->alarm_value) { 159 event.type = PTP_CLOCK_ALARM; 160 event.index = 0; 161 event.timestamp = ptp_qoriq->alarm_value; 162 ptp_clock_event(ptp_qoriq->clock, &event); 163 } 164 if (ptp_qoriq->alarm_interval) { 165 ns = ptp_qoriq->alarm_value + ptp_qoriq->alarm_interval; 166 hi = ns >> 32; 167 lo = ns & 0xffffffff; 168 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_l, lo); 169 ptp_qoriq->write(®s->alarm_regs->tmr_alarm2_h, hi); 170 ptp_qoriq->alarm_value = ns; 171 } else { 172 spin_lock(&ptp_qoriq->lock); 173 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask); 174 mask &= ~ALM2EN; 175 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask); 176 spin_unlock(&ptp_qoriq->lock); 177 ptp_qoriq->alarm_value = 0; 178 ptp_qoriq->alarm_interval = 0; 179 } 180 } 181 182 if (irqs & PP1) { 183 ack |= PP1; 184 event.type = PTP_CLOCK_PPS; 185 ptp_clock_event(ptp_qoriq->clock, &event); 186 } 187 188 if (ack) { 189 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack); 190 return IRQ_HANDLED; 191 } else 192 return IRQ_NONE; 193 } 194 EXPORT_SYMBOL_GPL(ptp_qoriq_isr); 195 196 /* 197 * PTP clock operations 198 */ 199 200 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 201 { 202 u64 adj, diff; 203 u32 tmr_add; 204 int neg_adj = 0; 205 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps); 206 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 207 208 if (scaled_ppm < 0) { 209 neg_adj = 1; 210 scaled_ppm = -scaled_ppm; 211 } 212 tmr_add = ptp_qoriq->tmr_add; 213 adj = tmr_add; 214 215 /* calculate diff as adj*(scaled_ppm/65536)/1000000 216 * and round() to the nearest integer 217 */ 218 adj *= scaled_ppm; 219 diff = div_u64(adj, 8000000); 220 diff = (diff >> 13) + ((diff >> 12) & 1); 221 222 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff; 223 224 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add); 225 226 return 0; 227 } 228 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine); 229 230 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta) 231 { 232 s64 now; 233 unsigned long flags; 234 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps); 235 236 spin_lock_irqsave(&ptp_qoriq->lock, flags); 237 238 now = tmr_cnt_read(ptp_qoriq); 239 now += delta; 240 tmr_cnt_write(ptp_qoriq, now); 241 set_fipers(ptp_qoriq); 242 243 spin_unlock_irqrestore(&ptp_qoriq->lock, flags); 244 245 return 0; 246 } 247 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime); 248 249 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) 250 { 251 u64 ns; 252 unsigned long flags; 253 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps); 254 255 spin_lock_irqsave(&ptp_qoriq->lock, flags); 256 257 ns = tmr_cnt_read(ptp_qoriq); 258 259 spin_unlock_irqrestore(&ptp_qoriq->lock, flags); 260 261 *ts = ns_to_timespec64(ns); 262 263 return 0; 264 } 265 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime); 266 267 int ptp_qoriq_settime(struct ptp_clock_info *ptp, 268 const struct timespec64 *ts) 269 { 270 u64 ns; 271 unsigned long flags; 272 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps); 273 274 ns = timespec64_to_ns(ts); 275 276 spin_lock_irqsave(&ptp_qoriq->lock, flags); 277 278 tmr_cnt_write(ptp_qoriq, ns); 279 set_fipers(ptp_qoriq); 280 281 spin_unlock_irqrestore(&ptp_qoriq->lock, flags); 282 283 return 0; 284 } 285 EXPORT_SYMBOL_GPL(ptp_qoriq_settime); 286 287 int ptp_qoriq_enable(struct ptp_clock_info *ptp, 288 struct ptp_clock_request *rq, int on) 289 { 290 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps); 291 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 292 unsigned long flags; 293 u32 bit, mask = 0; 294 295 switch (rq->type) { 296 case PTP_CLK_REQ_EXTTS: 297 switch (rq->extts.index) { 298 case 0: 299 bit = ETS1EN; 300 break; 301 case 1: 302 bit = ETS2EN; 303 break; 304 default: 305 return -EINVAL; 306 } 307 308 if (on) 309 extts_clean_up(ptp_qoriq, rq->extts.index, false); 310 311 break; 312 case PTP_CLK_REQ_PPS: 313 bit = PP1EN; 314 break; 315 default: 316 return -EOPNOTSUPP; 317 } 318 319 spin_lock_irqsave(&ptp_qoriq->lock, flags); 320 321 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask); 322 if (on) { 323 mask |= bit; 324 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit); 325 } else { 326 mask &= ~bit; 327 } 328 329 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask); 330 331 spin_unlock_irqrestore(&ptp_qoriq->lock, flags); 332 return 0; 333 } 334 EXPORT_SYMBOL_GPL(ptp_qoriq_enable); 335 336 static const struct ptp_clock_info ptp_qoriq_caps = { 337 .owner = THIS_MODULE, 338 .name = "qoriq ptp clock", 339 .max_adj = 512000, 340 .n_alarm = 0, 341 .n_ext_ts = N_EXT_TS, 342 .n_per_out = 0, 343 .n_pins = 0, 344 .pps = 1, 345 .adjfine = ptp_qoriq_adjfine, 346 .adjtime = ptp_qoriq_adjtime, 347 .gettime64 = ptp_qoriq_gettime, 348 .settime64 = ptp_qoriq_settime, 349 .enable = ptp_qoriq_enable, 350 }; 351 352 /** 353 * ptp_qoriq_nominal_freq - calculate nominal frequency according to 354 * reference clock frequency 355 * 356 * @clk_src: reference clock frequency 357 * 358 * The nominal frequency is the desired clock frequency. 359 * It should be less than the reference clock frequency. 360 * It should be a factor of 1000MHz. 361 * 362 * Return the nominal frequency 363 */ 364 static u32 ptp_qoriq_nominal_freq(u32 clk_src) 365 { 366 u32 remainder = 0; 367 368 clk_src /= 1000000; 369 remainder = clk_src % 100; 370 if (remainder) { 371 clk_src -= remainder; 372 clk_src += 100; 373 } 374 375 do { 376 clk_src -= 100; 377 378 } while (1000 % clk_src); 379 380 return clk_src * 1000000; 381 } 382 383 /** 384 * ptp_qoriq_auto_config - calculate a set of default configurations 385 * 386 * @ptp_qoriq: pointer to ptp_qoriq 387 * @node: pointer to device_node 388 * 389 * If below dts properties are not provided, this function will be 390 * called to calculate a set of default configurations for them. 391 * "fsl,tclk-period" 392 * "fsl,tmr-prsc" 393 * "fsl,tmr-add" 394 * "fsl,tmr-fiper1" 395 * "fsl,tmr-fiper2" 396 * "fsl,max-adj" 397 * 398 * Return 0 if success 399 */ 400 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq, 401 struct device_node *node) 402 { 403 struct clk *clk; 404 u64 freq_comp; 405 u64 max_adj; 406 u32 nominal_freq; 407 u32 remainder = 0; 408 u32 clk_src = 0; 409 410 ptp_qoriq->cksel = DEFAULT_CKSEL; 411 412 clk = of_clk_get(node, 0); 413 if (!IS_ERR(clk)) { 414 clk_src = clk_get_rate(clk); 415 clk_put(clk); 416 } 417 418 if (clk_src <= 100000000UL) { 419 pr_err("error reference clock value, or lower than 100MHz\n"); 420 return -EINVAL; 421 } 422 423 nominal_freq = ptp_qoriq_nominal_freq(clk_src); 424 if (!nominal_freq) 425 return -EINVAL; 426 427 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq; 428 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC; 429 430 /* Calculate initial frequency compensation value for TMR_ADD register. 431 * freq_comp = ceil(2^32 / freq_ratio) 432 * freq_ratio = reference_clock_freq / nominal_freq 433 */ 434 freq_comp = ((u64)1 << 32) * nominal_freq; 435 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder); 436 if (remainder) 437 freq_comp++; 438 439 ptp_qoriq->tmr_add = freq_comp; 440 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period; 441 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period; 442 443 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1 444 * freq_ratio = reference_clock_freq / nominal_freq 445 */ 446 max_adj = 1000000000ULL * (clk_src - nominal_freq); 447 max_adj = div_u64(max_adj, nominal_freq) - 1; 448 ptp_qoriq->caps.max_adj = max_adj; 449 450 return 0; 451 } 452 453 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base, 454 const struct ptp_clock_info *caps) 455 { 456 struct device_node *node = ptp_qoriq->dev->of_node; 457 struct ptp_qoriq_registers *regs; 458 struct timespec64 now; 459 unsigned long flags; 460 u32 tmr_ctrl; 461 462 if (!node) 463 return -ENODEV; 464 465 ptp_qoriq->base = base; 466 ptp_qoriq->caps = *caps; 467 468 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel)) 469 ptp_qoriq->cksel = DEFAULT_CKSEL; 470 471 if (of_property_read_bool(node, "fsl,extts-fifo")) 472 ptp_qoriq->extts_fifo_support = true; 473 else 474 ptp_qoriq->extts_fifo_support = false; 475 476 if (of_property_read_u32(node, 477 "fsl,tclk-period", &ptp_qoriq->tclk_period) || 478 of_property_read_u32(node, 479 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) || 480 of_property_read_u32(node, 481 "fsl,tmr-add", &ptp_qoriq->tmr_add) || 482 of_property_read_u32(node, 483 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) || 484 of_property_read_u32(node, 485 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) || 486 of_property_read_u32(node, 487 "fsl,max-adj", &ptp_qoriq->caps.max_adj)) { 488 pr_warn("device tree node missing required elements, try automatic configuration\n"); 489 490 if (ptp_qoriq_auto_config(ptp_qoriq, node)) 491 return -ENODEV; 492 } 493 494 if (of_property_read_bool(node, "little-endian")) { 495 ptp_qoriq->read = qoriq_read_le; 496 ptp_qoriq->write = qoriq_write_le; 497 } else { 498 ptp_qoriq->read = qoriq_read_be; 499 ptp_qoriq->write = qoriq_write_be; 500 } 501 502 /* The eTSEC uses differnt memory map with DPAA/ENETC */ 503 if (of_device_is_compatible(node, "fsl,etsec-ptp")) { 504 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET; 505 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET; 506 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET; 507 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET; 508 } else { 509 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET; 510 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET; 511 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET; 512 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET; 513 } 514 515 spin_lock_init(&ptp_qoriq->lock); 516 517 ktime_get_real_ts64(&now); 518 ptp_qoriq_settime(&ptp_qoriq->caps, &now); 519 520 tmr_ctrl = 521 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | 522 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT; 523 524 spin_lock_irqsave(&ptp_qoriq->lock, flags); 525 526 regs = &ptp_qoriq->regs; 527 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl); 528 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add); 529 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc); 530 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1); 531 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2); 532 set_alarm(ptp_qoriq); 533 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 534 tmr_ctrl|FIPERST|RTPE|TE|FRD); 535 536 spin_unlock_irqrestore(&ptp_qoriq->lock, flags); 537 538 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev); 539 if (IS_ERR(ptp_qoriq->clock)) 540 return PTR_ERR(ptp_qoriq->clock); 541 542 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock); 543 ptp_qoriq_create_debugfs(ptp_qoriq); 544 return 0; 545 } 546 EXPORT_SYMBOL_GPL(ptp_qoriq_init); 547 548 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq) 549 { 550 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs; 551 552 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0); 553 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0); 554 555 ptp_qoriq_remove_debugfs(ptp_qoriq); 556 ptp_clock_unregister(ptp_qoriq->clock); 557 iounmap(ptp_qoriq->base); 558 free_irq(ptp_qoriq->irq, ptp_qoriq); 559 } 560 EXPORT_SYMBOL_GPL(ptp_qoriq_free); 561 562 static int ptp_qoriq_probe(struct platform_device *dev) 563 { 564 struct ptp_qoriq *ptp_qoriq; 565 int err = -ENOMEM; 566 void __iomem *base; 567 568 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL); 569 if (!ptp_qoriq) 570 goto no_memory; 571 572 ptp_qoriq->dev = &dev->dev; 573 574 err = -ENODEV; 575 576 ptp_qoriq->irq = platform_get_irq(dev, 0); 577 if (ptp_qoriq->irq < 0) { 578 pr_err("irq not in device tree\n"); 579 goto no_node; 580 } 581 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED, 582 DRIVER, ptp_qoriq)) { 583 pr_err("request_irq failed\n"); 584 goto no_node; 585 } 586 587 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0); 588 if (!ptp_qoriq->rsrc) { 589 pr_err("no resource\n"); 590 goto no_resource; 591 } 592 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) { 593 pr_err("resource busy\n"); 594 goto no_resource; 595 } 596 597 base = ioremap(ptp_qoriq->rsrc->start, 598 resource_size(ptp_qoriq->rsrc)); 599 if (!base) { 600 pr_err("ioremap ptp registers failed\n"); 601 goto no_ioremap; 602 } 603 604 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps); 605 if (err) 606 goto no_clock; 607 608 platform_set_drvdata(dev, ptp_qoriq); 609 return 0; 610 611 no_clock: 612 iounmap(ptp_qoriq->base); 613 no_ioremap: 614 release_resource(ptp_qoriq->rsrc); 615 no_resource: 616 free_irq(ptp_qoriq->irq, ptp_qoriq); 617 no_node: 618 kfree(ptp_qoriq); 619 no_memory: 620 return err; 621 } 622 623 static int ptp_qoriq_remove(struct platform_device *dev) 624 { 625 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev); 626 627 ptp_qoriq_free(ptp_qoriq); 628 release_resource(ptp_qoriq->rsrc); 629 kfree(ptp_qoriq); 630 return 0; 631 } 632 633 static const struct of_device_id match_table[] = { 634 { .compatible = "fsl,etsec-ptp" }, 635 { .compatible = "fsl,fman-ptp-timer" }, 636 {}, 637 }; 638 MODULE_DEVICE_TABLE(of, match_table); 639 640 static struct platform_driver ptp_qoriq_driver = { 641 .driver = { 642 .name = "ptp_qoriq", 643 .of_match_table = match_table, 644 }, 645 .probe = ptp_qoriq_probe, 646 .remove = ptp_qoriq_remove, 647 }; 648 649 module_platform_driver(ptp_qoriq_driver); 650 651 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); 652 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer"); 653 MODULE_LICENSE("GPL"); 654