1 /* 2 * PTP 1588 clock for Freescale QorIQ 1588 timer 3 * 4 * Copyright (C) 2010 OMICRON electronics GmbH 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22 23 #include <linux/device.h> 24 #include <linux/hrtimer.h> 25 #include <linux/interrupt.h> 26 #include <linux/kernel.h> 27 #include <linux/module.h> 28 #include <linux/of.h> 29 #include <linux/of_platform.h> 30 #include <linux/timex.h> 31 #include <linux/slab.h> 32 #include <linux/clk.h> 33 34 #include <linux/fsl/ptp_qoriq.h> 35 36 /* 37 * Register access functions 38 */ 39 40 /* Caller must hold qoriq_ptp->lock. */ 41 static u64 tmr_cnt_read(struct qoriq_ptp *qoriq_ptp) 42 { 43 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 44 u64 ns; 45 u32 lo, hi; 46 47 lo = qoriq_read(®s->ctrl_regs->tmr_cnt_l); 48 hi = qoriq_read(®s->ctrl_regs->tmr_cnt_h); 49 ns = ((u64) hi) << 32; 50 ns |= lo; 51 return ns; 52 } 53 54 /* Caller must hold qoriq_ptp->lock. */ 55 static void tmr_cnt_write(struct qoriq_ptp *qoriq_ptp, u64 ns) 56 { 57 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 58 u32 hi = ns >> 32; 59 u32 lo = ns & 0xffffffff; 60 61 qoriq_write(®s->ctrl_regs->tmr_cnt_l, lo); 62 qoriq_write(®s->ctrl_regs->tmr_cnt_h, hi); 63 } 64 65 /* Caller must hold qoriq_ptp->lock. */ 66 static void set_alarm(struct qoriq_ptp *qoriq_ptp) 67 { 68 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 69 u64 ns; 70 u32 lo, hi; 71 72 ns = tmr_cnt_read(qoriq_ptp) + 1500000000ULL; 73 ns = div_u64(ns, 1000000000UL) * 1000000000ULL; 74 ns -= qoriq_ptp->tclk_period; 75 hi = ns >> 32; 76 lo = ns & 0xffffffff; 77 qoriq_write(®s->alarm_regs->tmr_alarm1_l, lo); 78 qoriq_write(®s->alarm_regs->tmr_alarm1_h, hi); 79 } 80 81 /* Caller must hold qoriq_ptp->lock. */ 82 static void set_fipers(struct qoriq_ptp *qoriq_ptp) 83 { 84 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 85 86 set_alarm(qoriq_ptp); 87 qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1); 88 qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2); 89 } 90 91 static int extts_clean_up(struct qoriq_ptp *qoriq_ptp, int index, 92 bool update_event) 93 { 94 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 95 struct ptp_clock_event event; 96 void __iomem *reg_etts_l; 97 void __iomem *reg_etts_h; 98 u32 valid, stat, lo, hi; 99 100 switch (index) { 101 case 0: 102 valid = ETS1_VLD; 103 reg_etts_l = ®s->etts_regs->tmr_etts1_l; 104 reg_etts_h = ®s->etts_regs->tmr_etts1_h; 105 break; 106 case 1: 107 valid = ETS2_VLD; 108 reg_etts_l = ®s->etts_regs->tmr_etts2_l; 109 reg_etts_h = ®s->etts_regs->tmr_etts2_h; 110 break; 111 default: 112 return -EINVAL; 113 } 114 115 event.type = PTP_CLOCK_EXTTS; 116 event.index = index; 117 118 do { 119 lo = qoriq_read(reg_etts_l); 120 hi = qoriq_read(reg_etts_h); 121 122 if (update_event) { 123 event.timestamp = ((u64) hi) << 32; 124 event.timestamp |= lo; 125 ptp_clock_event(qoriq_ptp->clock, &event); 126 } 127 128 stat = qoriq_read(®s->ctrl_regs->tmr_stat); 129 } while (qoriq_ptp->extts_fifo_support && (stat & valid)); 130 131 return 0; 132 } 133 134 /* 135 * Interrupt service routine 136 */ 137 138 static irqreturn_t isr(int irq, void *priv) 139 { 140 struct qoriq_ptp *qoriq_ptp = priv; 141 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 142 struct ptp_clock_event event; 143 u64 ns; 144 u32 ack = 0, lo, hi, mask, val, irqs; 145 146 spin_lock(&qoriq_ptp->lock); 147 148 val = qoriq_read(®s->ctrl_regs->tmr_tevent); 149 mask = qoriq_read(®s->ctrl_regs->tmr_temask); 150 151 spin_unlock(&qoriq_ptp->lock); 152 153 irqs = val & mask; 154 155 if (irqs & ETS1) { 156 ack |= ETS1; 157 extts_clean_up(qoriq_ptp, 0, true); 158 } 159 160 if (irqs & ETS2) { 161 ack |= ETS2; 162 extts_clean_up(qoriq_ptp, 1, true); 163 } 164 165 if (irqs & ALM2) { 166 ack |= ALM2; 167 if (qoriq_ptp->alarm_value) { 168 event.type = PTP_CLOCK_ALARM; 169 event.index = 0; 170 event.timestamp = qoriq_ptp->alarm_value; 171 ptp_clock_event(qoriq_ptp->clock, &event); 172 } 173 if (qoriq_ptp->alarm_interval) { 174 ns = qoriq_ptp->alarm_value + qoriq_ptp->alarm_interval; 175 hi = ns >> 32; 176 lo = ns & 0xffffffff; 177 qoriq_write(®s->alarm_regs->tmr_alarm2_l, lo); 178 qoriq_write(®s->alarm_regs->tmr_alarm2_h, hi); 179 qoriq_ptp->alarm_value = ns; 180 } else { 181 spin_lock(&qoriq_ptp->lock); 182 mask = qoriq_read(®s->ctrl_regs->tmr_temask); 183 mask &= ~ALM2EN; 184 qoriq_write(®s->ctrl_regs->tmr_temask, mask); 185 spin_unlock(&qoriq_ptp->lock); 186 qoriq_ptp->alarm_value = 0; 187 qoriq_ptp->alarm_interval = 0; 188 } 189 } 190 191 if (irqs & PP1) { 192 ack |= PP1; 193 event.type = PTP_CLOCK_PPS; 194 ptp_clock_event(qoriq_ptp->clock, &event); 195 } 196 197 if (ack) { 198 qoriq_write(®s->ctrl_regs->tmr_tevent, ack); 199 return IRQ_HANDLED; 200 } else 201 return IRQ_NONE; 202 } 203 204 /* 205 * PTP clock operations 206 */ 207 208 static int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) 209 { 210 u64 adj, diff; 211 u32 tmr_add; 212 int neg_adj = 0; 213 struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); 214 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 215 216 if (scaled_ppm < 0) { 217 neg_adj = 1; 218 scaled_ppm = -scaled_ppm; 219 } 220 tmr_add = qoriq_ptp->tmr_add; 221 adj = tmr_add; 222 223 /* calculate diff as adj*(scaled_ppm/65536)/1000000 224 * and round() to the nearest integer 225 */ 226 adj *= scaled_ppm; 227 diff = div_u64(adj, 8000000); 228 diff = (diff >> 13) + ((diff >> 12) & 1); 229 230 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff; 231 232 qoriq_write(®s->ctrl_regs->tmr_add, tmr_add); 233 234 return 0; 235 } 236 237 static int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta) 238 { 239 s64 now; 240 unsigned long flags; 241 struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); 242 243 spin_lock_irqsave(&qoriq_ptp->lock, flags); 244 245 now = tmr_cnt_read(qoriq_ptp); 246 now += delta; 247 tmr_cnt_write(qoriq_ptp, now); 248 set_fipers(qoriq_ptp); 249 250 spin_unlock_irqrestore(&qoriq_ptp->lock, flags); 251 252 return 0; 253 } 254 255 static int ptp_qoriq_gettime(struct ptp_clock_info *ptp, 256 struct timespec64 *ts) 257 { 258 u64 ns; 259 unsigned long flags; 260 struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); 261 262 spin_lock_irqsave(&qoriq_ptp->lock, flags); 263 264 ns = tmr_cnt_read(qoriq_ptp); 265 266 spin_unlock_irqrestore(&qoriq_ptp->lock, flags); 267 268 *ts = ns_to_timespec64(ns); 269 270 return 0; 271 } 272 273 static int ptp_qoriq_settime(struct ptp_clock_info *ptp, 274 const struct timespec64 *ts) 275 { 276 u64 ns; 277 unsigned long flags; 278 struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); 279 280 ns = timespec64_to_ns(ts); 281 282 spin_lock_irqsave(&qoriq_ptp->lock, flags); 283 284 tmr_cnt_write(qoriq_ptp, ns); 285 set_fipers(qoriq_ptp); 286 287 spin_unlock_irqrestore(&qoriq_ptp->lock, flags); 288 289 return 0; 290 } 291 292 static int ptp_qoriq_enable(struct ptp_clock_info *ptp, 293 struct ptp_clock_request *rq, int on) 294 { 295 struct qoriq_ptp *qoriq_ptp = container_of(ptp, struct qoriq_ptp, caps); 296 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 297 unsigned long flags; 298 u32 bit, mask = 0; 299 300 switch (rq->type) { 301 case PTP_CLK_REQ_EXTTS: 302 switch (rq->extts.index) { 303 case 0: 304 bit = ETS1EN; 305 break; 306 case 1: 307 bit = ETS2EN; 308 break; 309 default: 310 return -EINVAL; 311 } 312 313 if (on) 314 extts_clean_up(qoriq_ptp, rq->extts.index, false); 315 316 break; 317 case PTP_CLK_REQ_PPS: 318 bit = PP1EN; 319 break; 320 default: 321 return -EOPNOTSUPP; 322 } 323 324 spin_lock_irqsave(&qoriq_ptp->lock, flags); 325 326 mask = qoriq_read(®s->ctrl_regs->tmr_temask); 327 if (on) { 328 mask |= bit; 329 qoriq_write(®s->ctrl_regs->tmr_tevent, bit); 330 } else { 331 mask &= ~bit; 332 } 333 334 qoriq_write(®s->ctrl_regs->tmr_temask, mask); 335 336 spin_unlock_irqrestore(&qoriq_ptp->lock, flags); 337 return 0; 338 } 339 340 static const struct ptp_clock_info ptp_qoriq_caps = { 341 .owner = THIS_MODULE, 342 .name = "qoriq ptp clock", 343 .max_adj = 512000, 344 .n_alarm = 0, 345 .n_ext_ts = N_EXT_TS, 346 .n_per_out = 0, 347 .n_pins = 0, 348 .pps = 1, 349 .adjfine = ptp_qoriq_adjfine, 350 .adjtime = ptp_qoriq_adjtime, 351 .gettime64 = ptp_qoriq_gettime, 352 .settime64 = ptp_qoriq_settime, 353 .enable = ptp_qoriq_enable, 354 }; 355 356 /** 357 * qoriq_ptp_nominal_freq - calculate nominal frequency according to 358 * reference clock frequency 359 * 360 * @clk_src: reference clock frequency 361 * 362 * The nominal frequency is the desired clock frequency. 363 * It should be less than the reference clock frequency. 364 * It should be a factor of 1000MHz. 365 * 366 * Return the nominal frequency 367 */ 368 static u32 qoriq_ptp_nominal_freq(u32 clk_src) 369 { 370 u32 remainder = 0; 371 372 clk_src /= 1000000; 373 remainder = clk_src % 100; 374 if (remainder) { 375 clk_src -= remainder; 376 clk_src += 100; 377 } 378 379 do { 380 clk_src -= 100; 381 382 } while (1000 % clk_src); 383 384 return clk_src * 1000000; 385 } 386 387 /** 388 * qoriq_ptp_auto_config - calculate a set of default configurations 389 * 390 * @qoriq_ptp: pointer to qoriq_ptp 391 * @node: pointer to device_node 392 * 393 * If below dts properties are not provided, this function will be 394 * called to calculate a set of default configurations for them. 395 * "fsl,tclk-period" 396 * "fsl,tmr-prsc" 397 * "fsl,tmr-add" 398 * "fsl,tmr-fiper1" 399 * "fsl,tmr-fiper2" 400 * "fsl,max-adj" 401 * 402 * Return 0 if success 403 */ 404 static int qoriq_ptp_auto_config(struct qoriq_ptp *qoriq_ptp, 405 struct device_node *node) 406 { 407 struct clk *clk; 408 u64 freq_comp; 409 u64 max_adj; 410 u32 nominal_freq; 411 u32 remainder = 0; 412 u32 clk_src = 0; 413 414 qoriq_ptp->cksel = DEFAULT_CKSEL; 415 416 clk = of_clk_get(node, 0); 417 if (!IS_ERR(clk)) { 418 clk_src = clk_get_rate(clk); 419 clk_put(clk); 420 } 421 422 if (clk_src <= 100000000UL) { 423 pr_err("error reference clock value, or lower than 100MHz\n"); 424 return -EINVAL; 425 } 426 427 nominal_freq = qoriq_ptp_nominal_freq(clk_src); 428 if (!nominal_freq) 429 return -EINVAL; 430 431 qoriq_ptp->tclk_period = 1000000000UL / nominal_freq; 432 qoriq_ptp->tmr_prsc = DEFAULT_TMR_PRSC; 433 434 /* Calculate initial frequency compensation value for TMR_ADD register. 435 * freq_comp = ceil(2^32 / freq_ratio) 436 * freq_ratio = reference_clock_freq / nominal_freq 437 */ 438 freq_comp = ((u64)1 << 32) * nominal_freq; 439 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder); 440 if (remainder) 441 freq_comp++; 442 443 qoriq_ptp->tmr_add = freq_comp; 444 qoriq_ptp->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - qoriq_ptp->tclk_period; 445 qoriq_ptp->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - qoriq_ptp->tclk_period; 446 447 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1 448 * freq_ratio = reference_clock_freq / nominal_freq 449 */ 450 max_adj = 1000000000ULL * (clk_src - nominal_freq); 451 max_adj = div_u64(max_adj, nominal_freq) - 1; 452 qoriq_ptp->caps.max_adj = max_adj; 453 454 return 0; 455 } 456 457 static int qoriq_ptp_probe(struct platform_device *dev) 458 { 459 struct device_node *node = dev->dev.of_node; 460 struct qoriq_ptp *qoriq_ptp; 461 struct qoriq_ptp_registers *regs; 462 struct timespec64 now; 463 int err = -ENOMEM; 464 u32 tmr_ctrl; 465 unsigned long flags; 466 void __iomem *base; 467 468 qoriq_ptp = kzalloc(sizeof(*qoriq_ptp), GFP_KERNEL); 469 if (!qoriq_ptp) 470 goto no_memory; 471 472 err = -EINVAL; 473 474 qoriq_ptp->dev = &dev->dev; 475 qoriq_ptp->caps = ptp_qoriq_caps; 476 477 if (of_property_read_u32(node, "fsl,cksel", &qoriq_ptp->cksel)) 478 qoriq_ptp->cksel = DEFAULT_CKSEL; 479 480 if (of_property_read_bool(node, "fsl,extts-fifo")) 481 qoriq_ptp->extts_fifo_support = true; 482 else 483 qoriq_ptp->extts_fifo_support = false; 484 485 if (of_property_read_u32(node, 486 "fsl,tclk-period", &qoriq_ptp->tclk_period) || 487 of_property_read_u32(node, 488 "fsl,tmr-prsc", &qoriq_ptp->tmr_prsc) || 489 of_property_read_u32(node, 490 "fsl,tmr-add", &qoriq_ptp->tmr_add) || 491 of_property_read_u32(node, 492 "fsl,tmr-fiper1", &qoriq_ptp->tmr_fiper1) || 493 of_property_read_u32(node, 494 "fsl,tmr-fiper2", &qoriq_ptp->tmr_fiper2) || 495 of_property_read_u32(node, 496 "fsl,max-adj", &qoriq_ptp->caps.max_adj)) { 497 pr_warn("device tree node missing required elements, try automatic configuration\n"); 498 499 if (qoriq_ptp_auto_config(qoriq_ptp, node)) 500 goto no_config; 501 } 502 503 err = -ENODEV; 504 505 qoriq_ptp->irq = platform_get_irq(dev, 0); 506 507 if (qoriq_ptp->irq < 0) { 508 pr_err("irq not in device tree\n"); 509 goto no_node; 510 } 511 if (request_irq(qoriq_ptp->irq, isr, IRQF_SHARED, DRIVER, qoriq_ptp)) { 512 pr_err("request_irq failed\n"); 513 goto no_node; 514 } 515 516 qoriq_ptp->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0); 517 if (!qoriq_ptp->rsrc) { 518 pr_err("no resource\n"); 519 goto no_resource; 520 } 521 if (request_resource(&iomem_resource, qoriq_ptp->rsrc)) { 522 pr_err("resource busy\n"); 523 goto no_resource; 524 } 525 526 spin_lock_init(&qoriq_ptp->lock); 527 528 base = ioremap(qoriq_ptp->rsrc->start, 529 resource_size(qoriq_ptp->rsrc)); 530 if (!base) { 531 pr_err("ioremap ptp registers failed\n"); 532 goto no_ioremap; 533 } 534 535 qoriq_ptp->base = base; 536 537 if (of_device_is_compatible(node, "fsl,fman-ptp-timer")) { 538 qoriq_ptp->regs.ctrl_regs = base + FMAN_CTRL_REGS_OFFSET; 539 qoriq_ptp->regs.alarm_regs = base + FMAN_ALARM_REGS_OFFSET; 540 qoriq_ptp->regs.fiper_regs = base + FMAN_FIPER_REGS_OFFSET; 541 qoriq_ptp->regs.etts_regs = base + FMAN_ETTS_REGS_OFFSET; 542 } else { 543 qoriq_ptp->regs.ctrl_regs = base + CTRL_REGS_OFFSET; 544 qoriq_ptp->regs.alarm_regs = base + ALARM_REGS_OFFSET; 545 qoriq_ptp->regs.fiper_regs = base + FIPER_REGS_OFFSET; 546 qoriq_ptp->regs.etts_regs = base + ETTS_REGS_OFFSET; 547 } 548 549 ktime_get_real_ts64(&now); 550 ptp_qoriq_settime(&qoriq_ptp->caps, &now); 551 552 tmr_ctrl = 553 (qoriq_ptp->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | 554 (qoriq_ptp->cksel & CKSEL_MASK) << CKSEL_SHIFT; 555 556 spin_lock_irqsave(&qoriq_ptp->lock, flags); 557 558 regs = &qoriq_ptp->regs; 559 qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl); 560 qoriq_write(®s->ctrl_regs->tmr_add, qoriq_ptp->tmr_add); 561 qoriq_write(®s->ctrl_regs->tmr_prsc, qoriq_ptp->tmr_prsc); 562 qoriq_write(®s->fiper_regs->tmr_fiper1, qoriq_ptp->tmr_fiper1); 563 qoriq_write(®s->fiper_regs->tmr_fiper2, qoriq_ptp->tmr_fiper2); 564 set_alarm(qoriq_ptp); 565 qoriq_write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl|FIPERST|RTPE|TE|FRD); 566 567 spin_unlock_irqrestore(&qoriq_ptp->lock, flags); 568 569 qoriq_ptp->clock = ptp_clock_register(&qoriq_ptp->caps, &dev->dev); 570 if (IS_ERR(qoriq_ptp->clock)) { 571 err = PTR_ERR(qoriq_ptp->clock); 572 goto no_clock; 573 } 574 qoriq_ptp->phc_index = ptp_clock_index(qoriq_ptp->clock); 575 576 ptp_qoriq_create_debugfs(qoriq_ptp); 577 platform_set_drvdata(dev, qoriq_ptp); 578 579 return 0; 580 581 no_clock: 582 iounmap(qoriq_ptp->base); 583 no_ioremap: 584 release_resource(qoriq_ptp->rsrc); 585 no_resource: 586 free_irq(qoriq_ptp->irq, qoriq_ptp); 587 no_config: 588 no_node: 589 kfree(qoriq_ptp); 590 no_memory: 591 return err; 592 } 593 594 static int qoriq_ptp_remove(struct platform_device *dev) 595 { 596 struct qoriq_ptp *qoriq_ptp = platform_get_drvdata(dev); 597 struct qoriq_ptp_registers *regs = &qoriq_ptp->regs; 598 599 qoriq_write(®s->ctrl_regs->tmr_temask, 0); 600 qoriq_write(®s->ctrl_regs->tmr_ctrl, 0); 601 602 ptp_qoriq_remove_debugfs(qoriq_ptp); 603 ptp_clock_unregister(qoriq_ptp->clock); 604 iounmap(qoriq_ptp->base); 605 release_resource(qoriq_ptp->rsrc); 606 free_irq(qoriq_ptp->irq, qoriq_ptp); 607 kfree(qoriq_ptp); 608 609 return 0; 610 } 611 612 static const struct of_device_id match_table[] = { 613 { .compatible = "fsl,etsec-ptp" }, 614 { .compatible = "fsl,fman-ptp-timer" }, 615 {}, 616 }; 617 MODULE_DEVICE_TABLE(of, match_table); 618 619 static struct platform_driver qoriq_ptp_driver = { 620 .driver = { 621 .name = "ptp_qoriq", 622 .of_match_table = match_table, 623 }, 624 .probe = qoriq_ptp_probe, 625 .remove = qoriq_ptp_remove, 626 }; 627 628 module_platform_driver(qoriq_ptp_driver); 629 630 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>"); 631 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer"); 632 MODULE_LICENSE("GPL"); 633