1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Intel Running Average Power Limit (RAPL) Driver via MSR interface 4 * Copyright (c) 2019, Intel Corporation. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/list.h> 11 #include <linux/types.h> 12 #include <linux/device.h> 13 #include <linux/slab.h> 14 #include <linux/log2.h> 15 #include <linux/bitmap.h> 16 #include <linux/delay.h> 17 #include <linux/sysfs.h> 18 #include <linux/cpu.h> 19 #include <linux/powercap.h> 20 #include <linux/suspend.h> 21 #include <linux/intel_rapl.h> 22 #include <linux/processor.h> 23 #include <linux/platform_device.h> 24 25 #include <asm/iosf_mbi.h> 26 #include <asm/cpu_device_id.h> 27 #include <asm/intel-family.h> 28 29 /* Local defines */ 30 #define MSR_PLATFORM_POWER_LIMIT 0x0000065C 31 #define MSR_VR_CURRENT_CONFIG 0x00000601 32 33 /* private data for RAPL MSR Interface */ 34 static struct rapl_if_priv rapl_msr_priv = { 35 .reg_unit = MSR_RAPL_POWER_UNIT, 36 .regs[RAPL_DOMAIN_PACKAGE] = { 37 MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO }, 38 .regs[RAPL_DOMAIN_PP0] = { 39 MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 }, 40 .regs[RAPL_DOMAIN_PP1] = { 41 MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 }, 42 .regs[RAPL_DOMAIN_DRAM] = { 43 MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO }, 44 .regs[RAPL_DOMAIN_PLATFORM] = { 45 MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0}, 46 .limits[RAPL_DOMAIN_PACKAGE] = 2, 47 .limits[RAPL_DOMAIN_PLATFORM] = 2, 48 }; 49 50 /* Handles CPU hotplug on multi-socket systems. 51 * If a CPU goes online as the first CPU of the physical package 52 * we add the RAPL package to the system. Similarly, when the last 53 * CPU of the package is removed, we remove the RAPL package and its 54 * associated domains. Cooling devices are handled accordingly at 55 * per-domain level. 56 */ 57 static int rapl_cpu_online(unsigned int cpu) 58 { 59 struct rapl_package *rp; 60 61 rp = rapl_find_package_domain(cpu, &rapl_msr_priv); 62 if (!rp) { 63 rp = rapl_add_package(cpu, &rapl_msr_priv); 64 if (IS_ERR(rp)) 65 return PTR_ERR(rp); 66 } 67 cpumask_set_cpu(cpu, &rp->cpumask); 68 return 0; 69 } 70 71 static int rapl_cpu_down_prep(unsigned int cpu) 72 { 73 struct rapl_package *rp; 74 int lead_cpu; 75 76 rp = rapl_find_package_domain(cpu, &rapl_msr_priv); 77 if (!rp) 78 return 0; 79 80 cpumask_clear_cpu(cpu, &rp->cpumask); 81 lead_cpu = cpumask_first(&rp->cpumask); 82 if (lead_cpu >= nr_cpu_ids) 83 rapl_remove_package(rp); 84 else if (rp->lead_cpu == cpu) 85 rp->lead_cpu = lead_cpu; 86 return 0; 87 } 88 89 static int rapl_msr_read_raw(int cpu, struct reg_action *ra) 90 { 91 u32 msr = (u32)ra->reg; 92 93 if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) { 94 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu); 95 return -EIO; 96 } 97 ra->value &= ra->mask; 98 return 0; 99 } 100 101 static void rapl_msr_update_func(void *info) 102 { 103 struct reg_action *ra = info; 104 u32 msr = (u32)ra->reg; 105 u64 val; 106 107 ra->err = rdmsrl_safe(msr, &val); 108 if (ra->err) 109 return; 110 111 val &= ~ra->mask; 112 val |= ra->value; 113 114 ra->err = wrmsrl_safe(msr, val); 115 } 116 117 static int rapl_msr_write_raw(int cpu, struct reg_action *ra) 118 { 119 int ret; 120 121 ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1); 122 if (WARN_ON_ONCE(ret)) 123 return ret; 124 125 return ra->err; 126 } 127 128 /* List of verified CPUs. */ 129 static const struct x86_cpu_id pl4_support_ids[] = { 130 { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY }, 131 {} 132 }; 133 134 static int rapl_msr_probe(struct platform_device *pdev) 135 { 136 const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids); 137 int ret; 138 139 rapl_msr_priv.read_raw = rapl_msr_read_raw; 140 rapl_msr_priv.write_raw = rapl_msr_write_raw; 141 142 if (id) { 143 rapl_msr_priv.limits[RAPL_DOMAIN_PACKAGE] = 3; 144 rapl_msr_priv.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] = 145 MSR_VR_CURRENT_CONFIG; 146 pr_info("PL4 support detected.\n"); 147 } 148 149 rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL); 150 if (IS_ERR(rapl_msr_priv.control_type)) { 151 pr_debug("failed to register powercap control_type.\n"); 152 return PTR_ERR(rapl_msr_priv.control_type); 153 } 154 155 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online", 156 rapl_cpu_online, rapl_cpu_down_prep); 157 if (ret < 0) 158 goto out; 159 rapl_msr_priv.pcap_rapl_online = ret; 160 161 return 0; 162 163 out: 164 if (ret) 165 powercap_unregister_control_type(rapl_msr_priv.control_type); 166 return ret; 167 } 168 169 static int rapl_msr_remove(struct platform_device *pdev) 170 { 171 cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online); 172 powercap_unregister_control_type(rapl_msr_priv.control_type); 173 return 0; 174 } 175 176 static const struct platform_device_id rapl_msr_ids[] = { 177 { .name = "intel_rapl_msr", }, 178 {} 179 }; 180 MODULE_DEVICE_TABLE(platform, rapl_msr_ids); 181 182 static struct platform_driver intel_rapl_msr_driver = { 183 .probe = rapl_msr_probe, 184 .remove = rapl_msr_remove, 185 .id_table = rapl_msr_ids, 186 .driver = { 187 .name = "intel_rapl_msr", 188 }, 189 }; 190 191 module_platform_driver(intel_rapl_msr_driver); 192 193 MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface"); 194 MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>"); 195 MODULE_LICENSE("GPL v2"); 196