1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2022 Richtek Technology Corp. 4 * 5 * Authors: Alina Yu <alina_yu@richtek.com> 6 * ChiYuan Huang <cy_huang@richtek.com> 7 */ 8 9 #include <linux/bits.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/i2c.h> 12 #include <linux/interrupt.h> 13 #include <linux/kstrtox.h> 14 #include <linux/linear_range.h> 15 #include <linux/mod_devicetable.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <linux/of.h> 19 #include <linux/power_supply.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/driver.h> 22 #include <linux/sysfs.h> 23 24 #define RT9471_REG_OTGCFG 0x00 25 #define RT9471_REG_TOP 0x01 26 #define RT9471_REG_FUNC 0x02 27 #define RT9471_REG_IBUS 0x03 28 #define RT9471_REG_VBUS 0x04 29 #define RT9471_REG_PRECHG 0x05 30 #define RT9471_REG_VCHG 0x07 31 #define RT9471_REG_ICHG 0x08 32 #define RT9471_REG_CHGTMR 0x09 33 #define RT9471_REG_EOC 0x0A 34 #define RT9471_REG_INFO 0x0B 35 #define RT9471_REG_JEITA 0x0C 36 #define RT9471_REG_PUMP_EXP 0x0D 37 #define RT9471_REG_DPDMDET 0x0E 38 #define RT9471_REG_ICSTAT 0x0F 39 #define RT9471_REG_STAT0 0x10 40 #define RT9471_REG_STAT1 0x11 41 #define RT9471_REG_STAT2 0x12 42 #define RT9471_REG_IRQ0 0x20 43 #define RT9471_REG_MASK0 0x30 44 45 #define RT9471_OTGCV_MASK GENMASK(7, 6) 46 #define RT9471_OTGCC_MASK BIT(0) 47 #define RT9471_OTGEN_MASK BIT(1) 48 #define RT9471_CHGFAULT_MASK GENMASK(4, 1) 49 50 #define RT9471_NUM_IRQ_REGS 4 51 #define RT9471_OTGCV_MINUV 4850000 52 #define RT9471_OTGCV_STEPUV 150000 53 #define RT9471_NUM_VOTG 4 54 #define RT9471_VCHG_MAXUV 4700000 55 #define RT9471_ICHG_MAXUA 3150000 56 57 /* Device ID */ 58 #define RT9470_DEVID 0x09 59 #define RT9470D_DEVID 0x0A 60 #define RT9471_DEVID 0x0D 61 #define RT9471D_DEVID 0x0E 62 63 /* IRQ number */ 64 #define RT9471_IRQ_BC12_DONE 0 65 #define RT9471_IRQ_DETACH 1 66 #define RT9471_IRQ_RECHG 2 67 #define RT9471_IRQ_CHG_DONE 3 68 #define RT9471_IRQ_BG_CHG 4 69 #define RT9471_IRQ_IE0C 5 70 #define RT9471_IRQ_CHG_RDY 6 71 #define RT9471_IRQ_VBUS_GD 7 72 #define RT9471_IRQ_CHG_BATOV 9 73 #define RT9471_IRQ_CHG_SYSOV 10 74 #define RT9471_IRQ_CHG_TOUT 11 75 #define RT9471_IRQ_CHG_BUSUV 12 76 #define RT9471_IRQ_CHG_THREG 13 77 #define RT9471_IRQ_CHG_AICR 14 78 #define RT9471_IRQ_CHG_MIVR 15 79 #define RT9471_IRQ_SYS_SHORT 16 80 #define RT9471_IRQ_SYS_MIN 17 81 #define RT9471_IRQ_AICC_DONE 18 82 #define RT9471_IRQ_PE_DONE 19 83 #define RT9471_IRQ_JEITA_COLD 20 84 #define RT9471_IRQ_JEITA_COOL 21 85 #define RT9471_IRQ_JEITA_WARM 22 86 #define RT9471_IRQ_JEITA_HOT 23 87 #define RT9471_IRQ_OTG_FAULT 24 88 #define RT9471_IRQ_OTG_LBP 25 89 #define RT9471_IRQ_OTG_CC 26 90 #define RT9471_IRQ_WDT 29 91 #define RT9471_IRQ_VAC_OV 30 92 #define RT9471_IRQ_OTP 31 93 94 enum rt9471_fields { 95 F_WDT = 0, 96 F_WDT_RST, 97 F_CHG_EN, 98 F_HZ, 99 F_BATFET_DIS, 100 F_AICR, 101 F_AICC_EN, 102 F_MIVR, 103 F_IPRE_CHG, 104 F_VPRE_CHG, 105 F_VBAT_REG, 106 F_ICHG_REG, 107 F_EOC_RST, 108 F_TE, 109 F_IEOC_CHG, 110 F_DEVICE_ID, 111 F_REG_RST, 112 F_BC12_EN, 113 F_IC_STAT, 114 F_PORT_STAT, 115 F_ST_CHG_DONE, 116 F_ST_CHG_RDY, 117 F_ST_VBUS_GD, 118 F_MAX_FIELDS 119 }; 120 121 enum rt9471_ranges { 122 RT9471_RANGE_AICR = 0, 123 RT9471_RANGE_MIVR, 124 RT9471_RANGE_IPRE, 125 RT9471_RANGE_VCHG, 126 RT9471_RANGE_ICHG, 127 RT9471_RANGE_IEOC, 128 RT9471_MAX_RANGES 129 }; 130 131 enum { 132 RT9471_PORTSTAT_APPLE_10W = 8, 133 RT9471_PORTSTAT_SAMSUNG_10W, 134 RT9471_PORTSTAT_APPLE_5W, 135 RT9471_PORTSTAT_APPLE_12W, 136 RT9471_PORTSTAT_NSTD, 137 RT9471_PORTSTAT_SDP, 138 RT9471_PORTSTAT_CDP, 139 RT9471_PORTSTAT_DCP, 140 }; 141 142 struct rt9471_chip { 143 struct device *dev; 144 struct regmap *regmap; 145 struct regmap_field *rm_fields[F_MAX_FIELDS]; 146 struct regmap_irq_chip_data *irq_chip_data; 147 struct regulator_dev *otg_rdev; 148 struct power_supply *psy; 149 struct power_supply_desc psy_desc; 150 struct mutex var_lock; 151 enum power_supply_usb_type psy_usb_type; 152 int psy_usb_curr; 153 }; 154 155 static const struct reg_field rt9471_reg_fields[F_MAX_FIELDS] = { 156 [F_WDT] = REG_FIELD(RT9471_REG_TOP, 0, 0), 157 [F_WDT_RST] = REG_FIELD(RT9471_REG_TOP, 1, 1), 158 [F_CHG_EN] = REG_FIELD(RT9471_REG_FUNC, 0, 0), 159 [F_HZ] = REG_FIELD(RT9471_REG_FUNC, 5, 5), 160 [F_BATFET_DIS] = REG_FIELD(RT9471_REG_FUNC, 7, 7), 161 [F_AICR] = REG_FIELD(RT9471_REG_IBUS, 0, 5), 162 [F_AICC_EN] = REG_FIELD(RT9471_REG_IBUS, 7, 7), 163 [F_MIVR] = REG_FIELD(RT9471_REG_VBUS, 0, 3), 164 [F_IPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 0, 3), 165 [F_VPRE_CHG] = REG_FIELD(RT9471_REG_PRECHG, 4, 6), 166 [F_VBAT_REG] = REG_FIELD(RT9471_REG_VCHG, 0, 6), 167 [F_ICHG_REG] = REG_FIELD(RT9471_REG_ICHG, 0, 5), 168 [F_EOC_RST] = REG_FIELD(RT9471_REG_EOC, 0, 0), 169 [F_TE] = REG_FIELD(RT9471_REG_EOC, 1, 1), 170 [F_IEOC_CHG] = REG_FIELD(RT9471_REG_EOC, 4, 7), 171 [F_DEVICE_ID] = REG_FIELD(RT9471_REG_INFO, 3, 6), 172 [F_REG_RST] = REG_FIELD(RT9471_REG_INFO, 7, 7), 173 [F_BC12_EN] = REG_FIELD(RT9471_REG_DPDMDET, 7, 7), 174 [F_IC_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 0, 3), 175 [F_PORT_STAT] = REG_FIELD(RT9471_REG_ICSTAT, 4, 7), 176 [F_ST_CHG_DONE] = REG_FIELD(RT9471_REG_STAT0, 3, 3), 177 [F_ST_CHG_RDY] = REG_FIELD(RT9471_REG_STAT0, 6, 6), 178 [F_ST_VBUS_GD] = REG_FIELD(RT9471_REG_STAT0, 7, 7), 179 }; 180 181 static const struct linear_range rt9471_chg_ranges[RT9471_MAX_RANGES] = { 182 [RT9471_RANGE_AICR] = { .min = 50000, .min_sel = 1, .max_sel = 63, .step = 50000 }, 183 [RT9471_RANGE_MIVR] = { .min = 3900000, .min_sel = 0, .max_sel = 15, .step = 100000 }, 184 [RT9471_RANGE_IPRE] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 185 [RT9471_RANGE_VCHG] = { .min = 3900000, .min_sel = 0, .max_sel = 80, .step = 10000 }, 186 [RT9471_RANGE_ICHG] = { .min = 0, .min_sel = 0, .max_sel = 63, .step = 50000 }, 187 [RT9471_RANGE_IEOC] = { .min = 50000, .min_sel = 0, .max_sel = 15, .step = 50000 }, 188 }; 189 190 static int rt9471_set_value_by_field_range(struct rt9471_chip *chip, 191 enum rt9471_fields field, 192 enum rt9471_ranges range, int val) 193 { 194 unsigned int sel; 195 196 if (val < 0) 197 return -EINVAL; 198 199 linear_range_get_selector_within(rt9471_chg_ranges + range, val, &sel); 200 201 return regmap_field_write(chip->rm_fields[field], sel); 202 } 203 204 205 static int rt9471_get_value_by_field_range(struct rt9471_chip *chip, 206 enum rt9471_fields field, 207 enum rt9471_ranges range, int *val) 208 { 209 unsigned int sel, rvalue; 210 int ret; 211 212 ret = regmap_field_read(chip->rm_fields[field], &sel); 213 if (ret) 214 return ret; 215 216 ret = linear_range_get_value(rt9471_chg_ranges + range, sel, &rvalue); 217 if (ret) 218 return ret; 219 220 *val = rvalue; 221 return 0; 222 } 223 224 static int rt9471_set_ieoc(struct rt9471_chip *chip, int microamp) 225 { 226 int ret; 227 228 if (microamp == 0) 229 return regmap_field_write(chip->rm_fields[F_TE], 0); 230 231 ret = rt9471_set_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 232 if (ret) 233 return ret; 234 235 /* After applying the new IEOC value, enable charge termination */ 236 return regmap_field_write(chip->rm_fields[F_TE], 1); 237 } 238 239 static int rt9471_get_ieoc(struct rt9471_chip *chip, int *microamp) 240 { 241 unsigned int chg_term_enable; 242 int ret; 243 244 ret = regmap_field_read(chip->rm_fields[F_TE], &chg_term_enable); 245 if (ret) 246 return ret; 247 248 if (!chg_term_enable) { 249 *microamp = 0; 250 return 0; 251 } 252 253 return rt9471_get_value_by_field_range(chip, F_IEOC_CHG, RT9471_RANGE_IEOC, microamp); 254 } 255 256 static int rt9471_get_status(struct rt9471_chip *chip, int *status) 257 { 258 unsigned int chg_ready, chg_done, fault_stat; 259 int ret; 260 261 ret = regmap_field_read(chip->rm_fields[F_ST_CHG_RDY], &chg_ready); 262 if (ret) 263 return ret; 264 265 ret = regmap_field_read(chip->rm_fields[F_ST_CHG_DONE], &chg_done); 266 if (ret) 267 return ret; 268 269 ret = regmap_read(chip->regmap, RT9471_REG_STAT1, &fault_stat); 270 if (ret) 271 return ret; 272 273 fault_stat &= RT9471_CHGFAULT_MASK; 274 275 if (chg_ready && chg_done) 276 *status = POWER_SUPPLY_STATUS_FULL; 277 else if (chg_ready && fault_stat) 278 *status = POWER_SUPPLY_STATUS_NOT_CHARGING; 279 else if (chg_ready && !fault_stat) 280 *status = POWER_SUPPLY_STATUS_CHARGING; 281 else 282 *status = POWER_SUPPLY_STATUS_DISCHARGING; 283 284 return 0; 285 } 286 287 static int rt9471_get_vbus_good(struct rt9471_chip *chip, int *stat) 288 { 289 unsigned int vbus_gd; 290 int ret; 291 292 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 293 if (ret) 294 return ret; 295 296 *stat = vbus_gd; 297 return 0; 298 } 299 300 static int rt9471_get_usb_type(struct rt9471_chip *chip, int *usb_type) 301 { 302 mutex_lock(&chip->var_lock); 303 *usb_type = chip->psy_usb_type; 304 mutex_unlock(&chip->var_lock); 305 306 return 0; 307 } 308 309 static int rt9471_get_usb_type_current(struct rt9471_chip *chip, 310 int *microamp) 311 { 312 mutex_lock(&chip->var_lock); 313 *microamp = chip->psy_usb_curr; 314 mutex_unlock(&chip->var_lock); 315 316 return 0; 317 } 318 319 static enum power_supply_property rt9471_charger_properties[] = { 320 POWER_SUPPLY_PROP_STATUS, 321 POWER_SUPPLY_PROP_ONLINE, 322 POWER_SUPPLY_PROP_CURRENT_MAX, 323 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, 324 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, 325 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, 326 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, 327 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, 328 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT, 329 POWER_SUPPLY_PROP_USB_TYPE, 330 POWER_SUPPLY_PROP_PRECHARGE_CURRENT, 331 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT, 332 POWER_SUPPLY_PROP_MODEL_NAME, 333 POWER_SUPPLY_PROP_MANUFACTURER, 334 }; 335 336 static enum power_supply_usb_type rt9471_charger_usb_types[] = { 337 POWER_SUPPLY_USB_TYPE_UNKNOWN, 338 POWER_SUPPLY_USB_TYPE_SDP, 339 POWER_SUPPLY_USB_TYPE_DCP, 340 POWER_SUPPLY_USB_TYPE_CDP, 341 POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID, 342 }; 343 344 static int rt9471_charger_property_is_writeable(struct power_supply *psy, 345 enum power_supply_property psp) 346 { 347 switch (psp) { 348 case POWER_SUPPLY_PROP_STATUS: 349 case POWER_SUPPLY_PROP_ONLINE: 350 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 351 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 352 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 353 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 354 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 355 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 356 return 1; 357 default: 358 return 0; 359 } 360 } 361 362 static int rt9471_charger_set_property(struct power_supply *psy, 363 enum power_supply_property psp, 364 const union power_supply_propval *val) 365 { 366 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 367 int value = val->intval; 368 369 switch (psp) { 370 case POWER_SUPPLY_PROP_STATUS: 371 return regmap_field_write(chip->rm_fields[F_CHG_EN], !!value); 372 case POWER_SUPPLY_PROP_ONLINE: 373 return regmap_field_write(chip->rm_fields[F_HZ], !value); 374 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 375 return rt9471_set_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, value); 376 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 377 return rt9471_set_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, value); 378 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 379 return rt9471_set_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, value); 380 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 381 return rt9471_set_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, value); 382 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 383 return rt9471_set_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, value); 384 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 385 return rt9471_set_ieoc(chip, val->intval); 386 default: 387 return -EINVAL; 388 } 389 } 390 391 static const char * const rt9471_manufacturer = "Richtek Technology Corp."; 392 static const char * const rt9471_model = "RT9471"; 393 394 static int rt9471_charger_get_property(struct power_supply *psy, 395 enum power_supply_property psp, 396 union power_supply_propval *val) 397 { 398 struct rt9471_chip *chip = power_supply_get_drvdata(psy); 399 int *pvalue = &val->intval; 400 401 switch (psp) { 402 case POWER_SUPPLY_PROP_STATUS: 403 return rt9471_get_status(chip, pvalue); 404 case POWER_SUPPLY_PROP_ONLINE: 405 return rt9471_get_vbus_good(chip, pvalue); 406 case POWER_SUPPLY_PROP_CURRENT_MAX: 407 return rt9471_get_usb_type_current(chip, pvalue); 408 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 409 return rt9471_get_value_by_field_range(chip, F_ICHG_REG, RT9471_RANGE_ICHG, pvalue); 410 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: 411 *pvalue = RT9471_ICHG_MAXUA; 412 return 0; 413 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 414 return rt9471_get_value_by_field_range(chip, F_VBAT_REG, RT9471_RANGE_VCHG, pvalue); 415 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: 416 val->intval = RT9471_VCHG_MAXUV; 417 return 0; 418 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 419 return rt9471_get_value_by_field_range(chip, F_AICR, RT9471_RANGE_AICR, pvalue); 420 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 421 return rt9471_get_value_by_field_range(chip, F_MIVR, RT9471_RANGE_MIVR, pvalue); 422 case POWER_SUPPLY_PROP_USB_TYPE: 423 return rt9471_get_usb_type(chip, pvalue); 424 case POWER_SUPPLY_PROP_PRECHARGE_CURRENT: 425 return rt9471_get_value_by_field_range(chip, F_IPRE_CHG, RT9471_RANGE_IPRE, pvalue); 426 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT: 427 return rt9471_get_ieoc(chip, pvalue); 428 case POWER_SUPPLY_PROP_MODEL_NAME: 429 val->strval = rt9471_model; 430 return 0; 431 case POWER_SUPPLY_PROP_MANUFACTURER: 432 val->strval = rt9471_manufacturer; 433 return 0; 434 default: 435 return -ENODATA; 436 } 437 } 438 439 static irqreturn_t rt9471_vbus_gd_handler(int irqno, void *devid) 440 { 441 struct rt9471_chip *chip = devid; 442 443 power_supply_changed(chip->psy); 444 445 return IRQ_HANDLED; 446 } 447 448 static irqreturn_t rt9471_detach_handler(int irqno, void *devid) 449 { 450 struct rt9471_chip *chip = devid; 451 unsigned int vbus_gd; 452 int ret; 453 454 ret = regmap_field_read(chip->rm_fields[F_ST_VBUS_GD], &vbus_gd); 455 if (ret) 456 return IRQ_NONE; 457 458 /* Only focus on really detached */ 459 if (vbus_gd) 460 return IRQ_HANDLED; 461 462 mutex_lock(&chip->var_lock); 463 chip->psy_usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 464 chip->psy_usb_curr = 0; 465 mutex_unlock(&chip->var_lock); 466 467 power_supply_changed(chip->psy); 468 469 return IRQ_HANDLED; 470 } 471 472 static irqreturn_t rt9471_bc12_done_handler(int irqno, void *devid) 473 { 474 struct rt9471_chip *chip = devid; 475 enum power_supply_usb_type usb_type; 476 unsigned int port_stat; 477 int usb_curr, ret; 478 479 ret = regmap_field_read(chip->rm_fields[F_PORT_STAT], &port_stat); 480 if (ret) 481 return IRQ_NONE; 482 483 switch (port_stat) { 484 case RT9471_PORTSTAT_APPLE_10W: 485 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 486 usb_curr = 2000000; 487 break; 488 case RT9471_PORTSTAT_APPLE_5W: 489 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 490 usb_curr = 1000000; 491 break; 492 case RT9471_PORTSTAT_APPLE_12W: 493 usb_type = POWER_SUPPLY_USB_TYPE_APPLE_BRICK_ID; 494 usb_curr = 2400000; 495 break; 496 case RT9471_PORTSTAT_SAMSUNG_10W: 497 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 498 usb_curr = 2000000; 499 break; 500 case RT9471_PORTSTAT_DCP: 501 usb_type = POWER_SUPPLY_USB_TYPE_DCP; 502 usb_curr = 1500000; 503 break; 504 case RT9471_PORTSTAT_NSTD: 505 case RT9471_PORTSTAT_SDP: 506 usb_type = POWER_SUPPLY_USB_TYPE_SDP; 507 usb_curr = 500000; 508 break; 509 case RT9471_PORTSTAT_CDP: 510 usb_type = POWER_SUPPLY_USB_TYPE_CDP; 511 usb_curr = 1500000; 512 break; 513 default: 514 usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; 515 usb_curr = 0; 516 break; 517 } 518 519 mutex_lock(&chip->var_lock); 520 chip->psy_usb_type = usb_type; 521 chip->psy_usb_curr = usb_curr; 522 mutex_unlock(&chip->var_lock); 523 524 power_supply_changed(chip->psy); 525 526 return IRQ_HANDLED; 527 } 528 529 static irqreturn_t rt9471_wdt_handler(int irqno, void *devid) 530 { 531 struct rt9471_chip *chip = devid; 532 int ret; 533 534 ret = regmap_field_write(chip->rm_fields[F_WDT_RST], 1); 535 536 return ret ? IRQ_NONE : IRQ_HANDLED; 537 } 538 539 static irqreturn_t rt9471_otg_fault_handler(int irqno, void *devid) 540 { 541 struct rt9471_chip *chip = devid; 542 543 regulator_notifier_call_chain(chip->otg_rdev, REGULATOR_EVENT_FAIL, NULL); 544 545 return IRQ_HANDLED; 546 } 547 548 #define RT9471_IRQ_DESC(_name, _hwirq) \ 549 { \ 550 .name = #_name, \ 551 .hwirq = _hwirq, \ 552 .handler = rt9471_##_name##_handler, \ 553 } 554 555 static int rt9471_register_interrupts(struct rt9471_chip *chip) 556 { 557 struct device *dev = chip->dev; 558 static const struct { 559 char *name; 560 int hwirq; 561 irq_handler_t handler; 562 } chg_irqs[] = { 563 RT9471_IRQ_DESC(vbus_gd, RT9471_IRQ_VBUS_GD), 564 RT9471_IRQ_DESC(detach, RT9471_IRQ_DETACH), 565 RT9471_IRQ_DESC(bc12_done, RT9471_IRQ_BC12_DONE), 566 RT9471_IRQ_DESC(wdt, RT9471_IRQ_WDT), 567 RT9471_IRQ_DESC(otg_fault, RT9471_IRQ_OTG_FAULT), 568 }, *curr; 569 int i, virq, ret; 570 571 for (i = 0; i < ARRAY_SIZE(chg_irqs); i++) { 572 curr = chg_irqs + i; 573 574 virq = regmap_irq_get_virq(chip->irq_chip_data, curr->hwirq); 575 if (virq <= 0) 576 return virq; 577 578 ret = devm_request_threaded_irq(dev, virq, NULL, curr->handler, 579 IRQF_ONESHOT, curr->name, chip); 580 if (ret) 581 return dev_err_probe(dev, ret, "Failed to register IRQ (%s)\n", 582 curr->name); 583 } 584 585 return 0; 586 } 587 588 static const struct regulator_ops rt9471_otg_ops = { 589 .enable = regulator_enable_regmap, 590 .disable = regulator_disable_regmap, 591 .is_enabled = regulator_is_enabled_regmap, 592 .list_voltage = regulator_list_voltage_linear, 593 .get_voltage_sel = regulator_get_voltage_sel_regmap, 594 .set_voltage_sel = regulator_set_voltage_sel_regmap, 595 .set_current_limit = regulator_set_current_limit_regmap, 596 .get_current_limit = regulator_get_current_limit_regmap, 597 }; 598 599 static const unsigned int rt9471_otg_microamp[] = { 500000, 1200000, }; 600 601 static const struct regulator_desc rt9471_otg_rdesc = { 602 .of_match = of_match_ptr("usb-otg-vbus-regulator"), 603 .name = "rt9471-otg-vbus", 604 .owner = THIS_MODULE, 605 .type = REGULATOR_VOLTAGE, 606 .ops = &rt9471_otg_ops, 607 .min_uV = RT9471_OTGCV_MINUV, 608 .uV_step = RT9471_OTGCV_STEPUV, 609 .n_voltages = RT9471_NUM_VOTG, 610 .curr_table = rt9471_otg_microamp, 611 .n_current_limits = ARRAY_SIZE(rt9471_otg_microamp), 612 .enable_mask = RT9471_OTGEN_MASK, 613 .enable_reg = RT9471_REG_FUNC, 614 .vsel_reg = RT9471_REG_OTGCFG, 615 .vsel_mask = RT9471_OTGCV_MASK, 616 .csel_reg = RT9471_REG_OTGCFG, 617 .csel_mask = RT9471_OTGCC_MASK, 618 }; 619 620 static int rt9471_register_otg_regulator(struct rt9471_chip *chip) 621 { 622 struct device *dev = chip->dev; 623 struct regulator_config cfg = { .dev = dev, .driver_data = chip }; 624 625 chip->otg_rdev = devm_regulator_register(dev, &rt9471_otg_rdesc, &cfg); 626 627 return PTR_ERR_OR_ZERO(chip->otg_rdev); 628 } 629 630 static inline struct rt9471_chip *psy_device_to_chip(struct device *dev) 631 { 632 return power_supply_get_drvdata(to_power_supply(dev)); 633 } 634 635 static ssize_t sysoff_enable_show(struct device *dev, 636 struct device_attribute *attr, char *buf) 637 { 638 struct rt9471_chip *chip = psy_device_to_chip(dev); 639 unsigned int sysoff_enable; 640 int ret; 641 642 ret = regmap_field_read(chip->rm_fields[F_BATFET_DIS], &sysoff_enable); 643 if (ret) 644 return ret; 645 646 return sysfs_emit(buf, "%d\n", sysoff_enable); 647 } 648 649 static ssize_t sysoff_enable_store(struct device *dev, 650 struct device_attribute *attr, 651 const char *buf, size_t count) 652 { 653 struct rt9471_chip *chip = psy_device_to_chip(dev); 654 unsigned int tmp; 655 int ret; 656 657 ret = kstrtouint(buf, 10, &tmp); 658 if (ret) 659 return ret; 660 661 ret = regmap_field_write(chip->rm_fields[F_BATFET_DIS], !!tmp); 662 if (ret) 663 return ret; 664 665 return count; 666 } 667 668 static ssize_t port_detect_enable_show(struct device *dev, 669 struct device_attribute *attr, char *buf) 670 { 671 struct rt9471_chip *chip = psy_device_to_chip(dev); 672 unsigned int bc12_enable; 673 int ret; 674 675 ret = regmap_field_read(chip->rm_fields[F_BC12_EN], &bc12_enable); 676 if (ret) 677 return ret; 678 679 return sysfs_emit(buf, "%d\n", bc12_enable); 680 } 681 682 static ssize_t port_detect_enable_store(struct device *dev, 683 struct device_attribute *attr, 684 const char *buf, size_t count) 685 { 686 struct rt9471_chip *chip = psy_device_to_chip(dev); 687 unsigned int tmp; 688 int ret; 689 690 ret = kstrtouint(buf, 10, &tmp); 691 if (ret) 692 return ret; 693 694 ret = regmap_field_write(chip->rm_fields[F_BC12_EN], !!tmp); 695 if (ret) 696 return ret; 697 698 return count; 699 } 700 701 static DEVICE_ATTR_RW(sysoff_enable); 702 static DEVICE_ATTR_RW(port_detect_enable); 703 704 static struct attribute *rt9471_sysfs_attrs[] = { 705 &dev_attr_sysoff_enable.attr, 706 &dev_attr_port_detect_enable.attr, 707 NULL 708 }; 709 710 ATTRIBUTE_GROUPS(rt9471_sysfs); 711 712 static int rt9471_register_psy(struct rt9471_chip *chip) 713 { 714 struct device *dev = chip->dev; 715 struct power_supply_desc *desc = &chip->psy_desc; 716 struct power_supply_config cfg = {}; 717 char *psy_name; 718 719 cfg.drv_data = chip; 720 cfg.of_node = dev->of_node; 721 cfg.attr_grp = rt9471_sysfs_groups; 722 723 psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9471-%s", dev_name(dev)); 724 if (!psy_name) 725 return -ENOMEM; 726 727 desc->name = psy_name; 728 desc->type = POWER_SUPPLY_TYPE_USB; 729 desc->usb_types = rt9471_charger_usb_types; 730 desc->num_usb_types = ARRAY_SIZE(rt9471_charger_usb_types); 731 desc->properties = rt9471_charger_properties; 732 desc->num_properties = ARRAY_SIZE(rt9471_charger_properties); 733 desc->get_property = rt9471_charger_get_property; 734 desc->set_property = rt9471_charger_set_property; 735 desc->property_is_writeable = rt9471_charger_property_is_writeable; 736 737 chip->psy = devm_power_supply_register(dev, desc, &cfg); 738 739 return PTR_ERR_OR_ZERO(chip->psy); 740 } 741 742 static const struct regmap_irq rt9471_regmap_irqs[] = { 743 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BC12_DONE, 8), 744 REGMAP_IRQ_REG_LINE(RT9471_IRQ_DETACH, 8), 745 REGMAP_IRQ_REG_LINE(RT9471_IRQ_RECHG, 8), 746 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_DONE, 8), 747 REGMAP_IRQ_REG_LINE(RT9471_IRQ_BG_CHG, 8), 748 REGMAP_IRQ_REG_LINE(RT9471_IRQ_IE0C, 8), 749 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_RDY, 8), 750 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VBUS_GD, 8), 751 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BATOV, 8), 752 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_SYSOV, 8), 753 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_TOUT, 8), 754 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_BUSUV, 8), 755 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_THREG, 8), 756 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_AICR, 8), 757 REGMAP_IRQ_REG_LINE(RT9471_IRQ_CHG_MIVR, 8), 758 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_SHORT, 8), 759 REGMAP_IRQ_REG_LINE(RT9471_IRQ_SYS_MIN, 8), 760 REGMAP_IRQ_REG_LINE(RT9471_IRQ_AICC_DONE, 8), 761 REGMAP_IRQ_REG_LINE(RT9471_IRQ_PE_DONE, 8), 762 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COLD, 8), 763 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_COOL, 8), 764 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_WARM, 8), 765 REGMAP_IRQ_REG_LINE(RT9471_IRQ_JEITA_HOT, 8), 766 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_FAULT, 8), 767 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_LBP, 8), 768 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTG_CC, 8), 769 REGMAP_IRQ_REG_LINE(RT9471_IRQ_WDT, 8), 770 REGMAP_IRQ_REG_LINE(RT9471_IRQ_VAC_OV, 8), 771 REGMAP_IRQ_REG_LINE(RT9471_IRQ_OTP, 8), 772 }; 773 774 static const struct regmap_irq_chip rt9471_irq_chip = { 775 .name = "rt9471-irqs", 776 .status_base = RT9471_REG_IRQ0, 777 .mask_base = RT9471_REG_MASK0, 778 .num_regs = RT9471_NUM_IRQ_REGS, 779 .irqs = rt9471_regmap_irqs, 780 .num_irqs = ARRAY_SIZE(rt9471_regmap_irqs), 781 }; 782 783 static const struct reg_sequence rt9471_init_regs[] = { 784 REG_SEQ0(RT9471_REG_INFO, 0x80), /* REG_RST */ 785 REG_SEQ0(RT9471_REG_TOP, 0xC0), /* WDT = 0 */ 786 REG_SEQ0(RT9471_REG_FUNC, 0x01), /* BATFET_DIS_DLY = 0 */ 787 REG_SEQ0(RT9471_REG_IBUS, 0x0A), /* AUTO_AICR = 0 */ 788 REG_SEQ0(RT9471_REG_VBUS, 0xC6), /* VAC_OVP = 14V */ 789 REG_SEQ0(RT9471_REG_JEITA, 0x38), /* JEITA = 0 */ 790 REG_SEQ0(RT9471_REG_DPDMDET, 0x31), /* BC12_EN = 0, DCP_DP_OPT = 1 */ 791 }; 792 793 static int rt9471_check_devinfo(struct rt9471_chip *chip) 794 { 795 struct device *dev = chip->dev; 796 unsigned int dev_id; 797 int ret; 798 799 ret = regmap_field_read(chip->rm_fields[F_DEVICE_ID], &dev_id); 800 if (ret) 801 return dev_err_probe(dev, ret, "Failed to read device_id\n"); 802 803 switch (dev_id) { 804 case RT9470_DEVID: 805 case RT9470D_DEVID: 806 case RT9471_DEVID: 807 case RT9471D_DEVID: 808 return 0; 809 default: 810 return dev_err_probe(dev, -ENODEV, "Incorrect device id\n"); 811 } 812 } 813 814 static bool rt9471_accessible_reg(struct device *dev, unsigned int reg) 815 { 816 switch (reg) { 817 case 0x00 ... 0x0F: 818 case 0x10 ... 0x13: 819 case 0x20 ... 0x33: 820 case 0x40 ... 0xA1: 821 return true; 822 default: 823 return false; 824 } 825 } 826 827 static const struct regmap_config rt9471_regmap_config = { 828 .reg_bits = 8, 829 .val_bits = 8, 830 .max_register = 0xA1, 831 .writeable_reg = rt9471_accessible_reg, 832 .readable_reg = rt9471_accessible_reg, 833 }; 834 835 static int rt9471_probe(struct i2c_client *i2c) 836 { 837 struct device *dev = &i2c->dev; 838 struct rt9471_chip *chip; 839 struct gpio_desc *ce_gpio; 840 struct regmap *regmap; 841 int ret; 842 843 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); 844 if (!chip) 845 return -ENOMEM; 846 847 chip->dev = dev; 848 mutex_init(&chip->var_lock); 849 i2c_set_clientdata(i2c, chip); 850 851 /* Default pull charge enable gpio to make 'CHG_EN' by SW control only */ 852 ce_gpio = devm_gpiod_get_optional(dev, "charge-enable", GPIOD_OUT_HIGH); 853 if (IS_ERR(ce_gpio)) 854 return dev_err_probe(dev, PTR_ERR(ce_gpio), 855 "Failed to config charge enable gpio\n"); 856 857 regmap = devm_regmap_init_i2c(i2c, &rt9471_regmap_config); 858 if (IS_ERR(regmap)) 859 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); 860 861 chip->regmap = regmap; 862 863 ret = devm_regmap_field_bulk_alloc(dev, regmap, chip->rm_fields, 864 rt9471_reg_fields, 865 ARRAY_SIZE(rt9471_reg_fields)); 866 if (ret) 867 return dev_err_probe(dev, ret, "Failed to alloc regmap field\n"); 868 869 ret = rt9471_check_devinfo(chip); 870 if (ret) 871 return ret; 872 873 ret = regmap_register_patch(regmap, rt9471_init_regs, 874 ARRAY_SIZE(rt9471_init_regs)); 875 if (ret) 876 return dev_err_probe(dev, ret, "Failed to init registers\n"); 877 878 ret = devm_regmap_add_irq_chip(dev, regmap, i2c->irq, 879 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0, 880 &rt9471_irq_chip, &chip->irq_chip_data); 881 if (ret) 882 return dev_err_probe(dev, ret, "Failed to add IRQ chip\n"); 883 884 ret = rt9471_register_psy(chip); 885 if (ret) 886 return dev_err_probe(dev, ret, "Failed to register psy\n"); 887 888 ret = rt9471_register_otg_regulator(chip); 889 if (ret) 890 return dev_err_probe(dev, ret, "Failed to register otg\n"); 891 892 ret = rt9471_register_interrupts(chip); 893 if (ret) 894 return ret; 895 896 /* After IRQs are all initialized, enable port detection by default */ 897 return regmap_field_write(chip->rm_fields[F_BC12_EN], 1); 898 } 899 900 static void rt9471_shutdown(struct i2c_client *i2c) 901 { 902 struct rt9471_chip *chip = i2c_get_clientdata(i2c); 903 904 /* 905 * There's no external reset pin. Do register reset to guarantee charger 906 * function is normal after shutdown 907 */ 908 regmap_field_write(chip->rm_fields[F_REG_RST], 1); 909 } 910 911 static const struct of_device_id rt9471_of_device_id[] = { 912 { .compatible = "richtek,rt9471" }, 913 {} 914 }; 915 MODULE_DEVICE_TABLE(of, rt9471_of_device_id); 916 917 static struct i2c_driver rt9471_driver = { 918 .driver = { 919 .name = "rt9471", 920 .of_match_table = rt9471_of_device_id, 921 }, 922 .probe = rt9471_probe, 923 .shutdown = rt9471_shutdown, 924 }; 925 module_i2c_driver(rt9471_driver); 926 927 MODULE_DESCRIPTION("Richtek RT9471 charger driver"); 928 MODULE_AUTHOR("Alina Yu <alina_yu@richtek.com>"); 929 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); 930 MODULE_LICENSE("GPL"); 931