1 /* 2 * BQ27xxx battery driver 3 * 4 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it> 5 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it> 6 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de> 7 * Copyright (C) 2011 Pali Rohár <pali.rohar@gmail.com> 8 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net> 9 * 10 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc. 11 * 12 * This package is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * Datasheets: 21 * http://www.ti.com/product/bq27000 22 * http://www.ti.com/product/bq27200 23 * http://www.ti.com/product/bq27010 24 * http://www.ti.com/product/bq27210 25 * http://www.ti.com/product/bq27500 26 * http://www.ti.com/product/bq27510-g1 27 * http://www.ti.com/product/bq27510-g2 28 * http://www.ti.com/product/bq27510-g3 29 * http://www.ti.com/product/bq27520-g4 30 * http://www.ti.com/product/bq27520-g1 31 * http://www.ti.com/product/bq27520-g2 32 * http://www.ti.com/product/bq27520-g3 33 * http://www.ti.com/product/bq27520-g4 34 * http://www.ti.com/product/bq27530-g1 35 * http://www.ti.com/product/bq27531-g1 36 * http://www.ti.com/product/bq27541-g1 37 * http://www.ti.com/product/bq27542-g1 38 * http://www.ti.com/product/bq27546-g1 39 * http://www.ti.com/product/bq27742-g1 40 * http://www.ti.com/product/bq27545-g1 41 * http://www.ti.com/product/bq27421-g1 42 * http://www.ti.com/product/bq27425-g1 43 * http://www.ti.com/product/bq27411-g1 44 * http://www.ti.com/product/bq27621-g1 45 */ 46 47 #include <linux/device.h> 48 #include <linux/module.h> 49 #include <linux/mutex.h> 50 #include <linux/param.h> 51 #include <linux/jiffies.h> 52 #include <linux/workqueue.h> 53 #include <linux/delay.h> 54 #include <linux/platform_device.h> 55 #include <linux/power_supply.h> 56 #include <linux/slab.h> 57 #include <linux/of.h> 58 59 #include <linux/power/bq27xxx_battery.h> 60 61 #define BQ27XXX_MANUFACTURER "Texas Instruments" 62 63 /* BQ27XXX Flags */ 64 #define BQ27XXX_FLAG_DSC BIT(0) 65 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */ 66 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */ 67 #define BQ27XXX_FLAG_CFGUP BIT(4) 68 #define BQ27XXX_FLAG_FC BIT(9) 69 #define BQ27XXX_FLAG_OTD BIT(14) 70 #define BQ27XXX_FLAG_OTC BIT(15) 71 #define BQ27XXX_FLAG_UT BIT(14) 72 #define BQ27XXX_FLAG_OT BIT(15) 73 74 /* BQ27000 has different layout for Flags register */ 75 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */ 76 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */ 77 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */ 78 #define BQ27000_FLAG_FC BIT(5) 79 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */ 80 81 /* control register params */ 82 #define BQ27XXX_SEALED 0x20 83 #define BQ27XXX_SET_CFGUPDATE 0x13 84 #define BQ27XXX_SOFT_RESET 0x42 85 #define BQ27XXX_RESET 0x41 86 87 #define BQ27XXX_RS (20) /* Resistor sense mOhm */ 88 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */ 89 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */ 90 91 #define INVALID_REG_ADDR 0xff 92 93 /* 94 * bq27xxx_reg_index - Register names 95 * 96 * These are indexes into a device's register mapping array. 97 */ 98 99 enum bq27xxx_reg_index { 100 BQ27XXX_REG_CTRL = 0, /* Control */ 101 BQ27XXX_REG_TEMP, /* Temperature */ 102 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */ 103 BQ27XXX_REG_VOLT, /* Voltage */ 104 BQ27XXX_REG_AI, /* Average Current */ 105 BQ27XXX_REG_FLAGS, /* Flags */ 106 BQ27XXX_REG_TTE, /* Time-to-Empty */ 107 BQ27XXX_REG_TTF, /* Time-to-Full */ 108 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */ 109 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */ 110 BQ27XXX_REG_NAC, /* Nominal Available Capacity */ 111 BQ27XXX_REG_FCC, /* Full Charge Capacity */ 112 BQ27XXX_REG_CYCT, /* Cycle Count */ 113 BQ27XXX_REG_AE, /* Available Energy */ 114 BQ27XXX_REG_SOC, /* State-of-Charge */ 115 BQ27XXX_REG_DCAP, /* Design Capacity */ 116 BQ27XXX_REG_AP, /* Average Power */ 117 BQ27XXX_DM_CTRL, /* Block Data Control */ 118 BQ27XXX_DM_CLASS, /* Data Class */ 119 BQ27XXX_DM_BLOCK, /* Data Block */ 120 BQ27XXX_DM_DATA, /* Block Data */ 121 BQ27XXX_DM_CKSUM, /* Block Data Checksum */ 122 BQ27XXX_REG_MAX, /* sentinel */ 123 }; 124 125 #define BQ27XXX_DM_REG_ROWS \ 126 [BQ27XXX_DM_CTRL] = 0x61, \ 127 [BQ27XXX_DM_CLASS] = 0x3e, \ 128 [BQ27XXX_DM_BLOCK] = 0x3f, \ 129 [BQ27XXX_DM_DATA] = 0x40, \ 130 [BQ27XXX_DM_CKSUM] = 0x60 131 132 /* Register mappings */ 133 static u8 134 bq27000_regs[BQ27XXX_REG_MAX] = { 135 [BQ27XXX_REG_CTRL] = 0x00, 136 [BQ27XXX_REG_TEMP] = 0x06, 137 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 138 [BQ27XXX_REG_VOLT] = 0x08, 139 [BQ27XXX_REG_AI] = 0x14, 140 [BQ27XXX_REG_FLAGS] = 0x0a, 141 [BQ27XXX_REG_TTE] = 0x16, 142 [BQ27XXX_REG_TTF] = 0x18, 143 [BQ27XXX_REG_TTES] = 0x1c, 144 [BQ27XXX_REG_TTECP] = 0x26, 145 [BQ27XXX_REG_NAC] = 0x0c, 146 [BQ27XXX_REG_FCC] = 0x12, 147 [BQ27XXX_REG_CYCT] = 0x2a, 148 [BQ27XXX_REG_AE] = 0x22, 149 [BQ27XXX_REG_SOC] = 0x0b, 150 [BQ27XXX_REG_DCAP] = 0x76, 151 [BQ27XXX_REG_AP] = 0x24, 152 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 153 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 154 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 155 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 156 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 157 }, 158 bq27010_regs[BQ27XXX_REG_MAX] = { 159 [BQ27XXX_REG_CTRL] = 0x00, 160 [BQ27XXX_REG_TEMP] = 0x06, 161 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 162 [BQ27XXX_REG_VOLT] = 0x08, 163 [BQ27XXX_REG_AI] = 0x14, 164 [BQ27XXX_REG_FLAGS] = 0x0a, 165 [BQ27XXX_REG_TTE] = 0x16, 166 [BQ27XXX_REG_TTF] = 0x18, 167 [BQ27XXX_REG_TTES] = 0x1c, 168 [BQ27XXX_REG_TTECP] = 0x26, 169 [BQ27XXX_REG_NAC] = 0x0c, 170 [BQ27XXX_REG_FCC] = 0x12, 171 [BQ27XXX_REG_CYCT] = 0x2a, 172 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 173 [BQ27XXX_REG_SOC] = 0x0b, 174 [BQ27XXX_REG_DCAP] = 0x76, 175 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 176 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 177 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 178 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 179 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 180 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 181 }, 182 bq2750x_regs[BQ27XXX_REG_MAX] = { 183 [BQ27XXX_REG_CTRL] = 0x00, 184 [BQ27XXX_REG_TEMP] = 0x06, 185 [BQ27XXX_REG_INT_TEMP] = 0x28, 186 [BQ27XXX_REG_VOLT] = 0x08, 187 [BQ27XXX_REG_AI] = 0x14, 188 [BQ27XXX_REG_FLAGS] = 0x0a, 189 [BQ27XXX_REG_TTE] = 0x16, 190 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 191 [BQ27XXX_REG_TTES] = 0x1a, 192 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 193 [BQ27XXX_REG_NAC] = 0x0c, 194 [BQ27XXX_REG_FCC] = 0x12, 195 [BQ27XXX_REG_CYCT] = 0x2a, 196 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 197 [BQ27XXX_REG_SOC] = 0x2c, 198 [BQ27XXX_REG_DCAP] = 0x3c, 199 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 200 BQ27XXX_DM_REG_ROWS, 201 }, 202 #define bq2751x_regs bq27510g3_regs 203 #define bq2752x_regs bq27510g3_regs 204 bq27500_regs[BQ27XXX_REG_MAX] = { 205 [BQ27XXX_REG_CTRL] = 0x00, 206 [BQ27XXX_REG_TEMP] = 0x06, 207 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 208 [BQ27XXX_REG_VOLT] = 0x08, 209 [BQ27XXX_REG_AI] = 0x14, 210 [BQ27XXX_REG_FLAGS] = 0x0a, 211 [BQ27XXX_REG_TTE] = 0x16, 212 [BQ27XXX_REG_TTF] = 0x18, 213 [BQ27XXX_REG_TTES] = 0x1c, 214 [BQ27XXX_REG_TTECP] = 0x26, 215 [BQ27XXX_REG_NAC] = 0x0c, 216 [BQ27XXX_REG_FCC] = 0x12, 217 [BQ27XXX_REG_CYCT] = 0x2a, 218 [BQ27XXX_REG_AE] = 0x22, 219 [BQ27XXX_REG_SOC] = 0x2c, 220 [BQ27XXX_REG_DCAP] = 0x3c, 221 [BQ27XXX_REG_AP] = 0x24, 222 BQ27XXX_DM_REG_ROWS, 223 }, 224 #define bq27510g1_regs bq27500_regs 225 #define bq27510g2_regs bq27500_regs 226 bq27510g3_regs[BQ27XXX_REG_MAX] = { 227 [BQ27XXX_REG_CTRL] = 0x00, 228 [BQ27XXX_REG_TEMP] = 0x06, 229 [BQ27XXX_REG_INT_TEMP] = 0x28, 230 [BQ27XXX_REG_VOLT] = 0x08, 231 [BQ27XXX_REG_AI] = 0x14, 232 [BQ27XXX_REG_FLAGS] = 0x0a, 233 [BQ27XXX_REG_TTE] = 0x16, 234 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 235 [BQ27XXX_REG_TTES] = 0x1a, 236 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 237 [BQ27XXX_REG_NAC] = 0x0c, 238 [BQ27XXX_REG_FCC] = 0x12, 239 [BQ27XXX_REG_CYCT] = 0x1e, 240 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 241 [BQ27XXX_REG_SOC] = 0x20, 242 [BQ27XXX_REG_DCAP] = 0x2e, 243 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 244 BQ27XXX_DM_REG_ROWS, 245 }, 246 bq27520g1_regs[BQ27XXX_REG_MAX] = { 247 [BQ27XXX_REG_CTRL] = 0x00, 248 [BQ27XXX_REG_TEMP] = 0x06, 249 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 250 [BQ27XXX_REG_VOLT] = 0x08, 251 [BQ27XXX_REG_AI] = 0x14, 252 [BQ27XXX_REG_FLAGS] = 0x0a, 253 [BQ27XXX_REG_TTE] = 0x16, 254 [BQ27XXX_REG_TTF] = 0x18, 255 [BQ27XXX_REG_TTES] = 0x1c, 256 [BQ27XXX_REG_TTECP] = 0x26, 257 [BQ27XXX_REG_NAC] = 0x0c, 258 [BQ27XXX_REG_FCC] = 0x12, 259 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 260 [BQ27XXX_REG_AE] = 0x22, 261 [BQ27XXX_REG_SOC] = 0x2c, 262 [BQ27XXX_REG_DCAP] = 0x3c, 263 [BQ27XXX_REG_AP] = 0x24, 264 BQ27XXX_DM_REG_ROWS, 265 }, 266 bq27520g2_regs[BQ27XXX_REG_MAX] = { 267 [BQ27XXX_REG_CTRL] = 0x00, 268 [BQ27XXX_REG_TEMP] = 0x06, 269 [BQ27XXX_REG_INT_TEMP] = 0x36, 270 [BQ27XXX_REG_VOLT] = 0x08, 271 [BQ27XXX_REG_AI] = 0x14, 272 [BQ27XXX_REG_FLAGS] = 0x0a, 273 [BQ27XXX_REG_TTE] = 0x16, 274 [BQ27XXX_REG_TTF] = 0x18, 275 [BQ27XXX_REG_TTES] = 0x1c, 276 [BQ27XXX_REG_TTECP] = 0x26, 277 [BQ27XXX_REG_NAC] = 0x0c, 278 [BQ27XXX_REG_FCC] = 0x12, 279 [BQ27XXX_REG_CYCT] = 0x2a, 280 [BQ27XXX_REG_AE] = 0x22, 281 [BQ27XXX_REG_SOC] = 0x2c, 282 [BQ27XXX_REG_DCAP] = 0x3c, 283 [BQ27XXX_REG_AP] = 0x24, 284 BQ27XXX_DM_REG_ROWS, 285 }, 286 bq27520g3_regs[BQ27XXX_REG_MAX] = { 287 [BQ27XXX_REG_CTRL] = 0x00, 288 [BQ27XXX_REG_TEMP] = 0x06, 289 [BQ27XXX_REG_INT_TEMP] = 0x36, 290 [BQ27XXX_REG_VOLT] = 0x08, 291 [BQ27XXX_REG_AI] = 0x14, 292 [BQ27XXX_REG_FLAGS] = 0x0a, 293 [BQ27XXX_REG_TTE] = 0x16, 294 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 295 [BQ27XXX_REG_TTES] = 0x1c, 296 [BQ27XXX_REG_TTECP] = 0x26, 297 [BQ27XXX_REG_NAC] = 0x0c, 298 [BQ27XXX_REG_FCC] = 0x12, 299 [BQ27XXX_REG_CYCT] = 0x2a, 300 [BQ27XXX_REG_AE] = 0x22, 301 [BQ27XXX_REG_SOC] = 0x2c, 302 [BQ27XXX_REG_DCAP] = 0x3c, 303 [BQ27XXX_REG_AP] = 0x24, 304 BQ27XXX_DM_REG_ROWS, 305 }, 306 bq27520g4_regs[BQ27XXX_REG_MAX] = { 307 [BQ27XXX_REG_CTRL] = 0x00, 308 [BQ27XXX_REG_TEMP] = 0x06, 309 [BQ27XXX_REG_INT_TEMP] = 0x28, 310 [BQ27XXX_REG_VOLT] = 0x08, 311 [BQ27XXX_REG_AI] = 0x14, 312 [BQ27XXX_REG_FLAGS] = 0x0a, 313 [BQ27XXX_REG_TTE] = 0x16, 314 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 315 [BQ27XXX_REG_TTES] = 0x1c, 316 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 317 [BQ27XXX_REG_NAC] = 0x0c, 318 [BQ27XXX_REG_FCC] = 0x12, 319 [BQ27XXX_REG_CYCT] = 0x1e, 320 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 321 [BQ27XXX_REG_SOC] = 0x20, 322 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 323 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 324 BQ27XXX_DM_REG_ROWS, 325 }, 326 bq27521_regs[BQ27XXX_REG_MAX] = { 327 [BQ27XXX_REG_CTRL] = 0x02, 328 [BQ27XXX_REG_TEMP] = 0x0a, 329 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 330 [BQ27XXX_REG_VOLT] = 0x0c, 331 [BQ27XXX_REG_AI] = 0x0e, 332 [BQ27XXX_REG_FLAGS] = 0x08, 333 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 334 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 335 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 336 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 337 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 338 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR, 339 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 340 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 341 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR, 342 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 343 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 344 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 345 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 346 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 347 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 348 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 349 }, 350 bq27530_regs[BQ27XXX_REG_MAX] = { 351 [BQ27XXX_REG_CTRL] = 0x00, 352 [BQ27XXX_REG_TEMP] = 0x06, 353 [BQ27XXX_REG_INT_TEMP] = 0x32, 354 [BQ27XXX_REG_VOLT] = 0x08, 355 [BQ27XXX_REG_AI] = 0x14, 356 [BQ27XXX_REG_FLAGS] = 0x0a, 357 [BQ27XXX_REG_TTE] = 0x16, 358 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 359 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 360 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 361 [BQ27XXX_REG_NAC] = 0x0c, 362 [BQ27XXX_REG_FCC] = 0x12, 363 [BQ27XXX_REG_CYCT] = 0x2a, 364 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 365 [BQ27XXX_REG_SOC] = 0x2c, 366 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 367 [BQ27XXX_REG_AP] = 0x24, 368 BQ27XXX_DM_REG_ROWS, 369 }, 370 #define bq27531_regs bq27530_regs 371 bq27541_regs[BQ27XXX_REG_MAX] = { 372 [BQ27XXX_REG_CTRL] = 0x00, 373 [BQ27XXX_REG_TEMP] = 0x06, 374 [BQ27XXX_REG_INT_TEMP] = 0x28, 375 [BQ27XXX_REG_VOLT] = 0x08, 376 [BQ27XXX_REG_AI] = 0x14, 377 [BQ27XXX_REG_FLAGS] = 0x0a, 378 [BQ27XXX_REG_TTE] = 0x16, 379 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 380 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 381 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 382 [BQ27XXX_REG_NAC] = 0x0c, 383 [BQ27XXX_REG_FCC] = 0x12, 384 [BQ27XXX_REG_CYCT] = 0x2a, 385 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 386 [BQ27XXX_REG_SOC] = 0x2c, 387 [BQ27XXX_REG_DCAP] = 0x3c, 388 [BQ27XXX_REG_AP] = 0x24, 389 BQ27XXX_DM_REG_ROWS, 390 }, 391 #define bq27542_regs bq27541_regs 392 #define bq27546_regs bq27541_regs 393 #define bq27742_regs bq27541_regs 394 bq27545_regs[BQ27XXX_REG_MAX] = { 395 [BQ27XXX_REG_CTRL] = 0x00, 396 [BQ27XXX_REG_TEMP] = 0x06, 397 [BQ27XXX_REG_INT_TEMP] = 0x28, 398 [BQ27XXX_REG_VOLT] = 0x08, 399 [BQ27XXX_REG_AI] = 0x14, 400 [BQ27XXX_REG_FLAGS] = 0x0a, 401 [BQ27XXX_REG_TTE] = 0x16, 402 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 403 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 404 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 405 [BQ27XXX_REG_NAC] = 0x0c, 406 [BQ27XXX_REG_FCC] = 0x12, 407 [BQ27XXX_REG_CYCT] = 0x2a, 408 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 409 [BQ27XXX_REG_SOC] = 0x2c, 410 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 411 [BQ27XXX_REG_AP] = 0x24, 412 BQ27XXX_DM_REG_ROWS, 413 }, 414 bq27421_regs[BQ27XXX_REG_MAX] = { 415 [BQ27XXX_REG_CTRL] = 0x00, 416 [BQ27XXX_REG_TEMP] = 0x02, 417 [BQ27XXX_REG_INT_TEMP] = 0x1e, 418 [BQ27XXX_REG_VOLT] = 0x04, 419 [BQ27XXX_REG_AI] = 0x10, 420 [BQ27XXX_REG_FLAGS] = 0x06, 421 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 422 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 423 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 424 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 425 [BQ27XXX_REG_NAC] = 0x08, 426 [BQ27XXX_REG_FCC] = 0x0e, 427 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 428 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 429 [BQ27XXX_REG_SOC] = 0x1c, 430 [BQ27XXX_REG_DCAP] = 0x3c, 431 [BQ27XXX_REG_AP] = 0x18, 432 BQ27XXX_DM_REG_ROWS, 433 }; 434 #define bq27425_regs bq27421_regs 435 #define bq27426_regs bq27421_regs 436 #define bq27441_regs bq27421_regs 437 #define bq27621_regs bq27421_regs 438 439 static enum power_supply_property bq27000_props[] = { 440 POWER_SUPPLY_PROP_STATUS, 441 POWER_SUPPLY_PROP_PRESENT, 442 POWER_SUPPLY_PROP_VOLTAGE_NOW, 443 POWER_SUPPLY_PROP_CURRENT_NOW, 444 POWER_SUPPLY_PROP_CAPACITY, 445 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 446 POWER_SUPPLY_PROP_TEMP, 447 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 448 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 449 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 450 POWER_SUPPLY_PROP_TECHNOLOGY, 451 POWER_SUPPLY_PROP_CHARGE_FULL, 452 POWER_SUPPLY_PROP_CHARGE_NOW, 453 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 454 POWER_SUPPLY_PROP_CYCLE_COUNT, 455 POWER_SUPPLY_PROP_ENERGY_NOW, 456 POWER_SUPPLY_PROP_POWER_AVG, 457 POWER_SUPPLY_PROP_HEALTH, 458 POWER_SUPPLY_PROP_MANUFACTURER, 459 }; 460 461 static enum power_supply_property bq27010_props[] = { 462 POWER_SUPPLY_PROP_STATUS, 463 POWER_SUPPLY_PROP_PRESENT, 464 POWER_SUPPLY_PROP_VOLTAGE_NOW, 465 POWER_SUPPLY_PROP_CURRENT_NOW, 466 POWER_SUPPLY_PROP_CAPACITY, 467 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 468 POWER_SUPPLY_PROP_TEMP, 469 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 470 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 471 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 472 POWER_SUPPLY_PROP_TECHNOLOGY, 473 POWER_SUPPLY_PROP_CHARGE_FULL, 474 POWER_SUPPLY_PROP_CHARGE_NOW, 475 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 476 POWER_SUPPLY_PROP_CYCLE_COUNT, 477 POWER_SUPPLY_PROP_HEALTH, 478 POWER_SUPPLY_PROP_MANUFACTURER, 479 }; 480 481 #define bq2750x_props bq27510g3_props 482 #define bq2751x_props bq27510g3_props 483 #define bq2752x_props bq27510g3_props 484 485 static enum power_supply_property bq27500_props[] = { 486 POWER_SUPPLY_PROP_STATUS, 487 POWER_SUPPLY_PROP_PRESENT, 488 POWER_SUPPLY_PROP_VOLTAGE_NOW, 489 POWER_SUPPLY_PROP_CURRENT_NOW, 490 POWER_SUPPLY_PROP_CAPACITY, 491 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 492 POWER_SUPPLY_PROP_TEMP, 493 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 494 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 495 POWER_SUPPLY_PROP_TECHNOLOGY, 496 POWER_SUPPLY_PROP_CHARGE_FULL, 497 POWER_SUPPLY_PROP_CHARGE_NOW, 498 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 499 POWER_SUPPLY_PROP_CYCLE_COUNT, 500 POWER_SUPPLY_PROP_ENERGY_NOW, 501 POWER_SUPPLY_PROP_POWER_AVG, 502 POWER_SUPPLY_PROP_HEALTH, 503 POWER_SUPPLY_PROP_MANUFACTURER, 504 }; 505 #define bq27510g1_props bq27500_props 506 #define bq27510g2_props bq27500_props 507 508 static enum power_supply_property bq27510g3_props[] = { 509 POWER_SUPPLY_PROP_STATUS, 510 POWER_SUPPLY_PROP_PRESENT, 511 POWER_SUPPLY_PROP_VOLTAGE_NOW, 512 POWER_SUPPLY_PROP_CURRENT_NOW, 513 POWER_SUPPLY_PROP_CAPACITY, 514 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 515 POWER_SUPPLY_PROP_TEMP, 516 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 517 POWER_SUPPLY_PROP_TECHNOLOGY, 518 POWER_SUPPLY_PROP_CHARGE_FULL, 519 POWER_SUPPLY_PROP_CHARGE_NOW, 520 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 521 POWER_SUPPLY_PROP_CYCLE_COUNT, 522 POWER_SUPPLY_PROP_HEALTH, 523 POWER_SUPPLY_PROP_MANUFACTURER, 524 }; 525 526 static enum power_supply_property bq27520g1_props[] = { 527 POWER_SUPPLY_PROP_STATUS, 528 POWER_SUPPLY_PROP_PRESENT, 529 POWER_SUPPLY_PROP_VOLTAGE_NOW, 530 POWER_SUPPLY_PROP_CURRENT_NOW, 531 POWER_SUPPLY_PROP_CAPACITY, 532 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 533 POWER_SUPPLY_PROP_TEMP, 534 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 535 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 536 POWER_SUPPLY_PROP_TECHNOLOGY, 537 POWER_SUPPLY_PROP_CHARGE_FULL, 538 POWER_SUPPLY_PROP_CHARGE_NOW, 539 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 540 POWER_SUPPLY_PROP_ENERGY_NOW, 541 POWER_SUPPLY_PROP_POWER_AVG, 542 POWER_SUPPLY_PROP_HEALTH, 543 POWER_SUPPLY_PROP_MANUFACTURER, 544 }; 545 546 #define bq27520g2_props bq27500_props 547 548 static enum power_supply_property bq27520g3_props[] = { 549 POWER_SUPPLY_PROP_STATUS, 550 POWER_SUPPLY_PROP_PRESENT, 551 POWER_SUPPLY_PROP_VOLTAGE_NOW, 552 POWER_SUPPLY_PROP_CURRENT_NOW, 553 POWER_SUPPLY_PROP_CAPACITY, 554 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 555 POWER_SUPPLY_PROP_TEMP, 556 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 557 POWER_SUPPLY_PROP_TECHNOLOGY, 558 POWER_SUPPLY_PROP_CHARGE_FULL, 559 POWER_SUPPLY_PROP_CHARGE_NOW, 560 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 561 POWER_SUPPLY_PROP_CYCLE_COUNT, 562 POWER_SUPPLY_PROP_ENERGY_NOW, 563 POWER_SUPPLY_PROP_POWER_AVG, 564 POWER_SUPPLY_PROP_HEALTH, 565 POWER_SUPPLY_PROP_MANUFACTURER, 566 }; 567 568 static enum power_supply_property bq27520g4_props[] = { 569 POWER_SUPPLY_PROP_STATUS, 570 POWER_SUPPLY_PROP_PRESENT, 571 POWER_SUPPLY_PROP_VOLTAGE_NOW, 572 POWER_SUPPLY_PROP_CURRENT_NOW, 573 POWER_SUPPLY_PROP_CAPACITY, 574 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 575 POWER_SUPPLY_PROP_TEMP, 576 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 577 POWER_SUPPLY_PROP_TECHNOLOGY, 578 POWER_SUPPLY_PROP_CHARGE_FULL, 579 POWER_SUPPLY_PROP_CHARGE_NOW, 580 POWER_SUPPLY_PROP_CYCLE_COUNT, 581 POWER_SUPPLY_PROP_HEALTH, 582 POWER_SUPPLY_PROP_MANUFACTURER, 583 }; 584 585 static enum power_supply_property bq27521_props[] = { 586 POWER_SUPPLY_PROP_STATUS, 587 POWER_SUPPLY_PROP_PRESENT, 588 POWER_SUPPLY_PROP_VOLTAGE_NOW, 589 POWER_SUPPLY_PROP_CURRENT_NOW, 590 POWER_SUPPLY_PROP_TEMP, 591 POWER_SUPPLY_PROP_TECHNOLOGY, 592 }; 593 594 static enum power_supply_property bq27530_props[] = { 595 POWER_SUPPLY_PROP_STATUS, 596 POWER_SUPPLY_PROP_PRESENT, 597 POWER_SUPPLY_PROP_VOLTAGE_NOW, 598 POWER_SUPPLY_PROP_CURRENT_NOW, 599 POWER_SUPPLY_PROP_CAPACITY, 600 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 601 POWER_SUPPLY_PROP_TEMP, 602 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 603 POWER_SUPPLY_PROP_TECHNOLOGY, 604 POWER_SUPPLY_PROP_CHARGE_FULL, 605 POWER_SUPPLY_PROP_CHARGE_NOW, 606 POWER_SUPPLY_PROP_POWER_AVG, 607 POWER_SUPPLY_PROP_HEALTH, 608 POWER_SUPPLY_PROP_CYCLE_COUNT, 609 POWER_SUPPLY_PROP_MANUFACTURER, 610 }; 611 #define bq27531_props bq27530_props 612 613 static enum power_supply_property bq27541_props[] = { 614 POWER_SUPPLY_PROP_STATUS, 615 POWER_SUPPLY_PROP_PRESENT, 616 POWER_SUPPLY_PROP_VOLTAGE_NOW, 617 POWER_SUPPLY_PROP_CURRENT_NOW, 618 POWER_SUPPLY_PROP_CAPACITY, 619 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 620 POWER_SUPPLY_PROP_TEMP, 621 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 622 POWER_SUPPLY_PROP_TECHNOLOGY, 623 POWER_SUPPLY_PROP_CHARGE_FULL, 624 POWER_SUPPLY_PROP_CHARGE_NOW, 625 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 626 POWER_SUPPLY_PROP_CYCLE_COUNT, 627 POWER_SUPPLY_PROP_POWER_AVG, 628 POWER_SUPPLY_PROP_HEALTH, 629 POWER_SUPPLY_PROP_MANUFACTURER, 630 }; 631 #define bq27542_props bq27541_props 632 #define bq27546_props bq27541_props 633 #define bq27742_props bq27541_props 634 635 static enum power_supply_property bq27545_props[] = { 636 POWER_SUPPLY_PROP_STATUS, 637 POWER_SUPPLY_PROP_PRESENT, 638 POWER_SUPPLY_PROP_VOLTAGE_NOW, 639 POWER_SUPPLY_PROP_CURRENT_NOW, 640 POWER_SUPPLY_PROP_CAPACITY, 641 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 642 POWER_SUPPLY_PROP_TEMP, 643 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 644 POWER_SUPPLY_PROP_TECHNOLOGY, 645 POWER_SUPPLY_PROP_CHARGE_FULL, 646 POWER_SUPPLY_PROP_CHARGE_NOW, 647 POWER_SUPPLY_PROP_HEALTH, 648 POWER_SUPPLY_PROP_CYCLE_COUNT, 649 POWER_SUPPLY_PROP_POWER_AVG, 650 POWER_SUPPLY_PROP_MANUFACTURER, 651 }; 652 653 static enum power_supply_property bq27421_props[] = { 654 POWER_SUPPLY_PROP_STATUS, 655 POWER_SUPPLY_PROP_PRESENT, 656 POWER_SUPPLY_PROP_VOLTAGE_NOW, 657 POWER_SUPPLY_PROP_CURRENT_NOW, 658 POWER_SUPPLY_PROP_CAPACITY, 659 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 660 POWER_SUPPLY_PROP_TEMP, 661 POWER_SUPPLY_PROP_TECHNOLOGY, 662 POWER_SUPPLY_PROP_CHARGE_FULL, 663 POWER_SUPPLY_PROP_CHARGE_NOW, 664 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 665 POWER_SUPPLY_PROP_MANUFACTURER, 666 }; 667 #define bq27425_props bq27421_props 668 #define bq27426_props bq27421_props 669 #define bq27441_props bq27421_props 670 #define bq27621_props bq27421_props 671 672 struct bq27xxx_dm_reg { 673 u8 subclass_id; 674 u8 offset; 675 u8 bytes; 676 u16 min, max; 677 }; 678 679 enum bq27xxx_dm_reg_id { 680 BQ27XXX_DM_DESIGN_CAPACITY = 0, 681 BQ27XXX_DM_DESIGN_ENERGY, 682 BQ27XXX_DM_TERMINATE_VOLTAGE, 683 }; 684 685 #define bq27000_dm_regs 0 686 #define bq27010_dm_regs 0 687 #define bq2750x_dm_regs 0 688 #define bq2751x_dm_regs 0 689 #define bq2752x_dm_regs 0 690 691 #if 0 /* not yet tested */ 692 static struct bq27xxx_dm_reg bq27500_dm_regs[] = { 693 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 }, 694 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */ 695 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 }, 696 }; 697 #else 698 #define bq27500_dm_regs 0 699 #endif 700 701 /* todo create data memory definitions from datasheets and test on chips */ 702 #define bq27510g1_dm_regs 0 703 #define bq27510g2_dm_regs 0 704 #define bq27510g3_dm_regs 0 705 #define bq27520g1_dm_regs 0 706 #define bq27520g2_dm_regs 0 707 #define bq27520g3_dm_regs 0 708 #define bq27520g4_dm_regs 0 709 #define bq27521_dm_regs 0 710 #define bq27530_dm_regs 0 711 #define bq27531_dm_regs 0 712 #define bq27541_dm_regs 0 713 #define bq27542_dm_regs 0 714 #define bq27546_dm_regs 0 715 #define bq27742_dm_regs 0 716 717 #if 0 /* not yet tested */ 718 static struct bq27xxx_dm_reg bq27545_dm_regs[] = { 719 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 }, 720 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 }, 721 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 }, 722 }; 723 #else 724 #define bq27545_dm_regs 0 725 #endif 726 727 static struct bq27xxx_dm_reg bq27421_dm_regs[] = { 728 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 }, 729 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 }, 730 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 }, 731 }; 732 733 static struct bq27xxx_dm_reg bq27425_dm_regs[] = { 734 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 }, 735 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 }, 736 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 }, 737 }; 738 739 static struct bq27xxx_dm_reg bq27426_dm_regs[] = { 740 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 }, 741 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 }, 742 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 }, 743 }; 744 745 #if 0 /* not yet tested */ 746 #define bq27441_dm_regs bq27421_dm_regs 747 #else 748 #define bq27441_dm_regs 0 749 #endif 750 751 #if 0 /* not yet tested */ 752 static struct bq27xxx_dm_reg bq27621_dm_regs[] = { 753 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 }, 754 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 }, 755 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 }, 756 }; 757 #else 758 #define bq27621_dm_regs 0 759 #endif 760 761 #define BQ27XXX_O_ZERO 0x00000001 762 #define BQ27XXX_O_OTDC 0x00000002 /* has OTC/OTD overtemperature flags */ 763 #define BQ27XXX_O_UTOT 0x00000004 /* has OT overtemperature flag */ 764 #define BQ27XXX_O_CFGUP 0x00000008 765 #define BQ27XXX_O_RAM 0x00000010 766 767 #define BQ27XXX_DATA(ref, key, opt) { \ 768 .opts = (opt), \ 769 .unseal_key = key, \ 770 .regs = ref##_regs, \ 771 .dm_regs = ref##_dm_regs, \ 772 .props = ref##_props, \ 773 .props_size = ARRAY_SIZE(ref##_props) } 774 775 static struct { 776 u32 opts; 777 u32 unseal_key; 778 u8 *regs; 779 struct bq27xxx_dm_reg *dm_regs; 780 enum power_supply_property *props; 781 size_t props_size; 782 } bq27xxx_chip_data[] = { 783 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO), 784 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO), 785 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC), 786 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC), 787 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC), 788 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC), 789 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC), 790 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC), 791 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC), 792 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC), 793 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC), 794 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC), 795 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC), 796 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0), 797 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT), 798 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT), 799 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC), 800 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC), 801 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC), 802 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC), 803 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC), 804 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 805 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP), 806 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 807 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 808 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 809 }; 810 811 static DEFINE_MUTEX(bq27xxx_list_lock); 812 static LIST_HEAD(bq27xxx_battery_devices); 813 814 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500) 815 816 #define BQ27XXX_DM_SZ 32 817 818 /** 819 * struct bq27xxx_dm_buf - chip data memory buffer 820 * @class: data memory subclass_id 821 * @block: data memory block number 822 * @data: data from/for the block 823 * @has_data: true if data has been filled by read 824 * @dirty: true if data has changed since last read/write 825 * 826 * Encapsulates info required to manage chip data memory blocks. 827 */ 828 struct bq27xxx_dm_buf { 829 u8 class; 830 u8 block; 831 u8 data[BQ27XXX_DM_SZ]; 832 bool has_data, dirty; 833 }; 834 835 #define BQ27XXX_DM_BUF(di, i) { \ 836 .class = (di)->dm_regs[i].subclass_id, \ 837 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \ 838 } 839 840 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf, 841 struct bq27xxx_dm_reg *reg) 842 { 843 if (buf->class == reg->subclass_id && 844 buf->block == reg->offset / BQ27XXX_DM_SZ) 845 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ); 846 847 return NULL; 848 } 849 850 static const char * const bq27xxx_dm_reg_name[] = { 851 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity", 852 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy", 853 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage", 854 }; 855 856 857 static bool bq27xxx_dt_to_nvm = true; 858 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444); 859 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm, 860 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n" 861 "Users must set this =0 when installing a different type of battery!\n" 862 "Default is =1." 863 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 864 "\nSetting this affects future kernel updates, not the current configuration." 865 #endif 866 ); 867 868 static int poll_interval_param_set(const char *val, const struct kernel_param *kp) 869 { 870 struct bq27xxx_device_info *di; 871 unsigned int prev_val = *(unsigned int *) kp->arg; 872 int ret; 873 874 ret = param_set_uint(val, kp); 875 if (ret < 0 || prev_val == *(unsigned int *) kp->arg) 876 return ret; 877 878 mutex_lock(&bq27xxx_list_lock); 879 list_for_each_entry(di, &bq27xxx_battery_devices, list) { 880 cancel_delayed_work_sync(&di->work); 881 schedule_delayed_work(&di->work, 0); 882 } 883 mutex_unlock(&bq27xxx_list_lock); 884 885 return ret; 886 } 887 888 static const struct kernel_param_ops param_ops_poll_interval = { 889 .get = param_get_uint, 890 .set = poll_interval_param_set, 891 }; 892 893 static unsigned int poll_interval = 360; 894 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644); 895 MODULE_PARM_DESC(poll_interval, 896 "battery poll interval in seconds - 0 disables polling"); 897 898 /* 899 * Common code for BQ27xxx devices 900 */ 901 902 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index, 903 bool single) 904 { 905 int ret; 906 907 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 908 return -EINVAL; 909 910 ret = di->bus.read(di, di->regs[reg_index], single); 911 if (ret < 0) 912 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n", 913 di->regs[reg_index], reg_index); 914 915 return ret; 916 } 917 918 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index, 919 u16 value, bool single) 920 { 921 int ret; 922 923 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 924 return -EINVAL; 925 926 if (!di->bus.write) 927 return -EPERM; 928 929 ret = di->bus.write(di, di->regs[reg_index], value, single); 930 if (ret < 0) 931 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n", 932 di->regs[reg_index], reg_index); 933 934 return ret; 935 } 936 937 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index, 938 u8 *data, int len) 939 { 940 int ret; 941 942 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 943 return -EINVAL; 944 945 if (!di->bus.read_bulk) 946 return -EPERM; 947 948 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len); 949 if (ret < 0) 950 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n", 951 di->regs[reg_index], reg_index); 952 953 return ret; 954 } 955 956 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index, 957 u8 *data, int len) 958 { 959 int ret; 960 961 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 962 return -EINVAL; 963 964 if (!di->bus.write_bulk) 965 return -EPERM; 966 967 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len); 968 if (ret < 0) 969 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n", 970 di->regs[reg_index], reg_index); 971 972 return ret; 973 } 974 975 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di) 976 { 977 int ret; 978 979 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false); 980 if (ret < 0) { 981 dev_err(di->dev, "bus error on seal: %d\n", ret); 982 return ret; 983 } 984 985 return 0; 986 } 987 988 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di) 989 { 990 int ret; 991 992 if (di->unseal_key == 0) { 993 dev_err(di->dev, "unseal failed due to missing key\n"); 994 return -EINVAL; 995 } 996 997 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false); 998 if (ret < 0) 999 goto out; 1000 1001 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false); 1002 if (ret < 0) 1003 goto out; 1004 1005 return 0; 1006 1007 out: 1008 dev_err(di->dev, "bus error on unseal: %d\n", ret); 1009 return ret; 1010 } 1011 1012 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf) 1013 { 1014 u16 sum = 0; 1015 int i; 1016 1017 for (i = 0; i < BQ27XXX_DM_SZ; i++) 1018 sum += buf->data[i]; 1019 sum &= 0xff; 1020 1021 return 0xff - sum; 1022 } 1023 1024 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di, 1025 struct bq27xxx_dm_buf *buf) 1026 { 1027 int ret; 1028 1029 buf->has_data = false; 1030 1031 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1032 if (ret < 0) 1033 goto out; 1034 1035 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1036 if (ret < 0) 1037 goto out; 1038 1039 BQ27XXX_MSLEEP(1); 1040 1041 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1042 if (ret < 0) 1043 goto out; 1044 1045 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true); 1046 if (ret < 0) 1047 goto out; 1048 1049 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) { 1050 ret = -EINVAL; 1051 goto out; 1052 } 1053 1054 buf->has_data = true; 1055 buf->dirty = false; 1056 1057 return 0; 1058 1059 out: 1060 dev_err(di->dev, "bus error reading chip memory: %d\n", ret); 1061 return ret; 1062 } 1063 1064 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di, 1065 struct bq27xxx_dm_buf *buf, 1066 enum bq27xxx_dm_reg_id reg_id, 1067 unsigned int val) 1068 { 1069 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id]; 1070 const char *str = bq27xxx_dm_reg_name[reg_id]; 1071 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg); 1072 1073 if (prev == NULL) { 1074 dev_warn(di->dev, "buffer does not match %s dm spec\n", str); 1075 return; 1076 } 1077 1078 if (reg->bytes != 2) { 1079 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str); 1080 return; 1081 } 1082 1083 if (!buf->has_data) 1084 return; 1085 1086 if (be16_to_cpup(prev) == val) { 1087 dev_info(di->dev, "%s has %u\n", str, val); 1088 return; 1089 } 1090 1091 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1092 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) { 1093 #else 1094 if (!(di->opts & BQ27XXX_O_RAM)) { 1095 #endif 1096 /* devicetree and NVM differ; defer to NVM */ 1097 dev_warn(di->dev, "%s has %u; update to %u disallowed " 1098 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1099 "by dt_monitored_battery_updates_nvm=0" 1100 #else 1101 "for flash/NVM data memory" 1102 #endif 1103 "\n", str, be16_to_cpup(prev), val); 1104 return; 1105 } 1106 1107 dev_info(di->dev, "update %s to %u\n", str, val); 1108 1109 *prev = cpu_to_be16(val); 1110 buf->dirty = true; 1111 } 1112 1113 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active) 1114 { 1115 const int limit = 100; 1116 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET; 1117 int ret, try = limit; 1118 1119 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false); 1120 if (ret < 0) 1121 return ret; 1122 1123 do { 1124 BQ27XXX_MSLEEP(25); 1125 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false); 1126 if (ret < 0) 1127 return ret; 1128 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try); 1129 1130 if (!try && di->chip != BQ27425) { // 425 has a bug 1131 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active); 1132 return -EINVAL; 1133 } 1134 1135 if (limit - try > 3) 1136 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try); 1137 1138 return 0; 1139 } 1140 1141 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di) 1142 { 1143 int ret = bq27xxx_battery_cfgupdate_priv(di, true); 1144 if (ret < 0 && ret != -EINVAL) 1145 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret); 1146 1147 return ret; 1148 } 1149 1150 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di) 1151 { 1152 int ret = bq27xxx_battery_cfgupdate_priv(di, false); 1153 if (ret < 0 && ret != -EINVAL) 1154 dev_err(di->dev, "bus error on soft_reset: %d\n", ret); 1155 1156 return ret; 1157 } 1158 1159 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di, 1160 struct bq27xxx_dm_buf *buf) 1161 { 1162 bool cfgup = di->opts & BQ27XXX_O_CFGUP; 1163 int ret; 1164 1165 if (!buf->dirty) 1166 return 0; 1167 1168 if (cfgup) { 1169 ret = bq27xxx_battery_set_cfgupdate(di); 1170 if (ret < 0) 1171 return ret; 1172 } 1173 1174 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true); 1175 if (ret < 0) 1176 goto out; 1177 1178 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1179 if (ret < 0) 1180 goto out; 1181 1182 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1183 if (ret < 0) 1184 goto out; 1185 1186 BQ27XXX_MSLEEP(1); 1187 1188 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1189 if (ret < 0) 1190 goto out; 1191 1192 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM, 1193 bq27xxx_battery_checksum_dm_block(buf), true); 1194 if (ret < 0) 1195 goto out; 1196 1197 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM 1198 * corruption on the '425 chip (and perhaps others), which can damage 1199 * the chip. 1200 */ 1201 1202 if (cfgup) { 1203 BQ27XXX_MSLEEP(1); 1204 ret = bq27xxx_battery_soft_reset(di); 1205 if (ret < 0) 1206 return ret; 1207 } else { 1208 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */ 1209 } 1210 1211 buf->dirty = false; 1212 1213 return 0; 1214 1215 out: 1216 if (cfgup) 1217 bq27xxx_battery_soft_reset(di); 1218 1219 dev_err(di->dev, "bus error writing chip memory: %d\n", ret); 1220 return ret; 1221 } 1222 1223 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di, 1224 struct power_supply_battery_info *info) 1225 { 1226 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY); 1227 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE); 1228 bool updated; 1229 1230 if (bq27xxx_battery_unseal(di) < 0) 1231 return; 1232 1233 if (info->charge_full_design_uah != -EINVAL && 1234 info->energy_full_design_uwh != -EINVAL) { 1235 bq27xxx_battery_read_dm_block(di, &bd); 1236 /* assume design energy & capacity are in same block */ 1237 bq27xxx_battery_update_dm_block(di, &bd, 1238 BQ27XXX_DM_DESIGN_CAPACITY, 1239 info->charge_full_design_uah / 1000); 1240 bq27xxx_battery_update_dm_block(di, &bd, 1241 BQ27XXX_DM_DESIGN_ENERGY, 1242 info->energy_full_design_uwh / 1000); 1243 } 1244 1245 if (info->voltage_min_design_uv != -EINVAL) { 1246 bool same = bd.class == bt.class && bd.block == bt.block; 1247 if (!same) 1248 bq27xxx_battery_read_dm_block(di, &bt); 1249 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt, 1250 BQ27XXX_DM_TERMINATE_VOLTAGE, 1251 info->voltage_min_design_uv / 1000); 1252 } 1253 1254 updated = bd.dirty || bt.dirty; 1255 1256 bq27xxx_battery_write_dm_block(di, &bd); 1257 bq27xxx_battery_write_dm_block(di, &bt); 1258 1259 bq27xxx_battery_seal(di); 1260 1261 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) { 1262 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false); 1263 BQ27XXX_MSLEEP(300); /* reset time is not documented */ 1264 } 1265 /* assume bq27xxx_battery_update() is called hereafter */ 1266 } 1267 1268 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di) 1269 { 1270 struct power_supply_battery_info info = {}; 1271 unsigned int min, max; 1272 1273 if (power_supply_get_battery_info(di->bat, &info) < 0) 1274 return; 1275 1276 if (!di->dm_regs) { 1277 dev_warn(di->dev, "data memory update not supported for chip\n"); 1278 return; 1279 } 1280 1281 if (info.energy_full_design_uwh != info.charge_full_design_uah) { 1282 if (info.energy_full_design_uwh == -EINVAL) 1283 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n"); 1284 else if (info.charge_full_design_uah == -EINVAL) 1285 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n"); 1286 } 1287 1288 /* assume min == 0 */ 1289 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max; 1290 if (info.energy_full_design_uwh > max * 1000) { 1291 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n", 1292 info.energy_full_design_uwh); 1293 info.energy_full_design_uwh = -EINVAL; 1294 } 1295 1296 /* assume min == 0 */ 1297 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max; 1298 if (info.charge_full_design_uah > max * 1000) { 1299 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n", 1300 info.charge_full_design_uah); 1301 info.charge_full_design_uah = -EINVAL; 1302 } 1303 1304 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min; 1305 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max; 1306 if ((info.voltage_min_design_uv < min * 1000 || 1307 info.voltage_min_design_uv > max * 1000) && 1308 info.voltage_min_design_uv != -EINVAL) { 1309 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n", 1310 info.voltage_min_design_uv); 1311 info.voltage_min_design_uv = -EINVAL; 1312 } 1313 1314 if ((info.energy_full_design_uwh != -EINVAL && 1315 info.charge_full_design_uah != -EINVAL) || 1316 info.voltage_min_design_uv != -EINVAL) 1317 bq27xxx_battery_set_config(di, &info); 1318 } 1319 1320 /* 1321 * Return the battery State-of-Charge 1322 * Or < 0 if something fails. 1323 */ 1324 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di) 1325 { 1326 int soc; 1327 1328 if (di->opts & BQ27XXX_O_ZERO) 1329 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true); 1330 else 1331 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false); 1332 1333 if (soc < 0) 1334 dev_dbg(di->dev, "error reading State-of-Charge\n"); 1335 1336 return soc; 1337 } 1338 1339 /* 1340 * Return a battery charge value in µAh 1341 * Or < 0 if something fails. 1342 */ 1343 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg) 1344 { 1345 int charge; 1346 1347 charge = bq27xxx_read(di, reg, false); 1348 if (charge < 0) { 1349 dev_dbg(di->dev, "error reading charge register %02x: %d\n", 1350 reg, charge); 1351 return charge; 1352 } 1353 1354 if (di->opts & BQ27XXX_O_ZERO) 1355 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1356 else 1357 charge *= 1000; 1358 1359 return charge; 1360 } 1361 1362 /* 1363 * Return the battery Nominal available capacity in µAh 1364 * Or < 0 if something fails. 1365 */ 1366 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di) 1367 { 1368 int flags; 1369 1370 if (di->opts & BQ27XXX_O_ZERO) { 1371 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true); 1372 if (flags >= 0 && (flags & BQ27000_FLAG_CI)) 1373 return -ENODATA; 1374 } 1375 1376 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC); 1377 } 1378 1379 /* 1380 * Return the battery Full Charge Capacity in µAh 1381 * Or < 0 if something fails. 1382 */ 1383 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di) 1384 { 1385 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC); 1386 } 1387 1388 /* 1389 * Return the Design Capacity in µAh 1390 * Or < 0 if something fails. 1391 */ 1392 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di) 1393 { 1394 int dcap; 1395 1396 if (di->opts & BQ27XXX_O_ZERO) 1397 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true); 1398 else 1399 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false); 1400 1401 if (dcap < 0) { 1402 dev_dbg(di->dev, "error reading initial last measured discharge\n"); 1403 return dcap; 1404 } 1405 1406 if (di->opts & BQ27XXX_O_ZERO) 1407 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1408 else 1409 dcap *= 1000; 1410 1411 return dcap; 1412 } 1413 1414 /* 1415 * Return the battery Available energy in µWh 1416 * Or < 0 if something fails. 1417 */ 1418 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di) 1419 { 1420 int ae; 1421 1422 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false); 1423 if (ae < 0) { 1424 dev_dbg(di->dev, "error reading available energy\n"); 1425 return ae; 1426 } 1427 1428 if (di->opts & BQ27XXX_O_ZERO) 1429 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS; 1430 else 1431 ae *= 1000; 1432 1433 return ae; 1434 } 1435 1436 /* 1437 * Return the battery temperature in tenths of degree Kelvin 1438 * Or < 0 if something fails. 1439 */ 1440 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di) 1441 { 1442 int temp; 1443 1444 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false); 1445 if (temp < 0) { 1446 dev_err(di->dev, "error reading temperature\n"); 1447 return temp; 1448 } 1449 1450 if (di->opts & BQ27XXX_O_ZERO) 1451 temp = 5 * temp / 2; 1452 1453 return temp; 1454 } 1455 1456 /* 1457 * Return the battery Cycle count total 1458 * Or < 0 if something fails. 1459 */ 1460 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di) 1461 { 1462 int cyct; 1463 1464 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false); 1465 if (cyct < 0) 1466 dev_err(di->dev, "error reading cycle count total\n"); 1467 1468 return cyct; 1469 } 1470 1471 /* 1472 * Read a time register. 1473 * Return < 0 if something fails. 1474 */ 1475 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg) 1476 { 1477 int tval; 1478 1479 tval = bq27xxx_read(di, reg, false); 1480 if (tval < 0) { 1481 dev_dbg(di->dev, "error reading time register %02x: %d\n", 1482 reg, tval); 1483 return tval; 1484 } 1485 1486 if (tval == 65535) 1487 return -ENODATA; 1488 1489 return tval * 60; 1490 } 1491 1492 /* 1493 * Read an average power register. 1494 * Return < 0 if something fails. 1495 */ 1496 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di) 1497 { 1498 int tval; 1499 1500 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false); 1501 if (tval < 0) { 1502 dev_err(di->dev, "error reading average power register %02x: %d\n", 1503 BQ27XXX_REG_AP, tval); 1504 return tval; 1505 } 1506 1507 if (di->opts & BQ27XXX_O_ZERO) 1508 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS; 1509 else 1510 return tval; 1511 } 1512 1513 /* 1514 * Returns true if a battery over temperature condition is detected 1515 */ 1516 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags) 1517 { 1518 if (di->opts & BQ27XXX_O_OTDC) 1519 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD); 1520 if (di->opts & BQ27XXX_O_UTOT) 1521 return flags & BQ27XXX_FLAG_OT; 1522 1523 return false; 1524 } 1525 1526 /* 1527 * Returns true if a battery under temperature condition is detected 1528 */ 1529 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags) 1530 { 1531 if (di->opts & BQ27XXX_O_UTOT) 1532 return flags & BQ27XXX_FLAG_UT; 1533 1534 return false; 1535 } 1536 1537 /* 1538 * Returns true if a low state of charge condition is detected 1539 */ 1540 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags) 1541 { 1542 if (di->opts & BQ27XXX_O_ZERO) 1543 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF); 1544 else 1545 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF); 1546 } 1547 1548 /* 1549 * Read flag register. 1550 * Return < 0 if something fails. 1551 */ 1552 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di) 1553 { 1554 int flags; 1555 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO; 1556 1557 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag); 1558 if (flags < 0) { 1559 dev_err(di->dev, "error reading flag register:%d\n", flags); 1560 return flags; 1561 } 1562 1563 /* Unlikely but important to return first */ 1564 if (unlikely(bq27xxx_battery_overtemp(di, flags))) 1565 return POWER_SUPPLY_HEALTH_OVERHEAT; 1566 if (unlikely(bq27xxx_battery_undertemp(di, flags))) 1567 return POWER_SUPPLY_HEALTH_COLD; 1568 if (unlikely(bq27xxx_battery_dead(di, flags))) 1569 return POWER_SUPPLY_HEALTH_DEAD; 1570 1571 return POWER_SUPPLY_HEALTH_GOOD; 1572 } 1573 1574 void bq27xxx_battery_update(struct bq27xxx_device_info *di) 1575 { 1576 struct bq27xxx_reg_cache cache = {0, }; 1577 bool has_ci_flag = di->opts & BQ27XXX_O_ZERO; 1578 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO; 1579 1580 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag); 1581 if ((cache.flags & 0xff) == 0xff) 1582 cache.flags = -1; /* read error */ 1583 if (cache.flags >= 0) { 1584 cache.temperature = bq27xxx_battery_read_temperature(di); 1585 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) { 1586 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n"); 1587 cache.capacity = -ENODATA; 1588 cache.energy = -ENODATA; 1589 cache.time_to_empty = -ENODATA; 1590 cache.time_to_empty_avg = -ENODATA; 1591 cache.time_to_full = -ENODATA; 1592 cache.charge_full = -ENODATA; 1593 cache.health = -ENODATA; 1594 } else { 1595 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR) 1596 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE); 1597 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR) 1598 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP); 1599 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR) 1600 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF); 1601 cache.charge_full = bq27xxx_battery_read_fcc(di); 1602 cache.capacity = bq27xxx_battery_read_soc(di); 1603 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR) 1604 cache.energy = bq27xxx_battery_read_energy(di); 1605 cache.health = bq27xxx_battery_read_health(di); 1606 } 1607 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR) 1608 cache.cycle_count = bq27xxx_battery_read_cyct(di); 1609 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR) 1610 cache.power_avg = bq27xxx_battery_read_pwr_avg(di); 1611 1612 /* We only have to read charge design full once */ 1613 if (di->charge_design_full <= 0) 1614 di->charge_design_full = bq27xxx_battery_read_dcap(di); 1615 } 1616 1617 if (di->cache.capacity != cache.capacity) 1618 power_supply_changed(di->bat); 1619 1620 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0) 1621 di->cache = cache; 1622 1623 di->last_update = jiffies; 1624 } 1625 EXPORT_SYMBOL_GPL(bq27xxx_battery_update); 1626 1627 static void bq27xxx_battery_poll(struct work_struct *work) 1628 { 1629 struct bq27xxx_device_info *di = 1630 container_of(work, struct bq27xxx_device_info, 1631 work.work); 1632 1633 bq27xxx_battery_update(di); 1634 1635 if (poll_interval > 0) 1636 schedule_delayed_work(&di->work, poll_interval * HZ); 1637 } 1638 1639 /* 1640 * Return the battery average current in µA 1641 * Note that current can be negative signed as well 1642 * Or 0 if something fails. 1643 */ 1644 static int bq27xxx_battery_current(struct bq27xxx_device_info *di, 1645 union power_supply_propval *val) 1646 { 1647 int curr; 1648 int flags; 1649 1650 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false); 1651 if (curr < 0) { 1652 dev_err(di->dev, "error reading current\n"); 1653 return curr; 1654 } 1655 1656 if (di->opts & BQ27XXX_O_ZERO) { 1657 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true); 1658 if (flags & BQ27000_FLAG_CHGS) { 1659 dev_dbg(di->dev, "negative current!\n"); 1660 curr = -curr; 1661 } 1662 1663 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1664 } else { 1665 /* Other gauges return signed value */ 1666 val->intval = (int)((s16)curr) * 1000; 1667 } 1668 1669 return 0; 1670 } 1671 1672 static int bq27xxx_battery_status(struct bq27xxx_device_info *di, 1673 union power_supply_propval *val) 1674 { 1675 int status; 1676 1677 if (di->opts & BQ27XXX_O_ZERO) { 1678 if (di->cache.flags & BQ27000_FLAG_FC) 1679 status = POWER_SUPPLY_STATUS_FULL; 1680 else if (di->cache.flags & BQ27000_FLAG_CHGS) 1681 status = POWER_SUPPLY_STATUS_CHARGING; 1682 else if (power_supply_am_i_supplied(di->bat) > 0) 1683 status = POWER_SUPPLY_STATUS_NOT_CHARGING; 1684 else 1685 status = POWER_SUPPLY_STATUS_DISCHARGING; 1686 } else { 1687 if (di->cache.flags & BQ27XXX_FLAG_FC) 1688 status = POWER_SUPPLY_STATUS_FULL; 1689 else if (di->cache.flags & BQ27XXX_FLAG_DSC) 1690 status = POWER_SUPPLY_STATUS_DISCHARGING; 1691 else 1692 status = POWER_SUPPLY_STATUS_CHARGING; 1693 } 1694 1695 val->intval = status; 1696 1697 return 0; 1698 } 1699 1700 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di, 1701 union power_supply_propval *val) 1702 { 1703 int level; 1704 1705 if (di->opts & BQ27XXX_O_ZERO) { 1706 if (di->cache.flags & BQ27000_FLAG_FC) 1707 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 1708 else if (di->cache.flags & BQ27000_FLAG_EDV1) 1709 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 1710 else if (di->cache.flags & BQ27000_FLAG_EDVF) 1711 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 1712 else 1713 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 1714 } else { 1715 if (di->cache.flags & BQ27XXX_FLAG_FC) 1716 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 1717 else if (di->cache.flags & BQ27XXX_FLAG_SOC1) 1718 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 1719 else if (di->cache.flags & BQ27XXX_FLAG_SOCF) 1720 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 1721 else 1722 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 1723 } 1724 1725 val->intval = level; 1726 1727 return 0; 1728 } 1729 1730 /* 1731 * Return the battery Voltage in millivolts 1732 * Or < 0 if something fails. 1733 */ 1734 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di, 1735 union power_supply_propval *val) 1736 { 1737 int volt; 1738 1739 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false); 1740 if (volt < 0) { 1741 dev_err(di->dev, "error reading voltage\n"); 1742 return volt; 1743 } 1744 1745 val->intval = volt * 1000; 1746 1747 return 0; 1748 } 1749 1750 static int bq27xxx_simple_value(int value, 1751 union power_supply_propval *val) 1752 { 1753 if (value < 0) 1754 return value; 1755 1756 val->intval = value; 1757 1758 return 0; 1759 } 1760 1761 static int bq27xxx_battery_get_property(struct power_supply *psy, 1762 enum power_supply_property psp, 1763 union power_supply_propval *val) 1764 { 1765 int ret = 0; 1766 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 1767 1768 mutex_lock(&di->lock); 1769 if (time_is_before_jiffies(di->last_update + 5 * HZ)) { 1770 cancel_delayed_work_sync(&di->work); 1771 bq27xxx_battery_poll(&di->work.work); 1772 } 1773 mutex_unlock(&di->lock); 1774 1775 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0) 1776 return -ENODEV; 1777 1778 switch (psp) { 1779 case POWER_SUPPLY_PROP_STATUS: 1780 ret = bq27xxx_battery_status(di, val); 1781 break; 1782 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 1783 ret = bq27xxx_battery_voltage(di, val); 1784 break; 1785 case POWER_SUPPLY_PROP_PRESENT: 1786 val->intval = di->cache.flags < 0 ? 0 : 1; 1787 break; 1788 case POWER_SUPPLY_PROP_CURRENT_NOW: 1789 ret = bq27xxx_battery_current(di, val); 1790 break; 1791 case POWER_SUPPLY_PROP_CAPACITY: 1792 ret = bq27xxx_simple_value(di->cache.capacity, val); 1793 break; 1794 case POWER_SUPPLY_PROP_CAPACITY_LEVEL: 1795 ret = bq27xxx_battery_capacity_level(di, val); 1796 break; 1797 case POWER_SUPPLY_PROP_TEMP: 1798 ret = bq27xxx_simple_value(di->cache.temperature, val); 1799 if (ret == 0) 1800 val->intval -= 2731; /* convert decidegree k to c */ 1801 break; 1802 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: 1803 ret = bq27xxx_simple_value(di->cache.time_to_empty, val); 1804 break; 1805 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG: 1806 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val); 1807 break; 1808 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW: 1809 ret = bq27xxx_simple_value(di->cache.time_to_full, val); 1810 break; 1811 case POWER_SUPPLY_PROP_TECHNOLOGY: 1812 val->intval = POWER_SUPPLY_TECHNOLOGY_LION; 1813 break; 1814 case POWER_SUPPLY_PROP_CHARGE_NOW: 1815 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val); 1816 break; 1817 case POWER_SUPPLY_PROP_CHARGE_FULL: 1818 ret = bq27xxx_simple_value(di->cache.charge_full, val); 1819 break; 1820 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: 1821 ret = bq27xxx_simple_value(di->charge_design_full, val); 1822 break; 1823 /* 1824 * TODO: Implement these to make registers set from 1825 * power_supply_battery_info visible in sysfs. 1826 */ 1827 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN: 1828 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: 1829 return -EINVAL; 1830 case POWER_SUPPLY_PROP_CYCLE_COUNT: 1831 ret = bq27xxx_simple_value(di->cache.cycle_count, val); 1832 break; 1833 case POWER_SUPPLY_PROP_ENERGY_NOW: 1834 ret = bq27xxx_simple_value(di->cache.energy, val); 1835 break; 1836 case POWER_SUPPLY_PROP_POWER_AVG: 1837 ret = bq27xxx_simple_value(di->cache.power_avg, val); 1838 break; 1839 case POWER_SUPPLY_PROP_HEALTH: 1840 ret = bq27xxx_simple_value(di->cache.health, val); 1841 break; 1842 case POWER_SUPPLY_PROP_MANUFACTURER: 1843 val->strval = BQ27XXX_MANUFACTURER; 1844 break; 1845 default: 1846 return -EINVAL; 1847 } 1848 1849 return ret; 1850 } 1851 1852 static void bq27xxx_external_power_changed(struct power_supply *psy) 1853 { 1854 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 1855 1856 cancel_delayed_work_sync(&di->work); 1857 schedule_delayed_work(&di->work, 0); 1858 } 1859 1860 int bq27xxx_battery_setup(struct bq27xxx_device_info *di) 1861 { 1862 struct power_supply_desc *psy_desc; 1863 struct power_supply_config psy_cfg = { 1864 .of_node = di->dev->of_node, 1865 .drv_data = di, 1866 }; 1867 1868 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll); 1869 mutex_init(&di->lock); 1870 1871 di->regs = bq27xxx_chip_data[di->chip].regs; 1872 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key; 1873 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs; 1874 di->opts = bq27xxx_chip_data[di->chip].opts; 1875 1876 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL); 1877 if (!psy_desc) 1878 return -ENOMEM; 1879 1880 psy_desc->name = di->name; 1881 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY; 1882 psy_desc->properties = bq27xxx_chip_data[di->chip].props; 1883 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size; 1884 psy_desc->get_property = bq27xxx_battery_get_property; 1885 psy_desc->external_power_changed = bq27xxx_external_power_changed; 1886 1887 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg); 1888 if (IS_ERR(di->bat)) { 1889 dev_err(di->dev, "failed to register battery\n"); 1890 return PTR_ERR(di->bat); 1891 } 1892 1893 bq27xxx_battery_settings(di); 1894 bq27xxx_battery_update(di); 1895 1896 mutex_lock(&bq27xxx_list_lock); 1897 list_add(&di->list, &bq27xxx_battery_devices); 1898 mutex_unlock(&bq27xxx_list_lock); 1899 1900 return 0; 1901 } 1902 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup); 1903 1904 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di) 1905 { 1906 /* 1907 * power_supply_unregister call bq27xxx_battery_get_property which 1908 * call bq27xxx_battery_poll. 1909 * Make sure that bq27xxx_battery_poll will not call 1910 * schedule_delayed_work again after unregister (which cause OOPS). 1911 */ 1912 poll_interval = 0; 1913 1914 cancel_delayed_work_sync(&di->work); 1915 1916 power_supply_unregister(di->bat); 1917 1918 mutex_lock(&bq27xxx_list_lock); 1919 list_del(&di->list); 1920 mutex_unlock(&bq27xxx_list_lock); 1921 1922 mutex_destroy(&di->lock); 1923 } 1924 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown); 1925 1926 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); 1927 MODULE_DESCRIPTION("BQ27xxx battery monitor driver"); 1928 MODULE_LICENSE("GPL"); 1929