1 /* 2 * BQ27xxx battery driver 3 * 4 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it> 5 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it> 6 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de> 7 * Copyright (C) 2011 Pali Rohár <pali.rohar@gmail.com> 8 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net> 9 * 10 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc. 11 * 12 * This package is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 19 * 20 * Datasheets: 21 * http://www.ti.com/product/bq27000 22 * http://www.ti.com/product/bq27200 23 * http://www.ti.com/product/bq27010 24 * http://www.ti.com/product/bq27210 25 * http://www.ti.com/product/bq27500 26 * http://www.ti.com/product/bq27510-g1 27 * http://www.ti.com/product/bq27510-g2 28 * http://www.ti.com/product/bq27510-g3 29 * http://www.ti.com/product/bq27520-g4 30 * http://www.ti.com/product/bq27520-g1 31 * http://www.ti.com/product/bq27520-g2 32 * http://www.ti.com/product/bq27520-g3 33 * http://www.ti.com/product/bq27520-g4 34 * http://www.ti.com/product/bq27530-g1 35 * http://www.ti.com/product/bq27531-g1 36 * http://www.ti.com/product/bq27541-g1 37 * http://www.ti.com/product/bq27542-g1 38 * http://www.ti.com/product/bq27546-g1 39 * http://www.ti.com/product/bq27742-g1 40 * http://www.ti.com/product/bq27545-g1 41 * http://www.ti.com/product/bq27421-g1 42 * http://www.ti.com/product/bq27425-g1 43 * http://www.ti.com/product/bq27411-g1 44 * http://www.ti.com/product/bq27621-g1 45 */ 46 47 #include <linux/device.h> 48 #include <linux/module.h> 49 #include <linux/mutex.h> 50 #include <linux/param.h> 51 #include <linux/jiffies.h> 52 #include <linux/workqueue.h> 53 #include <linux/delay.h> 54 #include <linux/platform_device.h> 55 #include <linux/power_supply.h> 56 #include <linux/slab.h> 57 #include <linux/of.h> 58 59 #include <linux/power/bq27xxx_battery.h> 60 61 #define BQ27XXX_MANUFACTURER "Texas Instruments" 62 63 /* BQ27XXX Flags */ 64 #define BQ27XXX_FLAG_DSC BIT(0) 65 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */ 66 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */ 67 #define BQ27XXX_FLAG_CFGUP BIT(4) 68 #define BQ27XXX_FLAG_FC BIT(9) 69 #define BQ27XXX_FLAG_OTD BIT(14) 70 #define BQ27XXX_FLAG_OTC BIT(15) 71 #define BQ27XXX_FLAG_UT BIT(14) 72 #define BQ27XXX_FLAG_OT BIT(15) 73 74 /* BQ27000 has different layout for Flags register */ 75 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */ 76 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */ 77 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */ 78 #define BQ27000_FLAG_FC BIT(5) 79 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */ 80 81 /* control register params */ 82 #define BQ27XXX_SEALED 0x20 83 #define BQ27XXX_SET_CFGUPDATE 0x13 84 #define BQ27XXX_SOFT_RESET 0x42 85 #define BQ27XXX_RESET 0x41 86 87 #define BQ27XXX_RS (20) /* Resistor sense mOhm */ 88 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */ 89 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */ 90 91 #define INVALID_REG_ADDR 0xff 92 93 /* 94 * bq27xxx_reg_index - Register names 95 * 96 * These are indexes into a device's register mapping array. 97 */ 98 99 enum bq27xxx_reg_index { 100 BQ27XXX_REG_CTRL = 0, /* Control */ 101 BQ27XXX_REG_TEMP, /* Temperature */ 102 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */ 103 BQ27XXX_REG_VOLT, /* Voltage */ 104 BQ27XXX_REG_AI, /* Average Current */ 105 BQ27XXX_REG_FLAGS, /* Flags */ 106 BQ27XXX_REG_TTE, /* Time-to-Empty */ 107 BQ27XXX_REG_TTF, /* Time-to-Full */ 108 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */ 109 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */ 110 BQ27XXX_REG_NAC, /* Nominal Available Capacity */ 111 BQ27XXX_REG_FCC, /* Full Charge Capacity */ 112 BQ27XXX_REG_CYCT, /* Cycle Count */ 113 BQ27XXX_REG_AE, /* Available Energy */ 114 BQ27XXX_REG_SOC, /* State-of-Charge */ 115 BQ27XXX_REG_DCAP, /* Design Capacity */ 116 BQ27XXX_REG_AP, /* Average Power */ 117 BQ27XXX_DM_CTRL, /* Block Data Control */ 118 BQ27XXX_DM_CLASS, /* Data Class */ 119 BQ27XXX_DM_BLOCK, /* Data Block */ 120 BQ27XXX_DM_DATA, /* Block Data */ 121 BQ27XXX_DM_CKSUM, /* Block Data Checksum */ 122 BQ27XXX_REG_MAX, /* sentinel */ 123 }; 124 125 #define BQ27XXX_DM_REG_ROWS \ 126 [BQ27XXX_DM_CTRL] = 0x61, \ 127 [BQ27XXX_DM_CLASS] = 0x3e, \ 128 [BQ27XXX_DM_BLOCK] = 0x3f, \ 129 [BQ27XXX_DM_DATA] = 0x40, \ 130 [BQ27XXX_DM_CKSUM] = 0x60 131 132 /* Register mappings */ 133 static u8 134 bq27000_regs[BQ27XXX_REG_MAX] = { 135 [BQ27XXX_REG_CTRL] = 0x00, 136 [BQ27XXX_REG_TEMP] = 0x06, 137 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 138 [BQ27XXX_REG_VOLT] = 0x08, 139 [BQ27XXX_REG_AI] = 0x14, 140 [BQ27XXX_REG_FLAGS] = 0x0a, 141 [BQ27XXX_REG_TTE] = 0x16, 142 [BQ27XXX_REG_TTF] = 0x18, 143 [BQ27XXX_REG_TTES] = 0x1c, 144 [BQ27XXX_REG_TTECP] = 0x26, 145 [BQ27XXX_REG_NAC] = 0x0c, 146 [BQ27XXX_REG_FCC] = 0x12, 147 [BQ27XXX_REG_CYCT] = 0x2a, 148 [BQ27XXX_REG_AE] = 0x22, 149 [BQ27XXX_REG_SOC] = 0x0b, 150 [BQ27XXX_REG_DCAP] = 0x76, 151 [BQ27XXX_REG_AP] = 0x24, 152 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 153 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 154 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 155 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 156 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 157 }, 158 bq27010_regs[BQ27XXX_REG_MAX] = { 159 [BQ27XXX_REG_CTRL] = 0x00, 160 [BQ27XXX_REG_TEMP] = 0x06, 161 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 162 [BQ27XXX_REG_VOLT] = 0x08, 163 [BQ27XXX_REG_AI] = 0x14, 164 [BQ27XXX_REG_FLAGS] = 0x0a, 165 [BQ27XXX_REG_TTE] = 0x16, 166 [BQ27XXX_REG_TTF] = 0x18, 167 [BQ27XXX_REG_TTES] = 0x1c, 168 [BQ27XXX_REG_TTECP] = 0x26, 169 [BQ27XXX_REG_NAC] = 0x0c, 170 [BQ27XXX_REG_FCC] = 0x12, 171 [BQ27XXX_REG_CYCT] = 0x2a, 172 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 173 [BQ27XXX_REG_SOC] = 0x0b, 174 [BQ27XXX_REG_DCAP] = 0x76, 175 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 176 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 177 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 178 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 179 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 180 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 181 }, 182 bq2750x_regs[BQ27XXX_REG_MAX] = { 183 [BQ27XXX_REG_CTRL] = 0x00, 184 [BQ27XXX_REG_TEMP] = 0x06, 185 [BQ27XXX_REG_INT_TEMP] = 0x28, 186 [BQ27XXX_REG_VOLT] = 0x08, 187 [BQ27XXX_REG_AI] = 0x14, 188 [BQ27XXX_REG_FLAGS] = 0x0a, 189 [BQ27XXX_REG_TTE] = 0x16, 190 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 191 [BQ27XXX_REG_TTES] = 0x1a, 192 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 193 [BQ27XXX_REG_NAC] = 0x0c, 194 [BQ27XXX_REG_FCC] = 0x12, 195 [BQ27XXX_REG_CYCT] = 0x2a, 196 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 197 [BQ27XXX_REG_SOC] = 0x2c, 198 [BQ27XXX_REG_DCAP] = 0x3c, 199 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 200 BQ27XXX_DM_REG_ROWS, 201 }, 202 #define bq2751x_regs bq27510g3_regs 203 #define bq2752x_regs bq27510g3_regs 204 bq27500_regs[BQ27XXX_REG_MAX] = { 205 [BQ27XXX_REG_CTRL] = 0x00, 206 [BQ27XXX_REG_TEMP] = 0x06, 207 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 208 [BQ27XXX_REG_VOLT] = 0x08, 209 [BQ27XXX_REG_AI] = 0x14, 210 [BQ27XXX_REG_FLAGS] = 0x0a, 211 [BQ27XXX_REG_TTE] = 0x16, 212 [BQ27XXX_REG_TTF] = 0x18, 213 [BQ27XXX_REG_TTES] = 0x1c, 214 [BQ27XXX_REG_TTECP] = 0x26, 215 [BQ27XXX_REG_NAC] = 0x0c, 216 [BQ27XXX_REG_FCC] = 0x12, 217 [BQ27XXX_REG_CYCT] = 0x2a, 218 [BQ27XXX_REG_AE] = 0x22, 219 [BQ27XXX_REG_SOC] = 0x2c, 220 [BQ27XXX_REG_DCAP] = 0x3c, 221 [BQ27XXX_REG_AP] = 0x24, 222 BQ27XXX_DM_REG_ROWS, 223 }, 224 #define bq27510g1_regs bq27500_regs 225 #define bq27510g2_regs bq27500_regs 226 bq27510g3_regs[BQ27XXX_REG_MAX] = { 227 [BQ27XXX_REG_CTRL] = 0x00, 228 [BQ27XXX_REG_TEMP] = 0x06, 229 [BQ27XXX_REG_INT_TEMP] = 0x28, 230 [BQ27XXX_REG_VOLT] = 0x08, 231 [BQ27XXX_REG_AI] = 0x14, 232 [BQ27XXX_REG_FLAGS] = 0x0a, 233 [BQ27XXX_REG_TTE] = 0x16, 234 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 235 [BQ27XXX_REG_TTES] = 0x1a, 236 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 237 [BQ27XXX_REG_NAC] = 0x0c, 238 [BQ27XXX_REG_FCC] = 0x12, 239 [BQ27XXX_REG_CYCT] = 0x1e, 240 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 241 [BQ27XXX_REG_SOC] = 0x20, 242 [BQ27XXX_REG_DCAP] = 0x2e, 243 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 244 BQ27XXX_DM_REG_ROWS, 245 }, 246 bq27520g1_regs[BQ27XXX_REG_MAX] = { 247 [BQ27XXX_REG_CTRL] = 0x00, 248 [BQ27XXX_REG_TEMP] = 0x06, 249 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 250 [BQ27XXX_REG_VOLT] = 0x08, 251 [BQ27XXX_REG_AI] = 0x14, 252 [BQ27XXX_REG_FLAGS] = 0x0a, 253 [BQ27XXX_REG_TTE] = 0x16, 254 [BQ27XXX_REG_TTF] = 0x18, 255 [BQ27XXX_REG_TTES] = 0x1c, 256 [BQ27XXX_REG_TTECP] = 0x26, 257 [BQ27XXX_REG_NAC] = 0x0c, 258 [BQ27XXX_REG_FCC] = 0x12, 259 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 260 [BQ27XXX_REG_AE] = 0x22, 261 [BQ27XXX_REG_SOC] = 0x2c, 262 [BQ27XXX_REG_DCAP] = 0x3c, 263 [BQ27XXX_REG_AP] = 0x24, 264 BQ27XXX_DM_REG_ROWS, 265 }, 266 bq27520g2_regs[BQ27XXX_REG_MAX] = { 267 [BQ27XXX_REG_CTRL] = 0x00, 268 [BQ27XXX_REG_TEMP] = 0x06, 269 [BQ27XXX_REG_INT_TEMP] = 0x36, 270 [BQ27XXX_REG_VOLT] = 0x08, 271 [BQ27XXX_REG_AI] = 0x14, 272 [BQ27XXX_REG_FLAGS] = 0x0a, 273 [BQ27XXX_REG_TTE] = 0x16, 274 [BQ27XXX_REG_TTF] = 0x18, 275 [BQ27XXX_REG_TTES] = 0x1c, 276 [BQ27XXX_REG_TTECP] = 0x26, 277 [BQ27XXX_REG_NAC] = 0x0c, 278 [BQ27XXX_REG_FCC] = 0x12, 279 [BQ27XXX_REG_CYCT] = 0x2a, 280 [BQ27XXX_REG_AE] = 0x22, 281 [BQ27XXX_REG_SOC] = 0x2c, 282 [BQ27XXX_REG_DCAP] = 0x3c, 283 [BQ27XXX_REG_AP] = 0x24, 284 BQ27XXX_DM_REG_ROWS, 285 }, 286 bq27520g3_regs[BQ27XXX_REG_MAX] = { 287 [BQ27XXX_REG_CTRL] = 0x00, 288 [BQ27XXX_REG_TEMP] = 0x06, 289 [BQ27XXX_REG_INT_TEMP] = 0x36, 290 [BQ27XXX_REG_VOLT] = 0x08, 291 [BQ27XXX_REG_AI] = 0x14, 292 [BQ27XXX_REG_FLAGS] = 0x0a, 293 [BQ27XXX_REG_TTE] = 0x16, 294 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 295 [BQ27XXX_REG_TTES] = 0x1c, 296 [BQ27XXX_REG_TTECP] = 0x26, 297 [BQ27XXX_REG_NAC] = 0x0c, 298 [BQ27XXX_REG_FCC] = 0x12, 299 [BQ27XXX_REG_CYCT] = 0x2a, 300 [BQ27XXX_REG_AE] = 0x22, 301 [BQ27XXX_REG_SOC] = 0x2c, 302 [BQ27XXX_REG_DCAP] = 0x3c, 303 [BQ27XXX_REG_AP] = 0x24, 304 BQ27XXX_DM_REG_ROWS, 305 }, 306 bq27520g4_regs[BQ27XXX_REG_MAX] = { 307 [BQ27XXX_REG_CTRL] = 0x00, 308 [BQ27XXX_REG_TEMP] = 0x06, 309 [BQ27XXX_REG_INT_TEMP] = 0x28, 310 [BQ27XXX_REG_VOLT] = 0x08, 311 [BQ27XXX_REG_AI] = 0x14, 312 [BQ27XXX_REG_FLAGS] = 0x0a, 313 [BQ27XXX_REG_TTE] = 0x16, 314 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 315 [BQ27XXX_REG_TTES] = 0x1c, 316 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 317 [BQ27XXX_REG_NAC] = 0x0c, 318 [BQ27XXX_REG_FCC] = 0x12, 319 [BQ27XXX_REG_CYCT] = 0x1e, 320 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 321 [BQ27XXX_REG_SOC] = 0x20, 322 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 323 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 324 BQ27XXX_DM_REG_ROWS, 325 }, 326 bq27521_regs[BQ27XXX_REG_MAX] = { 327 [BQ27XXX_REG_CTRL] = 0x02, 328 [BQ27XXX_REG_TEMP] = 0x0a, 329 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, 330 [BQ27XXX_REG_VOLT] = 0x0c, 331 [BQ27XXX_REG_AI] = 0x0e, 332 [BQ27XXX_REG_FLAGS] = 0x08, 333 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 334 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 335 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 336 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 337 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, 338 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR, 339 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 340 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 341 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR, 342 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 343 [BQ27XXX_REG_AP] = INVALID_REG_ADDR, 344 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, 345 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, 346 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, 347 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, 348 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, 349 }, 350 bq27530_regs[BQ27XXX_REG_MAX] = { 351 [BQ27XXX_REG_CTRL] = 0x00, 352 [BQ27XXX_REG_TEMP] = 0x06, 353 [BQ27XXX_REG_INT_TEMP] = 0x32, 354 [BQ27XXX_REG_VOLT] = 0x08, 355 [BQ27XXX_REG_AI] = 0x14, 356 [BQ27XXX_REG_FLAGS] = 0x0a, 357 [BQ27XXX_REG_TTE] = 0x16, 358 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 359 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 360 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 361 [BQ27XXX_REG_NAC] = 0x0c, 362 [BQ27XXX_REG_FCC] = 0x12, 363 [BQ27XXX_REG_CYCT] = 0x2a, 364 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 365 [BQ27XXX_REG_SOC] = 0x2c, 366 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 367 [BQ27XXX_REG_AP] = 0x24, 368 BQ27XXX_DM_REG_ROWS, 369 }, 370 #define bq27531_regs bq27530_regs 371 bq27541_regs[BQ27XXX_REG_MAX] = { 372 [BQ27XXX_REG_CTRL] = 0x00, 373 [BQ27XXX_REG_TEMP] = 0x06, 374 [BQ27XXX_REG_INT_TEMP] = 0x28, 375 [BQ27XXX_REG_VOLT] = 0x08, 376 [BQ27XXX_REG_AI] = 0x14, 377 [BQ27XXX_REG_FLAGS] = 0x0a, 378 [BQ27XXX_REG_TTE] = 0x16, 379 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 380 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 381 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 382 [BQ27XXX_REG_NAC] = 0x0c, 383 [BQ27XXX_REG_FCC] = 0x12, 384 [BQ27XXX_REG_CYCT] = 0x2a, 385 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 386 [BQ27XXX_REG_SOC] = 0x2c, 387 [BQ27XXX_REG_DCAP] = 0x3c, 388 [BQ27XXX_REG_AP] = 0x24, 389 BQ27XXX_DM_REG_ROWS, 390 }, 391 #define bq27542_regs bq27541_regs 392 #define bq27546_regs bq27541_regs 393 #define bq27742_regs bq27541_regs 394 bq27545_regs[BQ27XXX_REG_MAX] = { 395 [BQ27XXX_REG_CTRL] = 0x00, 396 [BQ27XXX_REG_TEMP] = 0x06, 397 [BQ27XXX_REG_INT_TEMP] = 0x28, 398 [BQ27XXX_REG_VOLT] = 0x08, 399 [BQ27XXX_REG_AI] = 0x14, 400 [BQ27XXX_REG_FLAGS] = 0x0a, 401 [BQ27XXX_REG_TTE] = 0x16, 402 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 403 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 404 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 405 [BQ27XXX_REG_NAC] = 0x0c, 406 [BQ27XXX_REG_FCC] = 0x12, 407 [BQ27XXX_REG_CYCT] = 0x2a, 408 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 409 [BQ27XXX_REG_SOC] = 0x2c, 410 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, 411 [BQ27XXX_REG_AP] = 0x24, 412 BQ27XXX_DM_REG_ROWS, 413 }, 414 bq27421_regs[BQ27XXX_REG_MAX] = { 415 [BQ27XXX_REG_CTRL] = 0x00, 416 [BQ27XXX_REG_TEMP] = 0x02, 417 [BQ27XXX_REG_INT_TEMP] = 0x1e, 418 [BQ27XXX_REG_VOLT] = 0x04, 419 [BQ27XXX_REG_AI] = 0x10, 420 [BQ27XXX_REG_FLAGS] = 0x06, 421 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, 422 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, 423 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, 424 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, 425 [BQ27XXX_REG_NAC] = 0x08, 426 [BQ27XXX_REG_FCC] = 0x0e, 427 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, 428 [BQ27XXX_REG_AE] = INVALID_REG_ADDR, 429 [BQ27XXX_REG_SOC] = 0x1c, 430 [BQ27XXX_REG_DCAP] = 0x3c, 431 [BQ27XXX_REG_AP] = 0x18, 432 BQ27XXX_DM_REG_ROWS, 433 }; 434 #define bq27425_regs bq27421_regs 435 #define bq27441_regs bq27421_regs 436 #define bq27621_regs bq27421_regs 437 438 static enum power_supply_property bq27000_props[] = { 439 POWER_SUPPLY_PROP_STATUS, 440 POWER_SUPPLY_PROP_PRESENT, 441 POWER_SUPPLY_PROP_VOLTAGE_NOW, 442 POWER_SUPPLY_PROP_CURRENT_NOW, 443 POWER_SUPPLY_PROP_CAPACITY, 444 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 445 POWER_SUPPLY_PROP_TEMP, 446 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 447 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 448 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 449 POWER_SUPPLY_PROP_TECHNOLOGY, 450 POWER_SUPPLY_PROP_CHARGE_FULL, 451 POWER_SUPPLY_PROP_CHARGE_NOW, 452 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 453 POWER_SUPPLY_PROP_CYCLE_COUNT, 454 POWER_SUPPLY_PROP_ENERGY_NOW, 455 POWER_SUPPLY_PROP_POWER_AVG, 456 POWER_SUPPLY_PROP_HEALTH, 457 POWER_SUPPLY_PROP_MANUFACTURER, 458 }; 459 460 static enum power_supply_property bq27010_props[] = { 461 POWER_SUPPLY_PROP_STATUS, 462 POWER_SUPPLY_PROP_PRESENT, 463 POWER_SUPPLY_PROP_VOLTAGE_NOW, 464 POWER_SUPPLY_PROP_CURRENT_NOW, 465 POWER_SUPPLY_PROP_CAPACITY, 466 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 467 POWER_SUPPLY_PROP_TEMP, 468 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 469 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG, 470 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 471 POWER_SUPPLY_PROP_TECHNOLOGY, 472 POWER_SUPPLY_PROP_CHARGE_FULL, 473 POWER_SUPPLY_PROP_CHARGE_NOW, 474 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 475 POWER_SUPPLY_PROP_CYCLE_COUNT, 476 POWER_SUPPLY_PROP_HEALTH, 477 POWER_SUPPLY_PROP_MANUFACTURER, 478 }; 479 480 #define bq2750x_props bq27510g3_props 481 #define bq2751x_props bq27510g3_props 482 #define bq2752x_props bq27510g3_props 483 484 static enum power_supply_property bq27500_props[] = { 485 POWER_SUPPLY_PROP_STATUS, 486 POWER_SUPPLY_PROP_PRESENT, 487 POWER_SUPPLY_PROP_VOLTAGE_NOW, 488 POWER_SUPPLY_PROP_CURRENT_NOW, 489 POWER_SUPPLY_PROP_CAPACITY, 490 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 491 POWER_SUPPLY_PROP_TEMP, 492 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 493 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 494 POWER_SUPPLY_PROP_TECHNOLOGY, 495 POWER_SUPPLY_PROP_CHARGE_FULL, 496 POWER_SUPPLY_PROP_CHARGE_NOW, 497 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 498 POWER_SUPPLY_PROP_CYCLE_COUNT, 499 POWER_SUPPLY_PROP_ENERGY_NOW, 500 POWER_SUPPLY_PROP_POWER_AVG, 501 POWER_SUPPLY_PROP_HEALTH, 502 POWER_SUPPLY_PROP_MANUFACTURER, 503 }; 504 #define bq27510g1_props bq27500_props 505 #define bq27510g2_props bq27500_props 506 507 static enum power_supply_property bq27510g3_props[] = { 508 POWER_SUPPLY_PROP_STATUS, 509 POWER_SUPPLY_PROP_PRESENT, 510 POWER_SUPPLY_PROP_VOLTAGE_NOW, 511 POWER_SUPPLY_PROP_CURRENT_NOW, 512 POWER_SUPPLY_PROP_CAPACITY, 513 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 514 POWER_SUPPLY_PROP_TEMP, 515 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 516 POWER_SUPPLY_PROP_TECHNOLOGY, 517 POWER_SUPPLY_PROP_CHARGE_FULL, 518 POWER_SUPPLY_PROP_CHARGE_NOW, 519 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 520 POWER_SUPPLY_PROP_CYCLE_COUNT, 521 POWER_SUPPLY_PROP_HEALTH, 522 POWER_SUPPLY_PROP_MANUFACTURER, 523 }; 524 525 static enum power_supply_property bq27520g1_props[] = { 526 POWER_SUPPLY_PROP_STATUS, 527 POWER_SUPPLY_PROP_PRESENT, 528 POWER_SUPPLY_PROP_VOLTAGE_NOW, 529 POWER_SUPPLY_PROP_CURRENT_NOW, 530 POWER_SUPPLY_PROP_CAPACITY, 531 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 532 POWER_SUPPLY_PROP_TEMP, 533 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 534 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW, 535 POWER_SUPPLY_PROP_TECHNOLOGY, 536 POWER_SUPPLY_PROP_CHARGE_FULL, 537 POWER_SUPPLY_PROP_CHARGE_NOW, 538 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 539 POWER_SUPPLY_PROP_ENERGY_NOW, 540 POWER_SUPPLY_PROP_POWER_AVG, 541 POWER_SUPPLY_PROP_HEALTH, 542 POWER_SUPPLY_PROP_MANUFACTURER, 543 }; 544 545 #define bq27520g2_props bq27500_props 546 547 static enum power_supply_property bq27520g3_props[] = { 548 POWER_SUPPLY_PROP_STATUS, 549 POWER_SUPPLY_PROP_PRESENT, 550 POWER_SUPPLY_PROP_VOLTAGE_NOW, 551 POWER_SUPPLY_PROP_CURRENT_NOW, 552 POWER_SUPPLY_PROP_CAPACITY, 553 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 554 POWER_SUPPLY_PROP_TEMP, 555 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 556 POWER_SUPPLY_PROP_TECHNOLOGY, 557 POWER_SUPPLY_PROP_CHARGE_FULL, 558 POWER_SUPPLY_PROP_CHARGE_NOW, 559 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 560 POWER_SUPPLY_PROP_CYCLE_COUNT, 561 POWER_SUPPLY_PROP_ENERGY_NOW, 562 POWER_SUPPLY_PROP_POWER_AVG, 563 POWER_SUPPLY_PROP_HEALTH, 564 POWER_SUPPLY_PROP_MANUFACTURER, 565 }; 566 567 static enum power_supply_property bq27520g4_props[] = { 568 POWER_SUPPLY_PROP_STATUS, 569 POWER_SUPPLY_PROP_PRESENT, 570 POWER_SUPPLY_PROP_VOLTAGE_NOW, 571 POWER_SUPPLY_PROP_CURRENT_NOW, 572 POWER_SUPPLY_PROP_CAPACITY, 573 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 574 POWER_SUPPLY_PROP_TEMP, 575 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 576 POWER_SUPPLY_PROP_TECHNOLOGY, 577 POWER_SUPPLY_PROP_CHARGE_FULL, 578 POWER_SUPPLY_PROP_CHARGE_NOW, 579 POWER_SUPPLY_PROP_CYCLE_COUNT, 580 POWER_SUPPLY_PROP_HEALTH, 581 POWER_SUPPLY_PROP_MANUFACTURER, 582 }; 583 584 static enum power_supply_property bq27521_props[] = { 585 POWER_SUPPLY_PROP_STATUS, 586 POWER_SUPPLY_PROP_PRESENT, 587 POWER_SUPPLY_PROP_VOLTAGE_NOW, 588 POWER_SUPPLY_PROP_CURRENT_NOW, 589 POWER_SUPPLY_PROP_TEMP, 590 POWER_SUPPLY_PROP_TECHNOLOGY, 591 }; 592 593 static enum power_supply_property bq27530_props[] = { 594 POWER_SUPPLY_PROP_STATUS, 595 POWER_SUPPLY_PROP_PRESENT, 596 POWER_SUPPLY_PROP_VOLTAGE_NOW, 597 POWER_SUPPLY_PROP_CURRENT_NOW, 598 POWER_SUPPLY_PROP_CAPACITY, 599 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 600 POWER_SUPPLY_PROP_TEMP, 601 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 602 POWER_SUPPLY_PROP_TECHNOLOGY, 603 POWER_SUPPLY_PROP_CHARGE_FULL, 604 POWER_SUPPLY_PROP_CHARGE_NOW, 605 POWER_SUPPLY_PROP_POWER_AVG, 606 POWER_SUPPLY_PROP_HEALTH, 607 POWER_SUPPLY_PROP_CYCLE_COUNT, 608 POWER_SUPPLY_PROP_MANUFACTURER, 609 }; 610 #define bq27531_props bq27530_props 611 612 static enum power_supply_property bq27541_props[] = { 613 POWER_SUPPLY_PROP_STATUS, 614 POWER_SUPPLY_PROP_PRESENT, 615 POWER_SUPPLY_PROP_VOLTAGE_NOW, 616 POWER_SUPPLY_PROP_CURRENT_NOW, 617 POWER_SUPPLY_PROP_CAPACITY, 618 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 619 POWER_SUPPLY_PROP_TEMP, 620 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 621 POWER_SUPPLY_PROP_TECHNOLOGY, 622 POWER_SUPPLY_PROP_CHARGE_FULL, 623 POWER_SUPPLY_PROP_CHARGE_NOW, 624 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 625 POWER_SUPPLY_PROP_CYCLE_COUNT, 626 POWER_SUPPLY_PROP_POWER_AVG, 627 POWER_SUPPLY_PROP_HEALTH, 628 POWER_SUPPLY_PROP_MANUFACTURER, 629 }; 630 #define bq27542_props bq27541_props 631 #define bq27546_props bq27541_props 632 #define bq27742_props bq27541_props 633 634 static enum power_supply_property bq27545_props[] = { 635 POWER_SUPPLY_PROP_STATUS, 636 POWER_SUPPLY_PROP_PRESENT, 637 POWER_SUPPLY_PROP_VOLTAGE_NOW, 638 POWER_SUPPLY_PROP_CURRENT_NOW, 639 POWER_SUPPLY_PROP_CAPACITY, 640 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 641 POWER_SUPPLY_PROP_TEMP, 642 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW, 643 POWER_SUPPLY_PROP_TECHNOLOGY, 644 POWER_SUPPLY_PROP_CHARGE_FULL, 645 POWER_SUPPLY_PROP_CHARGE_NOW, 646 POWER_SUPPLY_PROP_HEALTH, 647 POWER_SUPPLY_PROP_CYCLE_COUNT, 648 POWER_SUPPLY_PROP_POWER_AVG, 649 POWER_SUPPLY_PROP_MANUFACTURER, 650 }; 651 652 static enum power_supply_property bq27421_props[] = { 653 POWER_SUPPLY_PROP_STATUS, 654 POWER_SUPPLY_PROP_PRESENT, 655 POWER_SUPPLY_PROP_VOLTAGE_NOW, 656 POWER_SUPPLY_PROP_CURRENT_NOW, 657 POWER_SUPPLY_PROP_CAPACITY, 658 POWER_SUPPLY_PROP_CAPACITY_LEVEL, 659 POWER_SUPPLY_PROP_TEMP, 660 POWER_SUPPLY_PROP_TECHNOLOGY, 661 POWER_SUPPLY_PROP_CHARGE_FULL, 662 POWER_SUPPLY_PROP_CHARGE_NOW, 663 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, 664 POWER_SUPPLY_PROP_MANUFACTURER, 665 }; 666 #define bq27425_props bq27421_props 667 #define bq27441_props bq27421_props 668 #define bq27621_props bq27421_props 669 670 struct bq27xxx_dm_reg { 671 u8 subclass_id; 672 u8 offset; 673 u8 bytes; 674 u16 min, max; 675 }; 676 677 enum bq27xxx_dm_reg_id { 678 BQ27XXX_DM_DESIGN_CAPACITY = 0, 679 BQ27XXX_DM_DESIGN_ENERGY, 680 BQ27XXX_DM_TERMINATE_VOLTAGE, 681 }; 682 683 #define bq27000_dm_regs 0 684 #define bq27010_dm_regs 0 685 #define bq2750x_dm_regs 0 686 #define bq2751x_dm_regs 0 687 #define bq2752x_dm_regs 0 688 689 #if 0 /* not yet tested */ 690 static struct bq27xxx_dm_reg bq27500_dm_regs[] = { 691 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 }, 692 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */ 693 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 }, 694 }; 695 #else 696 #define bq27500_dm_regs 0 697 #endif 698 699 /* todo create data memory definitions from datasheets and test on chips */ 700 #define bq27510g1_dm_regs 0 701 #define bq27510g2_dm_regs 0 702 #define bq27510g3_dm_regs 0 703 #define bq27520g1_dm_regs 0 704 #define bq27520g2_dm_regs 0 705 #define bq27520g3_dm_regs 0 706 #define bq27520g4_dm_regs 0 707 #define bq27521_dm_regs 0 708 #define bq27530_dm_regs 0 709 #define bq27531_dm_regs 0 710 #define bq27541_dm_regs 0 711 #define bq27542_dm_regs 0 712 #define bq27546_dm_regs 0 713 #define bq27742_dm_regs 0 714 715 #if 0 /* not yet tested */ 716 static struct bq27xxx_dm_reg bq27545_dm_regs[] = { 717 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 }, 718 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 }, 719 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 }, 720 }; 721 #else 722 #define bq27545_dm_regs 0 723 #endif 724 725 static struct bq27xxx_dm_reg bq27421_dm_regs[] = { 726 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 }, 727 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 }, 728 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 }, 729 }; 730 731 static struct bq27xxx_dm_reg bq27425_dm_regs[] = { 732 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 }, 733 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 }, 734 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 }, 735 }; 736 737 #if 0 /* not yet tested */ 738 #define bq27441_dm_regs bq27421_dm_regs 739 #else 740 #define bq27441_dm_regs 0 741 #endif 742 743 #if 0 /* not yet tested */ 744 static struct bq27xxx_dm_reg bq27621_dm_regs[] = { 745 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 }, 746 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 }, 747 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 }, 748 }; 749 #else 750 #define bq27621_dm_regs 0 751 #endif 752 753 #define BQ27XXX_O_ZERO 0x00000001 754 #define BQ27XXX_O_OTDC 0x00000002 /* has OTC/OTD overtemperature flags */ 755 #define BQ27XXX_O_UTOT 0x00000004 /* has OT overtemperature flag */ 756 #define BQ27XXX_O_CFGUP 0x00000008 757 #define BQ27XXX_O_RAM 0x00000010 758 759 #define BQ27XXX_DATA(ref, key, opt) { \ 760 .opts = (opt), \ 761 .unseal_key = key, \ 762 .regs = ref##_regs, \ 763 .dm_regs = ref##_dm_regs, \ 764 .props = ref##_props, \ 765 .props_size = ARRAY_SIZE(ref##_props) } 766 767 static struct { 768 u32 opts; 769 u32 unseal_key; 770 u8 *regs; 771 struct bq27xxx_dm_reg *dm_regs; 772 enum power_supply_property *props; 773 size_t props_size; 774 } bq27xxx_chip_data[] = { 775 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO), 776 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO), 777 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC), 778 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC), 779 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC), 780 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC), 781 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC), 782 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC), 783 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC), 784 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC), 785 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC), 786 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC), 787 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC), 788 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0), 789 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT), 790 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT), 791 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC), 792 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC), 793 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC), 794 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC), 795 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC), 796 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 797 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP), 798 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 799 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM), 800 }; 801 802 static DEFINE_MUTEX(bq27xxx_list_lock); 803 static LIST_HEAD(bq27xxx_battery_devices); 804 805 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500) 806 807 #define BQ27XXX_DM_SZ 32 808 809 /** 810 * struct bq27xxx_dm_buf - chip data memory buffer 811 * @class: data memory subclass_id 812 * @block: data memory block number 813 * @data: data from/for the block 814 * @has_data: true if data has been filled by read 815 * @dirty: true if data has changed since last read/write 816 * 817 * Encapsulates info required to manage chip data memory blocks. 818 */ 819 struct bq27xxx_dm_buf { 820 u8 class; 821 u8 block; 822 u8 data[BQ27XXX_DM_SZ]; 823 bool has_data, dirty; 824 }; 825 826 #define BQ27XXX_DM_BUF(di, i) { \ 827 .class = (di)->dm_regs[i].subclass_id, \ 828 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \ 829 } 830 831 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf, 832 struct bq27xxx_dm_reg *reg) 833 { 834 if (buf->class == reg->subclass_id && 835 buf->block == reg->offset / BQ27XXX_DM_SZ) 836 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ); 837 838 return NULL; 839 } 840 841 static const char * const bq27xxx_dm_reg_name[] = { 842 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity", 843 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy", 844 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage", 845 }; 846 847 848 static bool bq27xxx_dt_to_nvm = true; 849 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444); 850 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm, 851 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n" 852 "Users must set this =0 when installing a different type of battery!\n" 853 "Default is =1." 854 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 855 "\nSetting this affects future kernel updates, not the current configuration." 856 #endif 857 ); 858 859 static int poll_interval_param_set(const char *val, const struct kernel_param *kp) 860 { 861 struct bq27xxx_device_info *di; 862 unsigned int prev_val = *(unsigned int *) kp->arg; 863 int ret; 864 865 ret = param_set_uint(val, kp); 866 if (ret < 0 || prev_val == *(unsigned int *) kp->arg) 867 return ret; 868 869 mutex_lock(&bq27xxx_list_lock); 870 list_for_each_entry(di, &bq27xxx_battery_devices, list) { 871 cancel_delayed_work_sync(&di->work); 872 schedule_delayed_work(&di->work, 0); 873 } 874 mutex_unlock(&bq27xxx_list_lock); 875 876 return ret; 877 } 878 879 static const struct kernel_param_ops param_ops_poll_interval = { 880 .get = param_get_uint, 881 .set = poll_interval_param_set, 882 }; 883 884 static unsigned int poll_interval = 360; 885 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644); 886 MODULE_PARM_DESC(poll_interval, 887 "battery poll interval in seconds - 0 disables polling"); 888 889 /* 890 * Common code for BQ27xxx devices 891 */ 892 893 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index, 894 bool single) 895 { 896 int ret; 897 898 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 899 return -EINVAL; 900 901 ret = di->bus.read(di, di->regs[reg_index], single); 902 if (ret < 0) 903 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n", 904 di->regs[reg_index], reg_index); 905 906 return ret; 907 } 908 909 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index, 910 u16 value, bool single) 911 { 912 int ret; 913 914 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 915 return -EINVAL; 916 917 if (!di->bus.write) 918 return -EPERM; 919 920 ret = di->bus.write(di, di->regs[reg_index], value, single); 921 if (ret < 0) 922 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n", 923 di->regs[reg_index], reg_index); 924 925 return ret; 926 } 927 928 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index, 929 u8 *data, int len) 930 { 931 int ret; 932 933 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 934 return -EINVAL; 935 936 if (!di->bus.read_bulk) 937 return -EPERM; 938 939 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len); 940 if (ret < 0) 941 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n", 942 di->regs[reg_index], reg_index); 943 944 return ret; 945 } 946 947 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index, 948 u8 *data, int len) 949 { 950 int ret; 951 952 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) 953 return -EINVAL; 954 955 if (!di->bus.write_bulk) 956 return -EPERM; 957 958 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len); 959 if (ret < 0) 960 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n", 961 di->regs[reg_index], reg_index); 962 963 return ret; 964 } 965 966 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di) 967 { 968 int ret; 969 970 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false); 971 if (ret < 0) { 972 dev_err(di->dev, "bus error on seal: %d\n", ret); 973 return ret; 974 } 975 976 return 0; 977 } 978 979 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di) 980 { 981 int ret; 982 983 if (di->unseal_key == 0) { 984 dev_err(di->dev, "unseal failed due to missing key\n"); 985 return -EINVAL; 986 } 987 988 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false); 989 if (ret < 0) 990 goto out; 991 992 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false); 993 if (ret < 0) 994 goto out; 995 996 return 0; 997 998 out: 999 dev_err(di->dev, "bus error on unseal: %d\n", ret); 1000 return ret; 1001 } 1002 1003 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf) 1004 { 1005 u16 sum = 0; 1006 int i; 1007 1008 for (i = 0; i < BQ27XXX_DM_SZ; i++) 1009 sum += buf->data[i]; 1010 sum &= 0xff; 1011 1012 return 0xff - sum; 1013 } 1014 1015 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di, 1016 struct bq27xxx_dm_buf *buf) 1017 { 1018 int ret; 1019 1020 buf->has_data = false; 1021 1022 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1023 if (ret < 0) 1024 goto out; 1025 1026 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1027 if (ret < 0) 1028 goto out; 1029 1030 BQ27XXX_MSLEEP(1); 1031 1032 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1033 if (ret < 0) 1034 goto out; 1035 1036 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true); 1037 if (ret < 0) 1038 goto out; 1039 1040 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) { 1041 ret = -EINVAL; 1042 goto out; 1043 } 1044 1045 buf->has_data = true; 1046 buf->dirty = false; 1047 1048 return 0; 1049 1050 out: 1051 dev_err(di->dev, "bus error reading chip memory: %d\n", ret); 1052 return ret; 1053 } 1054 1055 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di, 1056 struct bq27xxx_dm_buf *buf, 1057 enum bq27xxx_dm_reg_id reg_id, 1058 unsigned int val) 1059 { 1060 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id]; 1061 const char *str = bq27xxx_dm_reg_name[reg_id]; 1062 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg); 1063 1064 if (prev == NULL) { 1065 dev_warn(di->dev, "buffer does not match %s dm spec\n", str); 1066 return; 1067 } 1068 1069 if (reg->bytes != 2) { 1070 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str); 1071 return; 1072 } 1073 1074 if (!buf->has_data) 1075 return; 1076 1077 if (be16_to_cpup(prev) == val) { 1078 dev_info(di->dev, "%s has %u\n", str, val); 1079 return; 1080 } 1081 1082 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1083 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) { 1084 #else 1085 if (!(di->opts & BQ27XXX_O_RAM)) { 1086 #endif 1087 /* devicetree and NVM differ; defer to NVM */ 1088 dev_warn(di->dev, "%s has %u; update to %u disallowed " 1089 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM 1090 "by dt_monitored_battery_updates_nvm=0" 1091 #else 1092 "for flash/NVM data memory" 1093 #endif 1094 "\n", str, be16_to_cpup(prev), val); 1095 return; 1096 } 1097 1098 dev_info(di->dev, "update %s to %u\n", str, val); 1099 1100 *prev = cpu_to_be16(val); 1101 buf->dirty = true; 1102 } 1103 1104 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active) 1105 { 1106 const int limit = 100; 1107 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET; 1108 int ret, try = limit; 1109 1110 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false); 1111 if (ret < 0) 1112 return ret; 1113 1114 do { 1115 BQ27XXX_MSLEEP(25); 1116 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false); 1117 if (ret < 0) 1118 return ret; 1119 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try); 1120 1121 if (!try && di->chip != BQ27425) { // 425 has a bug 1122 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active); 1123 return -EINVAL; 1124 } 1125 1126 if (limit - try > 3) 1127 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try); 1128 1129 return 0; 1130 } 1131 1132 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di) 1133 { 1134 int ret = bq27xxx_battery_cfgupdate_priv(di, true); 1135 if (ret < 0 && ret != -EINVAL) 1136 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret); 1137 1138 return ret; 1139 } 1140 1141 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di) 1142 { 1143 int ret = bq27xxx_battery_cfgupdate_priv(di, false); 1144 if (ret < 0 && ret != -EINVAL) 1145 dev_err(di->dev, "bus error on soft_reset: %d\n", ret); 1146 1147 return ret; 1148 } 1149 1150 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di, 1151 struct bq27xxx_dm_buf *buf) 1152 { 1153 bool cfgup = di->opts & BQ27XXX_O_CFGUP; 1154 int ret; 1155 1156 if (!buf->dirty) 1157 return 0; 1158 1159 if (cfgup) { 1160 ret = bq27xxx_battery_set_cfgupdate(di); 1161 if (ret < 0) 1162 return ret; 1163 } 1164 1165 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true); 1166 if (ret < 0) 1167 goto out; 1168 1169 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true); 1170 if (ret < 0) 1171 goto out; 1172 1173 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true); 1174 if (ret < 0) 1175 goto out; 1176 1177 BQ27XXX_MSLEEP(1); 1178 1179 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ); 1180 if (ret < 0) 1181 goto out; 1182 1183 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM, 1184 bq27xxx_battery_checksum_dm_block(buf), true); 1185 if (ret < 0) 1186 goto out; 1187 1188 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM 1189 * corruption on the '425 chip (and perhaps others), which can damage 1190 * the chip. 1191 */ 1192 1193 if (cfgup) { 1194 BQ27XXX_MSLEEP(1); 1195 ret = bq27xxx_battery_soft_reset(di); 1196 if (ret < 0) 1197 return ret; 1198 } else { 1199 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */ 1200 } 1201 1202 buf->dirty = false; 1203 1204 return 0; 1205 1206 out: 1207 if (cfgup) 1208 bq27xxx_battery_soft_reset(di); 1209 1210 dev_err(di->dev, "bus error writing chip memory: %d\n", ret); 1211 return ret; 1212 } 1213 1214 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di, 1215 struct power_supply_battery_info *info) 1216 { 1217 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY); 1218 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE); 1219 bool updated; 1220 1221 if (bq27xxx_battery_unseal(di) < 0) 1222 return; 1223 1224 if (info->charge_full_design_uah != -EINVAL && 1225 info->energy_full_design_uwh != -EINVAL) { 1226 bq27xxx_battery_read_dm_block(di, &bd); 1227 /* assume design energy & capacity are in same block */ 1228 bq27xxx_battery_update_dm_block(di, &bd, 1229 BQ27XXX_DM_DESIGN_CAPACITY, 1230 info->charge_full_design_uah / 1000); 1231 bq27xxx_battery_update_dm_block(di, &bd, 1232 BQ27XXX_DM_DESIGN_ENERGY, 1233 info->energy_full_design_uwh / 1000); 1234 } 1235 1236 if (info->voltage_min_design_uv != -EINVAL) { 1237 bool same = bd.class == bt.class && bd.block == bt.block; 1238 if (!same) 1239 bq27xxx_battery_read_dm_block(di, &bt); 1240 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt, 1241 BQ27XXX_DM_TERMINATE_VOLTAGE, 1242 info->voltage_min_design_uv / 1000); 1243 } 1244 1245 updated = bd.dirty || bt.dirty; 1246 1247 bq27xxx_battery_write_dm_block(di, &bd); 1248 bq27xxx_battery_write_dm_block(di, &bt); 1249 1250 bq27xxx_battery_seal(di); 1251 1252 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) { 1253 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false); 1254 BQ27XXX_MSLEEP(300); /* reset time is not documented */ 1255 } 1256 /* assume bq27xxx_battery_update() is called hereafter */ 1257 } 1258 1259 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di) 1260 { 1261 struct power_supply_battery_info info = {}; 1262 unsigned int min, max; 1263 1264 if (power_supply_get_battery_info(di->bat, &info) < 0) 1265 return; 1266 1267 if (!di->dm_regs) { 1268 dev_warn(di->dev, "data memory update not supported for chip\n"); 1269 return; 1270 } 1271 1272 if (info.energy_full_design_uwh != info.charge_full_design_uah) { 1273 if (info.energy_full_design_uwh == -EINVAL) 1274 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n"); 1275 else if (info.charge_full_design_uah == -EINVAL) 1276 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n"); 1277 } 1278 1279 /* assume min == 0 */ 1280 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max; 1281 if (info.energy_full_design_uwh > max * 1000) { 1282 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n", 1283 info.energy_full_design_uwh); 1284 info.energy_full_design_uwh = -EINVAL; 1285 } 1286 1287 /* assume min == 0 */ 1288 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max; 1289 if (info.charge_full_design_uah > max * 1000) { 1290 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n", 1291 info.charge_full_design_uah); 1292 info.charge_full_design_uah = -EINVAL; 1293 } 1294 1295 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min; 1296 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max; 1297 if ((info.voltage_min_design_uv < min * 1000 || 1298 info.voltage_min_design_uv > max * 1000) && 1299 info.voltage_min_design_uv != -EINVAL) { 1300 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n", 1301 info.voltage_min_design_uv); 1302 info.voltage_min_design_uv = -EINVAL; 1303 } 1304 1305 if ((info.energy_full_design_uwh != -EINVAL && 1306 info.charge_full_design_uah != -EINVAL) || 1307 info.voltage_min_design_uv != -EINVAL) 1308 bq27xxx_battery_set_config(di, &info); 1309 } 1310 1311 /* 1312 * Return the battery State-of-Charge 1313 * Or < 0 if something fails. 1314 */ 1315 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di) 1316 { 1317 int soc; 1318 1319 if (di->opts & BQ27XXX_O_ZERO) 1320 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true); 1321 else 1322 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false); 1323 1324 if (soc < 0) 1325 dev_dbg(di->dev, "error reading State-of-Charge\n"); 1326 1327 return soc; 1328 } 1329 1330 /* 1331 * Return a battery charge value in µAh 1332 * Or < 0 if something fails. 1333 */ 1334 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg) 1335 { 1336 int charge; 1337 1338 charge = bq27xxx_read(di, reg, false); 1339 if (charge < 0) { 1340 dev_dbg(di->dev, "error reading charge register %02x: %d\n", 1341 reg, charge); 1342 return charge; 1343 } 1344 1345 if (di->opts & BQ27XXX_O_ZERO) 1346 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1347 else 1348 charge *= 1000; 1349 1350 return charge; 1351 } 1352 1353 /* 1354 * Return the battery Nominal available capacity in µAh 1355 * Or < 0 if something fails. 1356 */ 1357 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di) 1358 { 1359 int flags; 1360 1361 if (di->opts & BQ27XXX_O_ZERO) { 1362 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true); 1363 if (flags >= 0 && (flags & BQ27000_FLAG_CI)) 1364 return -ENODATA; 1365 } 1366 1367 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC); 1368 } 1369 1370 /* 1371 * Return the battery Full Charge Capacity in µAh 1372 * Or < 0 if something fails. 1373 */ 1374 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di) 1375 { 1376 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC); 1377 } 1378 1379 /* 1380 * Return the Design Capacity in µAh 1381 * Or < 0 if something fails. 1382 */ 1383 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di) 1384 { 1385 int dcap; 1386 1387 if (di->opts & BQ27XXX_O_ZERO) 1388 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true); 1389 else 1390 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false); 1391 1392 if (dcap < 0) { 1393 dev_dbg(di->dev, "error reading initial last measured discharge\n"); 1394 return dcap; 1395 } 1396 1397 if (di->opts & BQ27XXX_O_ZERO) 1398 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1399 else 1400 dcap *= 1000; 1401 1402 return dcap; 1403 } 1404 1405 /* 1406 * Return the battery Available energy in µWh 1407 * Or < 0 if something fails. 1408 */ 1409 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di) 1410 { 1411 int ae; 1412 1413 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false); 1414 if (ae < 0) { 1415 dev_dbg(di->dev, "error reading available energy\n"); 1416 return ae; 1417 } 1418 1419 if (di->opts & BQ27XXX_O_ZERO) 1420 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS; 1421 else 1422 ae *= 1000; 1423 1424 return ae; 1425 } 1426 1427 /* 1428 * Return the battery temperature in tenths of degree Kelvin 1429 * Or < 0 if something fails. 1430 */ 1431 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di) 1432 { 1433 int temp; 1434 1435 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false); 1436 if (temp < 0) { 1437 dev_err(di->dev, "error reading temperature\n"); 1438 return temp; 1439 } 1440 1441 if (di->opts & BQ27XXX_O_ZERO) 1442 temp = 5 * temp / 2; 1443 1444 return temp; 1445 } 1446 1447 /* 1448 * Return the battery Cycle count total 1449 * Or < 0 if something fails. 1450 */ 1451 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di) 1452 { 1453 int cyct; 1454 1455 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false); 1456 if (cyct < 0) 1457 dev_err(di->dev, "error reading cycle count total\n"); 1458 1459 return cyct; 1460 } 1461 1462 /* 1463 * Read a time register. 1464 * Return < 0 if something fails. 1465 */ 1466 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg) 1467 { 1468 int tval; 1469 1470 tval = bq27xxx_read(di, reg, false); 1471 if (tval < 0) { 1472 dev_dbg(di->dev, "error reading time register %02x: %d\n", 1473 reg, tval); 1474 return tval; 1475 } 1476 1477 if (tval == 65535) 1478 return -ENODATA; 1479 1480 return tval * 60; 1481 } 1482 1483 /* 1484 * Read an average power register. 1485 * Return < 0 if something fails. 1486 */ 1487 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di) 1488 { 1489 int tval; 1490 1491 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false); 1492 if (tval < 0) { 1493 dev_err(di->dev, "error reading average power register %02x: %d\n", 1494 BQ27XXX_REG_AP, tval); 1495 return tval; 1496 } 1497 1498 if (di->opts & BQ27XXX_O_ZERO) 1499 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS; 1500 else 1501 return tval; 1502 } 1503 1504 /* 1505 * Returns true if a battery over temperature condition is detected 1506 */ 1507 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags) 1508 { 1509 if (di->opts & BQ27XXX_O_OTDC) 1510 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD); 1511 if (di->opts & BQ27XXX_O_UTOT) 1512 return flags & BQ27XXX_FLAG_OT; 1513 1514 return false; 1515 } 1516 1517 /* 1518 * Returns true if a battery under temperature condition is detected 1519 */ 1520 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags) 1521 { 1522 if (di->opts & BQ27XXX_O_UTOT) 1523 return flags & BQ27XXX_FLAG_UT; 1524 1525 return false; 1526 } 1527 1528 /* 1529 * Returns true if a low state of charge condition is detected 1530 */ 1531 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags) 1532 { 1533 if (di->opts & BQ27XXX_O_ZERO) 1534 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF); 1535 else 1536 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF); 1537 } 1538 1539 /* 1540 * Read flag register. 1541 * Return < 0 if something fails. 1542 */ 1543 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di) 1544 { 1545 int flags; 1546 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO; 1547 1548 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag); 1549 if (flags < 0) { 1550 dev_err(di->dev, "error reading flag register:%d\n", flags); 1551 return flags; 1552 } 1553 1554 /* Unlikely but important to return first */ 1555 if (unlikely(bq27xxx_battery_overtemp(di, flags))) 1556 return POWER_SUPPLY_HEALTH_OVERHEAT; 1557 if (unlikely(bq27xxx_battery_undertemp(di, flags))) 1558 return POWER_SUPPLY_HEALTH_COLD; 1559 if (unlikely(bq27xxx_battery_dead(di, flags))) 1560 return POWER_SUPPLY_HEALTH_DEAD; 1561 1562 return POWER_SUPPLY_HEALTH_GOOD; 1563 } 1564 1565 void bq27xxx_battery_update(struct bq27xxx_device_info *di) 1566 { 1567 struct bq27xxx_reg_cache cache = {0, }; 1568 bool has_ci_flag = di->opts & BQ27XXX_O_ZERO; 1569 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO; 1570 1571 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag); 1572 if ((cache.flags & 0xff) == 0xff) 1573 cache.flags = -1; /* read error */ 1574 if (cache.flags >= 0) { 1575 cache.temperature = bq27xxx_battery_read_temperature(di); 1576 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) { 1577 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n"); 1578 cache.capacity = -ENODATA; 1579 cache.energy = -ENODATA; 1580 cache.time_to_empty = -ENODATA; 1581 cache.time_to_empty_avg = -ENODATA; 1582 cache.time_to_full = -ENODATA; 1583 cache.charge_full = -ENODATA; 1584 cache.health = -ENODATA; 1585 } else { 1586 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR) 1587 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE); 1588 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR) 1589 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP); 1590 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR) 1591 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF); 1592 cache.charge_full = bq27xxx_battery_read_fcc(di); 1593 cache.capacity = bq27xxx_battery_read_soc(di); 1594 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR) 1595 cache.energy = bq27xxx_battery_read_energy(di); 1596 cache.health = bq27xxx_battery_read_health(di); 1597 } 1598 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR) 1599 cache.cycle_count = bq27xxx_battery_read_cyct(di); 1600 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR) 1601 cache.power_avg = bq27xxx_battery_read_pwr_avg(di); 1602 1603 /* We only have to read charge design full once */ 1604 if (di->charge_design_full <= 0) 1605 di->charge_design_full = bq27xxx_battery_read_dcap(di); 1606 } 1607 1608 if (di->cache.capacity != cache.capacity) 1609 power_supply_changed(di->bat); 1610 1611 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0) 1612 di->cache = cache; 1613 1614 di->last_update = jiffies; 1615 } 1616 EXPORT_SYMBOL_GPL(bq27xxx_battery_update); 1617 1618 static void bq27xxx_battery_poll(struct work_struct *work) 1619 { 1620 struct bq27xxx_device_info *di = 1621 container_of(work, struct bq27xxx_device_info, 1622 work.work); 1623 1624 bq27xxx_battery_update(di); 1625 1626 if (poll_interval > 0) 1627 schedule_delayed_work(&di->work, poll_interval * HZ); 1628 } 1629 1630 /* 1631 * Return the battery average current in µA 1632 * Note that current can be negative signed as well 1633 * Or 0 if something fails. 1634 */ 1635 static int bq27xxx_battery_current(struct bq27xxx_device_info *di, 1636 union power_supply_propval *val) 1637 { 1638 int curr; 1639 int flags; 1640 1641 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false); 1642 if (curr < 0) { 1643 dev_err(di->dev, "error reading current\n"); 1644 return curr; 1645 } 1646 1647 if (di->opts & BQ27XXX_O_ZERO) { 1648 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true); 1649 if (flags & BQ27000_FLAG_CHGS) { 1650 dev_dbg(di->dev, "negative current!\n"); 1651 curr = -curr; 1652 } 1653 1654 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS; 1655 } else { 1656 /* Other gauges return signed value */ 1657 val->intval = (int)((s16)curr) * 1000; 1658 } 1659 1660 return 0; 1661 } 1662 1663 static int bq27xxx_battery_status(struct bq27xxx_device_info *di, 1664 union power_supply_propval *val) 1665 { 1666 int status; 1667 1668 if (di->opts & BQ27XXX_O_ZERO) { 1669 if (di->cache.flags & BQ27000_FLAG_FC) 1670 status = POWER_SUPPLY_STATUS_FULL; 1671 else if (di->cache.flags & BQ27000_FLAG_CHGS) 1672 status = POWER_SUPPLY_STATUS_CHARGING; 1673 else if (power_supply_am_i_supplied(di->bat) > 0) 1674 status = POWER_SUPPLY_STATUS_NOT_CHARGING; 1675 else 1676 status = POWER_SUPPLY_STATUS_DISCHARGING; 1677 } else { 1678 if (di->cache.flags & BQ27XXX_FLAG_FC) 1679 status = POWER_SUPPLY_STATUS_FULL; 1680 else if (di->cache.flags & BQ27XXX_FLAG_DSC) 1681 status = POWER_SUPPLY_STATUS_DISCHARGING; 1682 else 1683 status = POWER_SUPPLY_STATUS_CHARGING; 1684 } 1685 1686 val->intval = status; 1687 1688 return 0; 1689 } 1690 1691 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di, 1692 union power_supply_propval *val) 1693 { 1694 int level; 1695 1696 if (di->opts & BQ27XXX_O_ZERO) { 1697 if (di->cache.flags & BQ27000_FLAG_FC) 1698 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 1699 else if (di->cache.flags & BQ27000_FLAG_EDV1) 1700 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 1701 else if (di->cache.flags & BQ27000_FLAG_EDVF) 1702 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 1703 else 1704 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 1705 } else { 1706 if (di->cache.flags & BQ27XXX_FLAG_FC) 1707 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL; 1708 else if (di->cache.flags & BQ27XXX_FLAG_SOC1) 1709 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW; 1710 else if (di->cache.flags & BQ27XXX_FLAG_SOCF) 1711 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL; 1712 else 1713 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL; 1714 } 1715 1716 val->intval = level; 1717 1718 return 0; 1719 } 1720 1721 /* 1722 * Return the battery Voltage in millivolts 1723 * Or < 0 if something fails. 1724 */ 1725 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di, 1726 union power_supply_propval *val) 1727 { 1728 int volt; 1729 1730 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false); 1731 if (volt < 0) { 1732 dev_err(di->dev, "error reading voltage\n"); 1733 return volt; 1734 } 1735 1736 val->intval = volt * 1000; 1737 1738 return 0; 1739 } 1740 1741 static int bq27xxx_simple_value(int value, 1742 union power_supply_propval *val) 1743 { 1744 if (value < 0) 1745 return value; 1746 1747 val->intval = value; 1748 1749 return 0; 1750 } 1751 1752 static int bq27xxx_battery_get_property(struct power_supply *psy, 1753 enum power_supply_property psp, 1754 union power_supply_propval *val) 1755 { 1756 int ret = 0; 1757 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 1758 1759 mutex_lock(&di->lock); 1760 if (time_is_before_jiffies(di->last_update + 5 * HZ)) { 1761 cancel_delayed_work_sync(&di->work); 1762 bq27xxx_battery_poll(&di->work.work); 1763 } 1764 mutex_unlock(&di->lock); 1765 1766 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0) 1767 return -ENODEV; 1768 1769 switch (psp) { 1770 case POWER_SUPPLY_PROP_STATUS: 1771 ret = bq27xxx_battery_status(di, val); 1772 break; 1773 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 1774 ret = bq27xxx_battery_voltage(di, val); 1775 break; 1776 case POWER_SUPPLY_PROP_PRESENT: 1777 val->intval = di->cache.flags < 0 ? 0 : 1; 1778 break; 1779 case POWER_SUPPLY_PROP_CURRENT_NOW: 1780 ret = bq27xxx_battery_current(di, val); 1781 break; 1782 case POWER_SUPPLY_PROP_CAPACITY: 1783 ret = bq27xxx_simple_value(di->cache.capacity, val); 1784 break; 1785 case POWER_SUPPLY_PROP_CAPACITY_LEVEL: 1786 ret = bq27xxx_battery_capacity_level(di, val); 1787 break; 1788 case POWER_SUPPLY_PROP_TEMP: 1789 ret = bq27xxx_simple_value(di->cache.temperature, val); 1790 if (ret == 0) 1791 val->intval -= 2731; /* convert decidegree k to c */ 1792 break; 1793 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW: 1794 ret = bq27xxx_simple_value(di->cache.time_to_empty, val); 1795 break; 1796 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG: 1797 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val); 1798 break; 1799 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW: 1800 ret = bq27xxx_simple_value(di->cache.time_to_full, val); 1801 break; 1802 case POWER_SUPPLY_PROP_TECHNOLOGY: 1803 val->intval = POWER_SUPPLY_TECHNOLOGY_LION; 1804 break; 1805 case POWER_SUPPLY_PROP_CHARGE_NOW: 1806 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val); 1807 break; 1808 case POWER_SUPPLY_PROP_CHARGE_FULL: 1809 ret = bq27xxx_simple_value(di->cache.charge_full, val); 1810 break; 1811 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN: 1812 ret = bq27xxx_simple_value(di->charge_design_full, val); 1813 break; 1814 /* 1815 * TODO: Implement these to make registers set from 1816 * power_supply_battery_info visible in sysfs. 1817 */ 1818 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN: 1819 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: 1820 return -EINVAL; 1821 case POWER_SUPPLY_PROP_CYCLE_COUNT: 1822 ret = bq27xxx_simple_value(di->cache.cycle_count, val); 1823 break; 1824 case POWER_SUPPLY_PROP_ENERGY_NOW: 1825 ret = bq27xxx_simple_value(di->cache.energy, val); 1826 break; 1827 case POWER_SUPPLY_PROP_POWER_AVG: 1828 ret = bq27xxx_simple_value(di->cache.power_avg, val); 1829 break; 1830 case POWER_SUPPLY_PROP_HEALTH: 1831 ret = bq27xxx_simple_value(di->cache.health, val); 1832 break; 1833 case POWER_SUPPLY_PROP_MANUFACTURER: 1834 val->strval = BQ27XXX_MANUFACTURER; 1835 break; 1836 default: 1837 return -EINVAL; 1838 } 1839 1840 return ret; 1841 } 1842 1843 static void bq27xxx_external_power_changed(struct power_supply *psy) 1844 { 1845 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy); 1846 1847 cancel_delayed_work_sync(&di->work); 1848 schedule_delayed_work(&di->work, 0); 1849 } 1850 1851 int bq27xxx_battery_setup(struct bq27xxx_device_info *di) 1852 { 1853 struct power_supply_desc *psy_desc; 1854 struct power_supply_config psy_cfg = { 1855 .of_node = di->dev->of_node, 1856 .drv_data = di, 1857 }; 1858 1859 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll); 1860 mutex_init(&di->lock); 1861 1862 di->regs = bq27xxx_chip_data[di->chip].regs; 1863 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key; 1864 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs; 1865 di->opts = bq27xxx_chip_data[di->chip].opts; 1866 1867 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL); 1868 if (!psy_desc) 1869 return -ENOMEM; 1870 1871 psy_desc->name = di->name; 1872 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY; 1873 psy_desc->properties = bq27xxx_chip_data[di->chip].props; 1874 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size; 1875 psy_desc->get_property = bq27xxx_battery_get_property; 1876 psy_desc->external_power_changed = bq27xxx_external_power_changed; 1877 1878 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg); 1879 if (IS_ERR(di->bat)) { 1880 dev_err(di->dev, "failed to register battery\n"); 1881 return PTR_ERR(di->bat); 1882 } 1883 1884 bq27xxx_battery_settings(di); 1885 bq27xxx_battery_update(di); 1886 1887 mutex_lock(&bq27xxx_list_lock); 1888 list_add(&di->list, &bq27xxx_battery_devices); 1889 mutex_unlock(&bq27xxx_list_lock); 1890 1891 return 0; 1892 } 1893 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup); 1894 1895 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di) 1896 { 1897 /* 1898 * power_supply_unregister call bq27xxx_battery_get_property which 1899 * call bq27xxx_battery_poll. 1900 * Make sure that bq27xxx_battery_poll will not call 1901 * schedule_delayed_work again after unregister (which cause OOPS). 1902 */ 1903 poll_interval = 0; 1904 1905 cancel_delayed_work_sync(&di->work); 1906 1907 power_supply_unregister(di->bat); 1908 1909 mutex_lock(&bq27xxx_list_lock); 1910 list_del(&di->list); 1911 mutex_unlock(&bq27xxx_list_lock); 1912 1913 mutex_destroy(&di->lock); 1914 } 1915 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown); 1916 1917 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); 1918 MODULE_DESCRIPTION("BQ27xxx battery monitor driver"); 1919 MODULE_LICENSE("GPL"); 1920