1 /*
2  * BQ27xxx battery driver
3  *
4  * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
5  * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
6  * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
7  * Copyright (C) 2011 Pali Rohár <pali.rohar@gmail.com>
8  * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
9  *
10  * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
11  *
12  * This package is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19  *
20  * Datasheets:
21  * http://www.ti.com/product/bq27000
22  * http://www.ti.com/product/bq27200
23  * http://www.ti.com/product/bq27010
24  * http://www.ti.com/product/bq27210
25  * http://www.ti.com/product/bq27500
26  * http://www.ti.com/product/bq27510-g1
27  * http://www.ti.com/product/bq27510-g2
28  * http://www.ti.com/product/bq27510-g3
29  * http://www.ti.com/product/bq27520-g1
30  * http://www.ti.com/product/bq27520-g2
31  * http://www.ti.com/product/bq27520-g3
32  * http://www.ti.com/product/bq27520-g4
33  * http://www.ti.com/product/bq27530-g1
34  * http://www.ti.com/product/bq27531-g1
35  * http://www.ti.com/product/bq27541-g1
36  * http://www.ti.com/product/bq27542-g1
37  * http://www.ti.com/product/bq27546-g1
38  * http://www.ti.com/product/bq27742-g1
39  * http://www.ti.com/product/bq27545-g1
40  * http://www.ti.com/product/bq27421-g1
41  * http://www.ti.com/product/bq27425-g1
42  * http://www.ti.com/product/bq27426
43  * http://www.ti.com/product/bq27411-g1
44  * http://www.ti.com/product/bq27441-g1
45  * http://www.ti.com/product/bq27621-g1
46  */
47 
48 #include <linux/device.h>
49 #include <linux/module.h>
50 #include <linux/mutex.h>
51 #include <linux/param.h>
52 #include <linux/jiffies.h>
53 #include <linux/workqueue.h>
54 #include <linux/delay.h>
55 #include <linux/platform_device.h>
56 #include <linux/power_supply.h>
57 #include <linux/slab.h>
58 #include <linux/of.h>
59 
60 #include <linux/power/bq27xxx_battery.h>
61 
62 #define BQ27XXX_MANUFACTURER	"Texas Instruments"
63 
64 /* BQ27XXX Flags */
65 #define BQ27XXX_FLAG_DSC	BIT(0)
66 #define BQ27XXX_FLAG_SOCF	BIT(1) /* State-of-Charge threshold final */
67 #define BQ27XXX_FLAG_SOC1	BIT(2) /* State-of-Charge threshold 1 */
68 #define BQ27XXX_FLAG_CFGUP	BIT(4)
69 #define BQ27XXX_FLAG_FC		BIT(9)
70 #define BQ27XXX_FLAG_OTD	BIT(14)
71 #define BQ27XXX_FLAG_OTC	BIT(15)
72 #define BQ27XXX_FLAG_UT		BIT(14)
73 #define BQ27XXX_FLAG_OT		BIT(15)
74 
75 /* BQ27000 has different layout for Flags register */
76 #define BQ27000_FLAG_EDVF	BIT(0) /* Final End-of-Discharge-Voltage flag */
77 #define BQ27000_FLAG_EDV1	BIT(1) /* First End-of-Discharge-Voltage flag */
78 #define BQ27000_FLAG_CI		BIT(4) /* Capacity Inaccurate flag */
79 #define BQ27000_FLAG_FC		BIT(5)
80 #define BQ27000_FLAG_CHGS	BIT(7) /* Charge state flag */
81 
82 /* control register params */
83 #define BQ27XXX_SEALED			0x20
84 #define BQ27XXX_SET_CFGUPDATE		0x13
85 #define BQ27XXX_SOFT_RESET		0x42
86 #define BQ27XXX_RESET			0x41
87 
88 #define BQ27XXX_RS			(20) /* Resistor sense mOhm */
89 #define BQ27XXX_POWER_CONSTANT		(29200) /* 29.2 µV^2 * 1000 */
90 #define BQ27XXX_CURRENT_CONSTANT	(3570) /* 3.57 µV * 1000 */
91 
92 #define INVALID_REG_ADDR	0xff
93 
94 /*
95  * bq27xxx_reg_index - Register names
96  *
97  * These are indexes into a device's register mapping array.
98  */
99 
100 enum bq27xxx_reg_index {
101 	BQ27XXX_REG_CTRL = 0,	/* Control */
102 	BQ27XXX_REG_TEMP,	/* Temperature */
103 	BQ27XXX_REG_INT_TEMP,	/* Internal Temperature */
104 	BQ27XXX_REG_VOLT,	/* Voltage */
105 	BQ27XXX_REG_AI,		/* Average Current */
106 	BQ27XXX_REG_FLAGS,	/* Flags */
107 	BQ27XXX_REG_TTE,	/* Time-to-Empty */
108 	BQ27XXX_REG_TTF,	/* Time-to-Full */
109 	BQ27XXX_REG_TTES,	/* Time-to-Empty Standby */
110 	BQ27XXX_REG_TTECP,	/* Time-to-Empty at Constant Power */
111 	BQ27XXX_REG_NAC,	/* Nominal Available Capacity */
112 	BQ27XXX_REG_FCC,	/* Full Charge Capacity */
113 	BQ27XXX_REG_CYCT,	/* Cycle Count */
114 	BQ27XXX_REG_AE,		/* Available Energy */
115 	BQ27XXX_REG_SOC,	/* State-of-Charge */
116 	BQ27XXX_REG_DCAP,	/* Design Capacity */
117 	BQ27XXX_REG_AP,		/* Average Power */
118 	BQ27XXX_DM_CTRL,	/* Block Data Control */
119 	BQ27XXX_DM_CLASS,	/* Data Class */
120 	BQ27XXX_DM_BLOCK,	/* Data Block */
121 	BQ27XXX_DM_DATA,	/* Block Data */
122 	BQ27XXX_DM_CKSUM,	/* Block Data Checksum */
123 	BQ27XXX_REG_MAX,	/* sentinel */
124 };
125 
126 #define BQ27XXX_DM_REG_ROWS \
127 	[BQ27XXX_DM_CTRL] = 0x61,  \
128 	[BQ27XXX_DM_CLASS] = 0x3e, \
129 	[BQ27XXX_DM_BLOCK] = 0x3f, \
130 	[BQ27XXX_DM_DATA] = 0x40,  \
131 	[BQ27XXX_DM_CKSUM] = 0x60
132 
133 /* Register mappings */
134 static u8
135 	bq27000_regs[BQ27XXX_REG_MAX] = {
136 		[BQ27XXX_REG_CTRL] = 0x00,
137 		[BQ27XXX_REG_TEMP] = 0x06,
138 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
139 		[BQ27XXX_REG_VOLT] = 0x08,
140 		[BQ27XXX_REG_AI] = 0x14,
141 		[BQ27XXX_REG_FLAGS] = 0x0a,
142 		[BQ27XXX_REG_TTE] = 0x16,
143 		[BQ27XXX_REG_TTF] = 0x18,
144 		[BQ27XXX_REG_TTES] = 0x1c,
145 		[BQ27XXX_REG_TTECP] = 0x26,
146 		[BQ27XXX_REG_NAC] = 0x0c,
147 		[BQ27XXX_REG_FCC] = 0x12,
148 		[BQ27XXX_REG_CYCT] = 0x2a,
149 		[BQ27XXX_REG_AE] = 0x22,
150 		[BQ27XXX_REG_SOC] = 0x0b,
151 		[BQ27XXX_REG_DCAP] = 0x76,
152 		[BQ27XXX_REG_AP] = 0x24,
153 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
154 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
155 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
156 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
157 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
158 	},
159 	bq27010_regs[BQ27XXX_REG_MAX] = {
160 		[BQ27XXX_REG_CTRL] = 0x00,
161 		[BQ27XXX_REG_TEMP] = 0x06,
162 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
163 		[BQ27XXX_REG_VOLT] = 0x08,
164 		[BQ27XXX_REG_AI] = 0x14,
165 		[BQ27XXX_REG_FLAGS] = 0x0a,
166 		[BQ27XXX_REG_TTE] = 0x16,
167 		[BQ27XXX_REG_TTF] = 0x18,
168 		[BQ27XXX_REG_TTES] = 0x1c,
169 		[BQ27XXX_REG_TTECP] = 0x26,
170 		[BQ27XXX_REG_NAC] = 0x0c,
171 		[BQ27XXX_REG_FCC] = 0x12,
172 		[BQ27XXX_REG_CYCT] = 0x2a,
173 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
174 		[BQ27XXX_REG_SOC] = 0x0b,
175 		[BQ27XXX_REG_DCAP] = 0x76,
176 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
177 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
178 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
179 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
180 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
181 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
182 	},
183 	bq2750x_regs[BQ27XXX_REG_MAX] = {
184 		[BQ27XXX_REG_CTRL] = 0x00,
185 		[BQ27XXX_REG_TEMP] = 0x06,
186 		[BQ27XXX_REG_INT_TEMP] = 0x28,
187 		[BQ27XXX_REG_VOLT] = 0x08,
188 		[BQ27XXX_REG_AI] = 0x14,
189 		[BQ27XXX_REG_FLAGS] = 0x0a,
190 		[BQ27XXX_REG_TTE] = 0x16,
191 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
192 		[BQ27XXX_REG_TTES] = 0x1a,
193 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
194 		[BQ27XXX_REG_NAC] = 0x0c,
195 		[BQ27XXX_REG_FCC] = 0x12,
196 		[BQ27XXX_REG_CYCT] = 0x2a,
197 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
198 		[BQ27XXX_REG_SOC] = 0x2c,
199 		[BQ27XXX_REG_DCAP] = 0x3c,
200 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
201 		BQ27XXX_DM_REG_ROWS,
202 	},
203 #define bq2751x_regs bq27510g3_regs
204 #define bq2752x_regs bq27510g3_regs
205 	bq27500_regs[BQ27XXX_REG_MAX] = {
206 		[BQ27XXX_REG_CTRL] = 0x00,
207 		[BQ27XXX_REG_TEMP] = 0x06,
208 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
209 		[BQ27XXX_REG_VOLT] = 0x08,
210 		[BQ27XXX_REG_AI] = 0x14,
211 		[BQ27XXX_REG_FLAGS] = 0x0a,
212 		[BQ27XXX_REG_TTE] = 0x16,
213 		[BQ27XXX_REG_TTF] = 0x18,
214 		[BQ27XXX_REG_TTES] = 0x1c,
215 		[BQ27XXX_REG_TTECP] = 0x26,
216 		[BQ27XXX_REG_NAC] = 0x0c,
217 		[BQ27XXX_REG_FCC] = 0x12,
218 		[BQ27XXX_REG_CYCT] = 0x2a,
219 		[BQ27XXX_REG_AE] = 0x22,
220 		[BQ27XXX_REG_SOC] = 0x2c,
221 		[BQ27XXX_REG_DCAP] = 0x3c,
222 		[BQ27XXX_REG_AP] = 0x24,
223 		BQ27XXX_DM_REG_ROWS,
224 	},
225 #define bq27510g1_regs bq27500_regs
226 #define bq27510g2_regs bq27500_regs
227 	bq27510g3_regs[BQ27XXX_REG_MAX] = {
228 		[BQ27XXX_REG_CTRL] = 0x00,
229 		[BQ27XXX_REG_TEMP] = 0x06,
230 		[BQ27XXX_REG_INT_TEMP] = 0x28,
231 		[BQ27XXX_REG_VOLT] = 0x08,
232 		[BQ27XXX_REG_AI] = 0x14,
233 		[BQ27XXX_REG_FLAGS] = 0x0a,
234 		[BQ27XXX_REG_TTE] = 0x16,
235 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
236 		[BQ27XXX_REG_TTES] = 0x1a,
237 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
238 		[BQ27XXX_REG_NAC] = 0x0c,
239 		[BQ27XXX_REG_FCC] = 0x12,
240 		[BQ27XXX_REG_CYCT] = 0x1e,
241 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
242 		[BQ27XXX_REG_SOC] = 0x20,
243 		[BQ27XXX_REG_DCAP] = 0x2e,
244 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
245 		BQ27XXX_DM_REG_ROWS,
246 	},
247 	bq27520g1_regs[BQ27XXX_REG_MAX] = {
248 		[BQ27XXX_REG_CTRL] = 0x00,
249 		[BQ27XXX_REG_TEMP] = 0x06,
250 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
251 		[BQ27XXX_REG_VOLT] = 0x08,
252 		[BQ27XXX_REG_AI] = 0x14,
253 		[BQ27XXX_REG_FLAGS] = 0x0a,
254 		[BQ27XXX_REG_TTE] = 0x16,
255 		[BQ27XXX_REG_TTF] = 0x18,
256 		[BQ27XXX_REG_TTES] = 0x1c,
257 		[BQ27XXX_REG_TTECP] = 0x26,
258 		[BQ27XXX_REG_NAC] = 0x0c,
259 		[BQ27XXX_REG_FCC] = 0x12,
260 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
261 		[BQ27XXX_REG_AE] = 0x22,
262 		[BQ27XXX_REG_SOC] = 0x2c,
263 		[BQ27XXX_REG_DCAP] = 0x3c,
264 		[BQ27XXX_REG_AP] = 0x24,
265 		BQ27XXX_DM_REG_ROWS,
266 	},
267 	bq27520g2_regs[BQ27XXX_REG_MAX] = {
268 		[BQ27XXX_REG_CTRL] = 0x00,
269 		[BQ27XXX_REG_TEMP] = 0x06,
270 		[BQ27XXX_REG_INT_TEMP] = 0x36,
271 		[BQ27XXX_REG_VOLT] = 0x08,
272 		[BQ27XXX_REG_AI] = 0x14,
273 		[BQ27XXX_REG_FLAGS] = 0x0a,
274 		[BQ27XXX_REG_TTE] = 0x16,
275 		[BQ27XXX_REG_TTF] = 0x18,
276 		[BQ27XXX_REG_TTES] = 0x1c,
277 		[BQ27XXX_REG_TTECP] = 0x26,
278 		[BQ27XXX_REG_NAC] = 0x0c,
279 		[BQ27XXX_REG_FCC] = 0x12,
280 		[BQ27XXX_REG_CYCT] = 0x2a,
281 		[BQ27XXX_REG_AE] = 0x22,
282 		[BQ27XXX_REG_SOC] = 0x2c,
283 		[BQ27XXX_REG_DCAP] = 0x3c,
284 		[BQ27XXX_REG_AP] = 0x24,
285 		BQ27XXX_DM_REG_ROWS,
286 	},
287 	bq27520g3_regs[BQ27XXX_REG_MAX] = {
288 		[BQ27XXX_REG_CTRL] = 0x00,
289 		[BQ27XXX_REG_TEMP] = 0x06,
290 		[BQ27XXX_REG_INT_TEMP] = 0x36,
291 		[BQ27XXX_REG_VOLT] = 0x08,
292 		[BQ27XXX_REG_AI] = 0x14,
293 		[BQ27XXX_REG_FLAGS] = 0x0a,
294 		[BQ27XXX_REG_TTE] = 0x16,
295 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
296 		[BQ27XXX_REG_TTES] = 0x1c,
297 		[BQ27XXX_REG_TTECP] = 0x26,
298 		[BQ27XXX_REG_NAC] = 0x0c,
299 		[BQ27XXX_REG_FCC] = 0x12,
300 		[BQ27XXX_REG_CYCT] = 0x2a,
301 		[BQ27XXX_REG_AE] = 0x22,
302 		[BQ27XXX_REG_SOC] = 0x2c,
303 		[BQ27XXX_REG_DCAP] = 0x3c,
304 		[BQ27XXX_REG_AP] = 0x24,
305 		BQ27XXX_DM_REG_ROWS,
306 	},
307 	bq27520g4_regs[BQ27XXX_REG_MAX] = {
308 		[BQ27XXX_REG_CTRL] = 0x00,
309 		[BQ27XXX_REG_TEMP] = 0x06,
310 		[BQ27XXX_REG_INT_TEMP] = 0x28,
311 		[BQ27XXX_REG_VOLT] = 0x08,
312 		[BQ27XXX_REG_AI] = 0x14,
313 		[BQ27XXX_REG_FLAGS] = 0x0a,
314 		[BQ27XXX_REG_TTE] = 0x16,
315 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
316 		[BQ27XXX_REG_TTES] = 0x1c,
317 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
318 		[BQ27XXX_REG_NAC] = 0x0c,
319 		[BQ27XXX_REG_FCC] = 0x12,
320 		[BQ27XXX_REG_CYCT] = 0x1e,
321 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
322 		[BQ27XXX_REG_SOC] = 0x20,
323 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
324 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
325 		BQ27XXX_DM_REG_ROWS,
326 	},
327 	bq27521_regs[BQ27XXX_REG_MAX] = {
328 		[BQ27XXX_REG_CTRL] = 0x02,
329 		[BQ27XXX_REG_TEMP] = 0x0a,
330 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
331 		[BQ27XXX_REG_VOLT] = 0x0c,
332 		[BQ27XXX_REG_AI] = 0x0e,
333 		[BQ27XXX_REG_FLAGS] = 0x08,
334 		[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
335 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
336 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
337 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
338 		[BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
339 		[BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
340 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
341 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
342 		[BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
343 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
344 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
345 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
346 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
347 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
348 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
349 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
350 	},
351 	bq27530_regs[BQ27XXX_REG_MAX] = {
352 		[BQ27XXX_REG_CTRL] = 0x00,
353 		[BQ27XXX_REG_TEMP] = 0x06,
354 		[BQ27XXX_REG_INT_TEMP] = 0x32,
355 		[BQ27XXX_REG_VOLT] = 0x08,
356 		[BQ27XXX_REG_AI] = 0x14,
357 		[BQ27XXX_REG_FLAGS] = 0x0a,
358 		[BQ27XXX_REG_TTE] = 0x16,
359 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
360 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
361 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
362 		[BQ27XXX_REG_NAC] = 0x0c,
363 		[BQ27XXX_REG_FCC] = 0x12,
364 		[BQ27XXX_REG_CYCT] = 0x2a,
365 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
366 		[BQ27XXX_REG_SOC] = 0x2c,
367 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
368 		[BQ27XXX_REG_AP] = 0x24,
369 		BQ27XXX_DM_REG_ROWS,
370 	},
371 #define bq27531_regs bq27530_regs
372 	bq27541_regs[BQ27XXX_REG_MAX] = {
373 		[BQ27XXX_REG_CTRL] = 0x00,
374 		[BQ27XXX_REG_TEMP] = 0x06,
375 		[BQ27XXX_REG_INT_TEMP] = 0x28,
376 		[BQ27XXX_REG_VOLT] = 0x08,
377 		[BQ27XXX_REG_AI] = 0x14,
378 		[BQ27XXX_REG_FLAGS] = 0x0a,
379 		[BQ27XXX_REG_TTE] = 0x16,
380 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
381 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
382 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
383 		[BQ27XXX_REG_NAC] = 0x0c,
384 		[BQ27XXX_REG_FCC] = 0x12,
385 		[BQ27XXX_REG_CYCT] = 0x2a,
386 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
387 		[BQ27XXX_REG_SOC] = 0x2c,
388 		[BQ27XXX_REG_DCAP] = 0x3c,
389 		[BQ27XXX_REG_AP] = 0x24,
390 		BQ27XXX_DM_REG_ROWS,
391 	},
392 #define bq27542_regs bq27541_regs
393 #define bq27546_regs bq27541_regs
394 #define bq27742_regs bq27541_regs
395 	bq27545_regs[BQ27XXX_REG_MAX] = {
396 		[BQ27XXX_REG_CTRL] = 0x00,
397 		[BQ27XXX_REG_TEMP] = 0x06,
398 		[BQ27XXX_REG_INT_TEMP] = 0x28,
399 		[BQ27XXX_REG_VOLT] = 0x08,
400 		[BQ27XXX_REG_AI] = 0x14,
401 		[BQ27XXX_REG_FLAGS] = 0x0a,
402 		[BQ27XXX_REG_TTE] = 0x16,
403 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
404 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
405 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
406 		[BQ27XXX_REG_NAC] = 0x0c,
407 		[BQ27XXX_REG_FCC] = 0x12,
408 		[BQ27XXX_REG_CYCT] = 0x2a,
409 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
410 		[BQ27XXX_REG_SOC] = 0x2c,
411 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
412 		[BQ27XXX_REG_AP] = 0x24,
413 		BQ27XXX_DM_REG_ROWS,
414 	},
415 	bq27421_regs[BQ27XXX_REG_MAX] = {
416 		[BQ27XXX_REG_CTRL] = 0x00,
417 		[BQ27XXX_REG_TEMP] = 0x02,
418 		[BQ27XXX_REG_INT_TEMP] = 0x1e,
419 		[BQ27XXX_REG_VOLT] = 0x04,
420 		[BQ27XXX_REG_AI] = 0x10,
421 		[BQ27XXX_REG_FLAGS] = 0x06,
422 		[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
423 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
424 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
425 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
426 		[BQ27XXX_REG_NAC] = 0x08,
427 		[BQ27XXX_REG_FCC] = 0x0e,
428 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
429 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
430 		[BQ27XXX_REG_SOC] = 0x1c,
431 		[BQ27XXX_REG_DCAP] = 0x3c,
432 		[BQ27XXX_REG_AP] = 0x18,
433 		BQ27XXX_DM_REG_ROWS,
434 	};
435 #define bq27411_regs bq27421_regs
436 #define bq27425_regs bq27421_regs
437 #define bq27426_regs bq27421_regs
438 #define bq27441_regs bq27421_regs
439 #define bq27621_regs bq27421_regs
440 
441 static enum power_supply_property bq27000_props[] = {
442 	POWER_SUPPLY_PROP_STATUS,
443 	POWER_SUPPLY_PROP_PRESENT,
444 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
445 	POWER_SUPPLY_PROP_CURRENT_NOW,
446 	POWER_SUPPLY_PROP_CAPACITY,
447 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
448 	POWER_SUPPLY_PROP_TEMP,
449 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
450 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
451 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
452 	POWER_SUPPLY_PROP_TECHNOLOGY,
453 	POWER_SUPPLY_PROP_CHARGE_FULL,
454 	POWER_SUPPLY_PROP_CHARGE_NOW,
455 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
456 	POWER_SUPPLY_PROP_CYCLE_COUNT,
457 	POWER_SUPPLY_PROP_ENERGY_NOW,
458 	POWER_SUPPLY_PROP_POWER_AVG,
459 	POWER_SUPPLY_PROP_HEALTH,
460 	POWER_SUPPLY_PROP_MANUFACTURER,
461 };
462 
463 static enum power_supply_property bq27010_props[] = {
464 	POWER_SUPPLY_PROP_STATUS,
465 	POWER_SUPPLY_PROP_PRESENT,
466 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
467 	POWER_SUPPLY_PROP_CURRENT_NOW,
468 	POWER_SUPPLY_PROP_CAPACITY,
469 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
470 	POWER_SUPPLY_PROP_TEMP,
471 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
472 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
473 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
474 	POWER_SUPPLY_PROP_TECHNOLOGY,
475 	POWER_SUPPLY_PROP_CHARGE_FULL,
476 	POWER_SUPPLY_PROP_CHARGE_NOW,
477 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
478 	POWER_SUPPLY_PROP_CYCLE_COUNT,
479 	POWER_SUPPLY_PROP_HEALTH,
480 	POWER_SUPPLY_PROP_MANUFACTURER,
481 };
482 
483 #define bq2750x_props bq27510g3_props
484 #define bq2751x_props bq27510g3_props
485 #define bq2752x_props bq27510g3_props
486 
487 static enum power_supply_property bq27500_props[] = {
488 	POWER_SUPPLY_PROP_STATUS,
489 	POWER_SUPPLY_PROP_PRESENT,
490 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
491 	POWER_SUPPLY_PROP_CURRENT_NOW,
492 	POWER_SUPPLY_PROP_CAPACITY,
493 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
494 	POWER_SUPPLY_PROP_TEMP,
495 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
496 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
497 	POWER_SUPPLY_PROP_TECHNOLOGY,
498 	POWER_SUPPLY_PROP_CHARGE_FULL,
499 	POWER_SUPPLY_PROP_CHARGE_NOW,
500 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
501 	POWER_SUPPLY_PROP_CYCLE_COUNT,
502 	POWER_SUPPLY_PROP_ENERGY_NOW,
503 	POWER_SUPPLY_PROP_POWER_AVG,
504 	POWER_SUPPLY_PROP_HEALTH,
505 	POWER_SUPPLY_PROP_MANUFACTURER,
506 };
507 #define bq27510g1_props bq27500_props
508 #define bq27510g2_props bq27500_props
509 
510 static enum power_supply_property bq27510g3_props[] = {
511 	POWER_SUPPLY_PROP_STATUS,
512 	POWER_SUPPLY_PROP_PRESENT,
513 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
514 	POWER_SUPPLY_PROP_CURRENT_NOW,
515 	POWER_SUPPLY_PROP_CAPACITY,
516 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
517 	POWER_SUPPLY_PROP_TEMP,
518 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
519 	POWER_SUPPLY_PROP_TECHNOLOGY,
520 	POWER_SUPPLY_PROP_CHARGE_FULL,
521 	POWER_SUPPLY_PROP_CHARGE_NOW,
522 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
523 	POWER_SUPPLY_PROP_CYCLE_COUNT,
524 	POWER_SUPPLY_PROP_HEALTH,
525 	POWER_SUPPLY_PROP_MANUFACTURER,
526 };
527 
528 static enum power_supply_property bq27520g1_props[] = {
529 	POWER_SUPPLY_PROP_STATUS,
530 	POWER_SUPPLY_PROP_PRESENT,
531 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
532 	POWER_SUPPLY_PROP_CURRENT_NOW,
533 	POWER_SUPPLY_PROP_CAPACITY,
534 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
535 	POWER_SUPPLY_PROP_TEMP,
536 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
537 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
538 	POWER_SUPPLY_PROP_TECHNOLOGY,
539 	POWER_SUPPLY_PROP_CHARGE_FULL,
540 	POWER_SUPPLY_PROP_CHARGE_NOW,
541 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
542 	POWER_SUPPLY_PROP_ENERGY_NOW,
543 	POWER_SUPPLY_PROP_POWER_AVG,
544 	POWER_SUPPLY_PROP_HEALTH,
545 	POWER_SUPPLY_PROP_MANUFACTURER,
546 };
547 
548 #define bq27520g2_props bq27500_props
549 
550 static enum power_supply_property bq27520g3_props[] = {
551 	POWER_SUPPLY_PROP_STATUS,
552 	POWER_SUPPLY_PROP_PRESENT,
553 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
554 	POWER_SUPPLY_PROP_CURRENT_NOW,
555 	POWER_SUPPLY_PROP_CAPACITY,
556 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
557 	POWER_SUPPLY_PROP_TEMP,
558 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
559 	POWER_SUPPLY_PROP_TECHNOLOGY,
560 	POWER_SUPPLY_PROP_CHARGE_FULL,
561 	POWER_SUPPLY_PROP_CHARGE_NOW,
562 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
563 	POWER_SUPPLY_PROP_CYCLE_COUNT,
564 	POWER_SUPPLY_PROP_ENERGY_NOW,
565 	POWER_SUPPLY_PROP_POWER_AVG,
566 	POWER_SUPPLY_PROP_HEALTH,
567 	POWER_SUPPLY_PROP_MANUFACTURER,
568 };
569 
570 static enum power_supply_property bq27520g4_props[] = {
571 	POWER_SUPPLY_PROP_STATUS,
572 	POWER_SUPPLY_PROP_PRESENT,
573 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
574 	POWER_SUPPLY_PROP_CURRENT_NOW,
575 	POWER_SUPPLY_PROP_CAPACITY,
576 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
577 	POWER_SUPPLY_PROP_TEMP,
578 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
579 	POWER_SUPPLY_PROP_TECHNOLOGY,
580 	POWER_SUPPLY_PROP_CHARGE_FULL,
581 	POWER_SUPPLY_PROP_CHARGE_NOW,
582 	POWER_SUPPLY_PROP_CYCLE_COUNT,
583 	POWER_SUPPLY_PROP_HEALTH,
584 	POWER_SUPPLY_PROP_MANUFACTURER,
585 };
586 
587 static enum power_supply_property bq27521_props[] = {
588 	POWER_SUPPLY_PROP_STATUS,
589 	POWER_SUPPLY_PROP_PRESENT,
590 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
591 	POWER_SUPPLY_PROP_CURRENT_NOW,
592 	POWER_SUPPLY_PROP_TEMP,
593 	POWER_SUPPLY_PROP_TECHNOLOGY,
594 };
595 
596 static enum power_supply_property bq27530_props[] = {
597 	POWER_SUPPLY_PROP_STATUS,
598 	POWER_SUPPLY_PROP_PRESENT,
599 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
600 	POWER_SUPPLY_PROP_CURRENT_NOW,
601 	POWER_SUPPLY_PROP_CAPACITY,
602 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
603 	POWER_SUPPLY_PROP_TEMP,
604 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
605 	POWER_SUPPLY_PROP_TECHNOLOGY,
606 	POWER_SUPPLY_PROP_CHARGE_FULL,
607 	POWER_SUPPLY_PROP_CHARGE_NOW,
608 	POWER_SUPPLY_PROP_POWER_AVG,
609 	POWER_SUPPLY_PROP_HEALTH,
610 	POWER_SUPPLY_PROP_CYCLE_COUNT,
611 	POWER_SUPPLY_PROP_MANUFACTURER,
612 };
613 #define bq27531_props bq27530_props
614 
615 static enum power_supply_property bq27541_props[] = {
616 	POWER_SUPPLY_PROP_STATUS,
617 	POWER_SUPPLY_PROP_PRESENT,
618 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
619 	POWER_SUPPLY_PROP_CURRENT_NOW,
620 	POWER_SUPPLY_PROP_CAPACITY,
621 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
622 	POWER_SUPPLY_PROP_TEMP,
623 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
624 	POWER_SUPPLY_PROP_TECHNOLOGY,
625 	POWER_SUPPLY_PROP_CHARGE_FULL,
626 	POWER_SUPPLY_PROP_CHARGE_NOW,
627 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
628 	POWER_SUPPLY_PROP_CYCLE_COUNT,
629 	POWER_SUPPLY_PROP_POWER_AVG,
630 	POWER_SUPPLY_PROP_HEALTH,
631 	POWER_SUPPLY_PROP_MANUFACTURER,
632 };
633 #define bq27542_props bq27541_props
634 #define bq27546_props bq27541_props
635 #define bq27742_props bq27541_props
636 
637 static enum power_supply_property bq27545_props[] = {
638 	POWER_SUPPLY_PROP_STATUS,
639 	POWER_SUPPLY_PROP_PRESENT,
640 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
641 	POWER_SUPPLY_PROP_CURRENT_NOW,
642 	POWER_SUPPLY_PROP_CAPACITY,
643 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
644 	POWER_SUPPLY_PROP_TEMP,
645 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
646 	POWER_SUPPLY_PROP_TECHNOLOGY,
647 	POWER_SUPPLY_PROP_CHARGE_FULL,
648 	POWER_SUPPLY_PROP_CHARGE_NOW,
649 	POWER_SUPPLY_PROP_HEALTH,
650 	POWER_SUPPLY_PROP_CYCLE_COUNT,
651 	POWER_SUPPLY_PROP_POWER_AVG,
652 	POWER_SUPPLY_PROP_MANUFACTURER,
653 };
654 
655 static enum power_supply_property bq27421_props[] = {
656 	POWER_SUPPLY_PROP_STATUS,
657 	POWER_SUPPLY_PROP_PRESENT,
658 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
659 	POWER_SUPPLY_PROP_CURRENT_NOW,
660 	POWER_SUPPLY_PROP_CAPACITY,
661 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
662 	POWER_SUPPLY_PROP_TEMP,
663 	POWER_SUPPLY_PROP_TECHNOLOGY,
664 	POWER_SUPPLY_PROP_CHARGE_FULL,
665 	POWER_SUPPLY_PROP_CHARGE_NOW,
666 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
667 	POWER_SUPPLY_PROP_MANUFACTURER,
668 };
669 #define bq27411_props bq27421_props
670 #define bq27425_props bq27421_props
671 #define bq27426_props bq27421_props
672 #define bq27441_props bq27421_props
673 #define bq27621_props bq27421_props
674 
675 struct bq27xxx_dm_reg {
676 	u8 subclass_id;
677 	u8 offset;
678 	u8 bytes;
679 	u16 min, max;
680 };
681 
682 enum bq27xxx_dm_reg_id {
683 	BQ27XXX_DM_DESIGN_CAPACITY = 0,
684 	BQ27XXX_DM_DESIGN_ENERGY,
685 	BQ27XXX_DM_TERMINATE_VOLTAGE,
686 };
687 
688 #define bq27000_dm_regs 0
689 #define bq27010_dm_regs 0
690 #define bq2750x_dm_regs 0
691 #define bq2751x_dm_regs 0
692 #define bq2752x_dm_regs 0
693 
694 #if 0 /* not yet tested */
695 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
696 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 10, 2,    0, 65535 },
697 	[BQ27XXX_DM_DESIGN_ENERGY]     = { }, /* missing on chip */
698 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
699 };
700 #else
701 #define bq27500_dm_regs 0
702 #endif
703 
704 /* todo create data memory definitions from datasheets and test on chips */
705 #define bq27510g1_dm_regs 0
706 #define bq27510g2_dm_regs 0
707 #define bq27510g3_dm_regs 0
708 #define bq27520g1_dm_regs 0
709 #define bq27520g2_dm_regs 0
710 #define bq27520g3_dm_regs 0
711 #define bq27520g4_dm_regs 0
712 #define bq27521_dm_regs 0
713 #define bq27530_dm_regs 0
714 #define bq27531_dm_regs 0
715 #define bq27541_dm_regs 0
716 #define bq27542_dm_regs 0
717 #define bq27546_dm_regs 0
718 #define bq27742_dm_regs 0
719 
720 #if 0 /* not yet tested */
721 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
722 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 23, 2,    0, 32767 },
723 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 48, 25, 2,    0, 32767 },
724 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800,  3700 },
725 };
726 #else
727 #define bq27545_dm_regs 0
728 #endif
729 
730 static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
731 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 10, 2,    0, 32767 },
732 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 12, 2,    0, 32767 },
733 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800,  3700 },
734 };
735 
736 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
737 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 10, 2,    0,  8000 },
738 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 12, 2,    0, 32767 },
739 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500,  3700 },
740 };
741 
742 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
743 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 12, 2,    0, 32767 },
744 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 14, 2,    0, 32767 },
745 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800,  3700 },
746 };
747 
748 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
749 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82,  6, 2,    0,  8000 },
750 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82,  8, 2,    0, 32767 },
751 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500,  3700 },
752 };
753 
754 #if 0 /* not yet tested */
755 #define bq27441_dm_regs bq27421_dm_regs
756 #else
757 #define bq27441_dm_regs 0
758 #endif
759 
760 #if 0 /* not yet tested */
761 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
762 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 3, 2,    0,  8000 },
763 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 5, 2,    0, 32767 },
764 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500,  3700 },
765 };
766 #else
767 #define bq27621_dm_regs 0
768 #endif
769 
770 #define BQ27XXX_O_ZERO	0x00000001
771 #define BQ27XXX_O_OTDC	0x00000002 /* has OTC/OTD overtemperature flags */
772 #define BQ27XXX_O_UTOT  0x00000004 /* has OT overtemperature flag */
773 #define BQ27XXX_O_CFGUP	0x00000008
774 #define BQ27XXX_O_RAM	0x00000010
775 
776 #define BQ27XXX_DATA(ref, key, opt) {		\
777 	.opts = (opt),				\
778 	.unseal_key = key,			\
779 	.regs  = ref##_regs,			\
780 	.dm_regs = ref##_dm_regs,		\
781 	.props = ref##_props,			\
782 	.props_size = ARRAY_SIZE(ref##_props) }
783 
784 static struct {
785 	u32 opts;
786 	u32 unseal_key;
787 	u8 *regs;
788 	struct bq27xxx_dm_reg *dm_regs;
789 	enum power_supply_property *props;
790 	size_t props_size;
791 } bq27xxx_chip_data[] = {
792 	[BQ27000]   = BQ27XXX_DATA(bq27000,   0         , BQ27XXX_O_ZERO),
793 	[BQ27010]   = BQ27XXX_DATA(bq27010,   0         , BQ27XXX_O_ZERO),
794 	[BQ2750X]   = BQ27XXX_DATA(bq2750x,   0         , BQ27XXX_O_OTDC),
795 	[BQ2751X]   = BQ27XXX_DATA(bq2751x,   0         , BQ27XXX_O_OTDC),
796 	[BQ2752X]   = BQ27XXX_DATA(bq2752x,   0         , BQ27XXX_O_OTDC),
797 	[BQ27500]   = BQ27XXX_DATA(bq27500,   0x04143672, BQ27XXX_O_OTDC),
798 	[BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0         , BQ27XXX_O_OTDC),
799 	[BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0         , BQ27XXX_O_OTDC),
800 	[BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0         , BQ27XXX_O_OTDC),
801 	[BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0         , BQ27XXX_O_OTDC),
802 	[BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0         , BQ27XXX_O_OTDC),
803 	[BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0         , BQ27XXX_O_OTDC),
804 	[BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0         , BQ27XXX_O_OTDC),
805 	[BQ27521]   = BQ27XXX_DATA(bq27521,   0         , 0),
806 	[BQ27530]   = BQ27XXX_DATA(bq27530,   0         , BQ27XXX_O_UTOT),
807 	[BQ27531]   = BQ27XXX_DATA(bq27531,   0         , BQ27XXX_O_UTOT),
808 	[BQ27541]   = BQ27XXX_DATA(bq27541,   0         , BQ27XXX_O_OTDC),
809 	[BQ27542]   = BQ27XXX_DATA(bq27542,   0         , BQ27XXX_O_OTDC),
810 	[BQ27546]   = BQ27XXX_DATA(bq27546,   0         , BQ27XXX_O_OTDC),
811 	[BQ27742]   = BQ27XXX_DATA(bq27742,   0         , BQ27XXX_O_OTDC),
812 	[BQ27545]   = BQ27XXX_DATA(bq27545,   0x04143672, BQ27XXX_O_OTDC),
813 	[BQ27411]   = BQ27XXX_DATA(bq27411,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
814 	[BQ27421]   = BQ27XXX_DATA(bq27421,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
815 	[BQ27425]   = BQ27XXX_DATA(bq27425,   0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
816 	[BQ27426]   = BQ27XXX_DATA(bq27426,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
817 	[BQ27441]   = BQ27XXX_DATA(bq27441,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
818 	[BQ27621]   = BQ27XXX_DATA(bq27621,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
819 };
820 
821 static DEFINE_MUTEX(bq27xxx_list_lock);
822 static LIST_HEAD(bq27xxx_battery_devices);
823 
824 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
825 
826 #define BQ27XXX_DM_SZ	32
827 
828 /**
829  * struct bq27xxx_dm_buf - chip data memory buffer
830  * @class: data memory subclass_id
831  * @block: data memory block number
832  * @data: data from/for the block
833  * @has_data: true if data has been filled by read
834  * @dirty: true if data has changed since last read/write
835  *
836  * Encapsulates info required to manage chip data memory blocks.
837  */
838 struct bq27xxx_dm_buf {
839 	u8 class;
840 	u8 block;
841 	u8 data[BQ27XXX_DM_SZ];
842 	bool has_data, dirty;
843 };
844 
845 #define BQ27XXX_DM_BUF(di, i) { \
846 	.class = (di)->dm_regs[i].subclass_id, \
847 	.block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
848 }
849 
850 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
851 				      struct bq27xxx_dm_reg *reg)
852 {
853 	if (buf->class == reg->subclass_id &&
854 	    buf->block == reg->offset / BQ27XXX_DM_SZ)
855 		return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
856 
857 	return NULL;
858 }
859 
860 static const char * const bq27xxx_dm_reg_name[] = {
861 	[BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
862 	[BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
863 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
864 };
865 
866 
867 static bool bq27xxx_dt_to_nvm = true;
868 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
869 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
870 	"Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
871 	"Users must set this =0 when installing a different type of battery!\n"
872 	"Default is =1."
873 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
874 	"\nSetting this affects future kernel updates, not the current configuration."
875 #endif
876 );
877 
878 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
879 {
880 	struct bq27xxx_device_info *di;
881 	unsigned int prev_val = *(unsigned int *) kp->arg;
882 	int ret;
883 
884 	ret = param_set_uint(val, kp);
885 	if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
886 		return ret;
887 
888 	mutex_lock(&bq27xxx_list_lock);
889 	list_for_each_entry(di, &bq27xxx_battery_devices, list) {
890 		cancel_delayed_work_sync(&di->work);
891 		schedule_delayed_work(&di->work, 0);
892 	}
893 	mutex_unlock(&bq27xxx_list_lock);
894 
895 	return ret;
896 }
897 
898 static const struct kernel_param_ops param_ops_poll_interval = {
899 	.get = param_get_uint,
900 	.set = poll_interval_param_set,
901 };
902 
903 static unsigned int poll_interval = 360;
904 module_param_cb(poll_interval, &param_ops_poll_interval, &poll_interval, 0644);
905 MODULE_PARM_DESC(poll_interval,
906 		 "battery poll interval in seconds - 0 disables polling");
907 
908 /*
909  * Common code for BQ27xxx devices
910  */
911 
912 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
913 			       bool single)
914 {
915 	int ret;
916 
917 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
918 		return -EINVAL;
919 
920 	ret = di->bus.read(di, di->regs[reg_index], single);
921 	if (ret < 0)
922 		dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
923 			di->regs[reg_index], reg_index);
924 
925 	return ret;
926 }
927 
928 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
929 				u16 value, bool single)
930 {
931 	int ret;
932 
933 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
934 		return -EINVAL;
935 
936 	if (!di->bus.write)
937 		return -EPERM;
938 
939 	ret = di->bus.write(di, di->regs[reg_index], value, single);
940 	if (ret < 0)
941 		dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
942 			di->regs[reg_index], reg_index);
943 
944 	return ret;
945 }
946 
947 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
948 				     u8 *data, int len)
949 {
950 	int ret;
951 
952 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
953 		return -EINVAL;
954 
955 	if (!di->bus.read_bulk)
956 		return -EPERM;
957 
958 	ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
959 	if (ret < 0)
960 		dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
961 			di->regs[reg_index], reg_index);
962 
963 	return ret;
964 }
965 
966 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
967 				      u8 *data, int len)
968 {
969 	int ret;
970 
971 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
972 		return -EINVAL;
973 
974 	if (!di->bus.write_bulk)
975 		return -EPERM;
976 
977 	ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
978 	if (ret < 0)
979 		dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
980 			di->regs[reg_index], reg_index);
981 
982 	return ret;
983 }
984 
985 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
986 {
987 	int ret;
988 
989 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
990 	if (ret < 0) {
991 		dev_err(di->dev, "bus error on seal: %d\n", ret);
992 		return ret;
993 	}
994 
995 	return 0;
996 }
997 
998 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
999 {
1000 	int ret;
1001 
1002 	if (di->unseal_key == 0) {
1003 		dev_err(di->dev, "unseal failed due to missing key\n");
1004 		return -EINVAL;
1005 	}
1006 
1007 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1008 	if (ret < 0)
1009 		goto out;
1010 
1011 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1012 	if (ret < 0)
1013 		goto out;
1014 
1015 	return 0;
1016 
1017 out:
1018 	dev_err(di->dev, "bus error on unseal: %d\n", ret);
1019 	return ret;
1020 }
1021 
1022 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1023 {
1024 	u16 sum = 0;
1025 	int i;
1026 
1027 	for (i = 0; i < BQ27XXX_DM_SZ; i++)
1028 		sum += buf->data[i];
1029 	sum &= 0xff;
1030 
1031 	return 0xff - sum;
1032 }
1033 
1034 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1035 					 struct bq27xxx_dm_buf *buf)
1036 {
1037 	int ret;
1038 
1039 	buf->has_data = false;
1040 
1041 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1042 	if (ret < 0)
1043 		goto out;
1044 
1045 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1046 	if (ret < 0)
1047 		goto out;
1048 
1049 	BQ27XXX_MSLEEP(1);
1050 
1051 	ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1052 	if (ret < 0)
1053 		goto out;
1054 
1055 	ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1056 	if (ret < 0)
1057 		goto out;
1058 
1059 	if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1060 		ret = -EINVAL;
1061 		goto out;
1062 	}
1063 
1064 	buf->has_data = true;
1065 	buf->dirty = false;
1066 
1067 	return 0;
1068 
1069 out:
1070 	dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1071 	return ret;
1072 }
1073 
1074 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1075 					    struct bq27xxx_dm_buf *buf,
1076 					    enum bq27xxx_dm_reg_id reg_id,
1077 					    unsigned int val)
1078 {
1079 	struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1080 	const char *str = bq27xxx_dm_reg_name[reg_id];
1081 	u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1082 
1083 	if (prev == NULL) {
1084 		dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1085 		return;
1086 	}
1087 
1088 	if (reg->bytes != 2) {
1089 		dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1090 		return;
1091 	}
1092 
1093 	if (!buf->has_data)
1094 		return;
1095 
1096 	if (be16_to_cpup(prev) == val) {
1097 		dev_info(di->dev, "%s has %u\n", str, val);
1098 		return;
1099 	}
1100 
1101 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1102 	if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1103 #else
1104 	if (!(di->opts & BQ27XXX_O_RAM)) {
1105 #endif
1106 		/* devicetree and NVM differ; defer to NVM */
1107 		dev_warn(di->dev, "%s has %u; update to %u disallowed "
1108 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1109 			 "by dt_monitored_battery_updates_nvm=0"
1110 #else
1111 			 "for flash/NVM data memory"
1112 #endif
1113 			 "\n", str, be16_to_cpup(prev), val);
1114 		return;
1115 	}
1116 
1117 	dev_info(di->dev, "update %s to %u\n", str, val);
1118 
1119 	*prev = cpu_to_be16(val);
1120 	buf->dirty = true;
1121 }
1122 
1123 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1124 {
1125 	const int limit = 100;
1126 	u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1127 	int ret, try = limit;
1128 
1129 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1130 	if (ret < 0)
1131 		return ret;
1132 
1133 	do {
1134 		BQ27XXX_MSLEEP(25);
1135 		ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1136 		if (ret < 0)
1137 			return ret;
1138 	} while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1139 
1140 	if (!try && di->chip != BQ27425) { // 425 has a bug
1141 		dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1142 		return -EINVAL;
1143 	}
1144 
1145 	if (limit - try > 3)
1146 		dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1147 
1148 	return 0;
1149 }
1150 
1151 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1152 {
1153 	int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1154 	if (ret < 0 && ret != -EINVAL)
1155 		dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1156 
1157 	return ret;
1158 }
1159 
1160 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1161 {
1162 	int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1163 	if (ret < 0 && ret != -EINVAL)
1164 		dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1165 
1166 	return ret;
1167 }
1168 
1169 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1170 					  struct bq27xxx_dm_buf *buf)
1171 {
1172 	bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1173 	int ret;
1174 
1175 	if (!buf->dirty)
1176 		return 0;
1177 
1178 	if (cfgup) {
1179 		ret = bq27xxx_battery_set_cfgupdate(di);
1180 		if (ret < 0)
1181 			return ret;
1182 	}
1183 
1184 	ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1185 	if (ret < 0)
1186 		goto out;
1187 
1188 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1189 	if (ret < 0)
1190 		goto out;
1191 
1192 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1193 	if (ret < 0)
1194 		goto out;
1195 
1196 	BQ27XXX_MSLEEP(1);
1197 
1198 	ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1199 	if (ret < 0)
1200 		goto out;
1201 
1202 	ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1203 			    bq27xxx_battery_checksum_dm_block(buf), true);
1204 	if (ret < 0)
1205 		goto out;
1206 
1207 	/* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1208 	 * corruption on the '425 chip (and perhaps others), which can damage
1209 	 * the chip.
1210 	 */
1211 
1212 	if (cfgup) {
1213 		BQ27XXX_MSLEEP(1);
1214 		ret = bq27xxx_battery_soft_reset(di);
1215 		if (ret < 0)
1216 			return ret;
1217 	} else {
1218 		BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1219 	}
1220 
1221 	buf->dirty = false;
1222 
1223 	return 0;
1224 
1225 out:
1226 	if (cfgup)
1227 		bq27xxx_battery_soft_reset(di);
1228 
1229 	dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1230 	return ret;
1231 }
1232 
1233 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1234 				       struct power_supply_battery_info *info)
1235 {
1236 	struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1237 	struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1238 	bool updated;
1239 
1240 	if (bq27xxx_battery_unseal(di) < 0)
1241 		return;
1242 
1243 	if (info->charge_full_design_uah != -EINVAL &&
1244 	    info->energy_full_design_uwh != -EINVAL) {
1245 		bq27xxx_battery_read_dm_block(di, &bd);
1246 		/* assume design energy & capacity are in same block */
1247 		bq27xxx_battery_update_dm_block(di, &bd,
1248 					BQ27XXX_DM_DESIGN_CAPACITY,
1249 					info->charge_full_design_uah / 1000);
1250 		bq27xxx_battery_update_dm_block(di, &bd,
1251 					BQ27XXX_DM_DESIGN_ENERGY,
1252 					info->energy_full_design_uwh / 1000);
1253 	}
1254 
1255 	if (info->voltage_min_design_uv != -EINVAL) {
1256 		bool same = bd.class == bt.class && bd.block == bt.block;
1257 		if (!same)
1258 			bq27xxx_battery_read_dm_block(di, &bt);
1259 		bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1260 					BQ27XXX_DM_TERMINATE_VOLTAGE,
1261 					info->voltage_min_design_uv / 1000);
1262 	}
1263 
1264 	updated = bd.dirty || bt.dirty;
1265 
1266 	bq27xxx_battery_write_dm_block(di, &bd);
1267 	bq27xxx_battery_write_dm_block(di, &bt);
1268 
1269 	bq27xxx_battery_seal(di);
1270 
1271 	if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1272 		bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1273 		BQ27XXX_MSLEEP(300); /* reset time is not documented */
1274 	}
1275 	/* assume bq27xxx_battery_update() is called hereafter */
1276 }
1277 
1278 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1279 {
1280 	struct power_supply_battery_info info = {};
1281 	unsigned int min, max;
1282 
1283 	if (power_supply_get_battery_info(di->bat, &info) < 0)
1284 		return;
1285 
1286 	if (!di->dm_regs) {
1287 		dev_warn(di->dev, "data memory update not supported for chip\n");
1288 		return;
1289 	}
1290 
1291 	if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1292 		if (info.energy_full_design_uwh == -EINVAL)
1293 			dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1294 		else if (info.charge_full_design_uah == -EINVAL)
1295 			dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1296 	}
1297 
1298 	/* assume min == 0 */
1299 	max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1300 	if (info.energy_full_design_uwh > max * 1000) {
1301 		dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1302 			info.energy_full_design_uwh);
1303 		info.energy_full_design_uwh = -EINVAL;
1304 	}
1305 
1306 	/* assume min == 0 */
1307 	max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1308 	if (info.charge_full_design_uah > max * 1000) {
1309 		dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1310 			info.charge_full_design_uah);
1311 		info.charge_full_design_uah = -EINVAL;
1312 	}
1313 
1314 	min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1315 	max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1316 	if ((info.voltage_min_design_uv < min * 1000 ||
1317 	     info.voltage_min_design_uv > max * 1000) &&
1318 	     info.voltage_min_design_uv != -EINVAL) {
1319 		dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1320 			info.voltage_min_design_uv);
1321 		info.voltage_min_design_uv = -EINVAL;
1322 	}
1323 
1324 	if ((info.energy_full_design_uwh != -EINVAL &&
1325 	     info.charge_full_design_uah != -EINVAL) ||
1326 	     info.voltage_min_design_uv  != -EINVAL)
1327 		bq27xxx_battery_set_config(di, &info);
1328 }
1329 
1330 /*
1331  * Return the battery State-of-Charge
1332  * Or < 0 if something fails.
1333  */
1334 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1335 {
1336 	int soc;
1337 
1338 	if (di->opts & BQ27XXX_O_ZERO)
1339 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1340 	else
1341 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1342 
1343 	if (soc < 0)
1344 		dev_dbg(di->dev, "error reading State-of-Charge\n");
1345 
1346 	return soc;
1347 }
1348 
1349 /*
1350  * Return a battery charge value in µAh
1351  * Or < 0 if something fails.
1352  */
1353 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1354 {
1355 	int charge;
1356 
1357 	charge = bq27xxx_read(di, reg, false);
1358 	if (charge < 0) {
1359 		dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1360 			reg, charge);
1361 		return charge;
1362 	}
1363 
1364 	if (di->opts & BQ27XXX_O_ZERO)
1365 		charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1366 	else
1367 		charge *= 1000;
1368 
1369 	return charge;
1370 }
1371 
1372 /*
1373  * Return the battery Nominal available capacity in µAh
1374  * Or < 0 if something fails.
1375  */
1376 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1377 {
1378 	int flags;
1379 
1380 	if (di->opts & BQ27XXX_O_ZERO) {
1381 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1382 		if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1383 			return -ENODATA;
1384 	}
1385 
1386 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1387 }
1388 
1389 /*
1390  * Return the battery Full Charge Capacity in µAh
1391  * Or < 0 if something fails.
1392  */
1393 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1394 {
1395 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1396 }
1397 
1398 /*
1399  * Return the Design Capacity in µAh
1400  * Or < 0 if something fails.
1401  */
1402 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1403 {
1404 	int dcap;
1405 
1406 	if (di->opts & BQ27XXX_O_ZERO)
1407 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1408 	else
1409 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1410 
1411 	if (dcap < 0) {
1412 		dev_dbg(di->dev, "error reading initial last measured discharge\n");
1413 		return dcap;
1414 	}
1415 
1416 	if (di->opts & BQ27XXX_O_ZERO)
1417 		dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1418 	else
1419 		dcap *= 1000;
1420 
1421 	return dcap;
1422 }
1423 
1424 /*
1425  * Return the battery Available energy in µWh
1426  * Or < 0 if something fails.
1427  */
1428 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1429 {
1430 	int ae;
1431 
1432 	ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1433 	if (ae < 0) {
1434 		dev_dbg(di->dev, "error reading available energy\n");
1435 		return ae;
1436 	}
1437 
1438 	if (di->opts & BQ27XXX_O_ZERO)
1439 		ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1440 	else
1441 		ae *= 1000;
1442 
1443 	return ae;
1444 }
1445 
1446 /*
1447  * Return the battery temperature in tenths of degree Kelvin
1448  * Or < 0 if something fails.
1449  */
1450 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1451 {
1452 	int temp;
1453 
1454 	temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1455 	if (temp < 0) {
1456 		dev_err(di->dev, "error reading temperature\n");
1457 		return temp;
1458 	}
1459 
1460 	if (di->opts & BQ27XXX_O_ZERO)
1461 		temp = 5 * temp / 2;
1462 
1463 	return temp;
1464 }
1465 
1466 /*
1467  * Return the battery Cycle count total
1468  * Or < 0 if something fails.
1469  */
1470 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1471 {
1472 	int cyct;
1473 
1474 	cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1475 	if (cyct < 0)
1476 		dev_err(di->dev, "error reading cycle count total\n");
1477 
1478 	return cyct;
1479 }
1480 
1481 /*
1482  * Read a time register.
1483  * Return < 0 if something fails.
1484  */
1485 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1486 {
1487 	int tval;
1488 
1489 	tval = bq27xxx_read(di, reg, false);
1490 	if (tval < 0) {
1491 		dev_dbg(di->dev, "error reading time register %02x: %d\n",
1492 			reg, tval);
1493 		return tval;
1494 	}
1495 
1496 	if (tval == 65535)
1497 		return -ENODATA;
1498 
1499 	return tval * 60;
1500 }
1501 
1502 /*
1503  * Read an average power register.
1504  * Return < 0 if something fails.
1505  */
1506 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1507 {
1508 	int tval;
1509 
1510 	tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1511 	if (tval < 0) {
1512 		dev_err(di->dev, "error reading average power register  %02x: %d\n",
1513 			BQ27XXX_REG_AP, tval);
1514 		return tval;
1515 	}
1516 
1517 	if (di->opts & BQ27XXX_O_ZERO)
1518 		return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1519 	else
1520 		return tval;
1521 }
1522 
1523 /*
1524  * Returns true if a battery over temperature condition is detected
1525  */
1526 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1527 {
1528 	if (di->opts & BQ27XXX_O_OTDC)
1529 		return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1530         if (di->opts & BQ27XXX_O_UTOT)
1531 		return flags & BQ27XXX_FLAG_OT;
1532 
1533 	return false;
1534 }
1535 
1536 /*
1537  * Returns true if a battery under temperature condition is detected
1538  */
1539 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1540 {
1541 	if (di->opts & BQ27XXX_O_UTOT)
1542 		return flags & BQ27XXX_FLAG_UT;
1543 
1544 	return false;
1545 }
1546 
1547 /*
1548  * Returns true if a low state of charge condition is detected
1549  */
1550 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1551 {
1552 	if (di->opts & BQ27XXX_O_ZERO)
1553 		return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1554 	else
1555 		return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1556 }
1557 
1558 /*
1559  * Read flag register.
1560  * Return < 0 if something fails.
1561  */
1562 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1563 {
1564 	int flags;
1565 	bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1566 
1567 	flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1568 	if (flags < 0) {
1569 		dev_err(di->dev, "error reading flag register:%d\n", flags);
1570 		return flags;
1571 	}
1572 
1573 	/* Unlikely but important to return first */
1574 	if (unlikely(bq27xxx_battery_overtemp(di, flags)))
1575 		return POWER_SUPPLY_HEALTH_OVERHEAT;
1576 	if (unlikely(bq27xxx_battery_undertemp(di, flags)))
1577 		return POWER_SUPPLY_HEALTH_COLD;
1578 	if (unlikely(bq27xxx_battery_dead(di, flags)))
1579 		return POWER_SUPPLY_HEALTH_DEAD;
1580 
1581 	return POWER_SUPPLY_HEALTH_GOOD;
1582 }
1583 
1584 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1585 {
1586 	struct bq27xxx_reg_cache cache = {0, };
1587 	bool has_ci_flag = di->opts & BQ27XXX_O_ZERO;
1588 	bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1589 
1590 	cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1591 	if ((cache.flags & 0xff) == 0xff)
1592 		cache.flags = -1; /* read error */
1593 	if (cache.flags >= 0) {
1594 		cache.temperature = bq27xxx_battery_read_temperature(di);
1595 		if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1596 			dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1597 			cache.capacity = -ENODATA;
1598 			cache.energy = -ENODATA;
1599 			cache.time_to_empty = -ENODATA;
1600 			cache.time_to_empty_avg = -ENODATA;
1601 			cache.time_to_full = -ENODATA;
1602 			cache.charge_full = -ENODATA;
1603 			cache.health = -ENODATA;
1604 		} else {
1605 			if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1606 				cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1607 			if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1608 				cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1609 			if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1610 				cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1611 			cache.charge_full = bq27xxx_battery_read_fcc(di);
1612 			cache.capacity = bq27xxx_battery_read_soc(di);
1613 			if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1614 				cache.energy = bq27xxx_battery_read_energy(di);
1615 			cache.health = bq27xxx_battery_read_health(di);
1616 		}
1617 		if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1618 			cache.cycle_count = bq27xxx_battery_read_cyct(di);
1619 		if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1620 			cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1621 
1622 		/* We only have to read charge design full once */
1623 		if (di->charge_design_full <= 0)
1624 			di->charge_design_full = bq27xxx_battery_read_dcap(di);
1625 	}
1626 
1627 	if (di->cache.capacity != cache.capacity)
1628 		power_supply_changed(di->bat);
1629 
1630 	if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1631 		di->cache = cache;
1632 
1633 	di->last_update = jiffies;
1634 }
1635 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1636 
1637 static void bq27xxx_battery_poll(struct work_struct *work)
1638 {
1639 	struct bq27xxx_device_info *di =
1640 			container_of(work, struct bq27xxx_device_info,
1641 				     work.work);
1642 
1643 	bq27xxx_battery_update(di);
1644 
1645 	if (poll_interval > 0)
1646 		schedule_delayed_work(&di->work, poll_interval * HZ);
1647 }
1648 
1649 /*
1650  * Return the battery average current in µA
1651  * Note that current can be negative signed as well
1652  * Or 0 if something fails.
1653  */
1654 static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1655 				   union power_supply_propval *val)
1656 {
1657 	int curr;
1658 	int flags;
1659 
1660 	curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1661 	if (curr < 0) {
1662 		dev_err(di->dev, "error reading current\n");
1663 		return curr;
1664 	}
1665 
1666 	if (di->opts & BQ27XXX_O_ZERO) {
1667 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1668 		if (flags & BQ27000_FLAG_CHGS) {
1669 			dev_dbg(di->dev, "negative current!\n");
1670 			curr = -curr;
1671 		}
1672 
1673 		val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1674 	} else {
1675 		/* Other gauges return signed value */
1676 		val->intval = (int)((s16)curr) * 1000;
1677 	}
1678 
1679 	return 0;
1680 }
1681 
1682 static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1683 				  union power_supply_propval *val)
1684 {
1685 	int status;
1686 
1687 	if (di->opts & BQ27XXX_O_ZERO) {
1688 		if (di->cache.flags & BQ27000_FLAG_FC)
1689 			status = POWER_SUPPLY_STATUS_FULL;
1690 		else if (di->cache.flags & BQ27000_FLAG_CHGS)
1691 			status = POWER_SUPPLY_STATUS_CHARGING;
1692 		else if (power_supply_am_i_supplied(di->bat) > 0)
1693 			status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1694 		else
1695 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1696 	} else {
1697 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1698 			status = POWER_SUPPLY_STATUS_FULL;
1699 		else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1700 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1701 		else
1702 			status = POWER_SUPPLY_STATUS_CHARGING;
1703 	}
1704 
1705 	val->intval = status;
1706 
1707 	return 0;
1708 }
1709 
1710 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1711 					  union power_supply_propval *val)
1712 {
1713 	int level;
1714 
1715 	if (di->opts & BQ27XXX_O_ZERO) {
1716 		if (di->cache.flags & BQ27000_FLAG_FC)
1717 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1718 		else if (di->cache.flags & BQ27000_FLAG_EDV1)
1719 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1720 		else if (di->cache.flags & BQ27000_FLAG_EDVF)
1721 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1722 		else
1723 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1724 	} else {
1725 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1726 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1727 		else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1728 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1729 		else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1730 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1731 		else
1732 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1733 	}
1734 
1735 	val->intval = level;
1736 
1737 	return 0;
1738 }
1739 
1740 /*
1741  * Return the battery Voltage in millivolts
1742  * Or < 0 if something fails.
1743  */
1744 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1745 				   union power_supply_propval *val)
1746 {
1747 	int volt;
1748 
1749 	volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1750 	if (volt < 0) {
1751 		dev_err(di->dev, "error reading voltage\n");
1752 		return volt;
1753 	}
1754 
1755 	val->intval = volt * 1000;
1756 
1757 	return 0;
1758 }
1759 
1760 static int bq27xxx_simple_value(int value,
1761 				union power_supply_propval *val)
1762 {
1763 	if (value < 0)
1764 		return value;
1765 
1766 	val->intval = value;
1767 
1768 	return 0;
1769 }
1770 
1771 static int bq27xxx_battery_get_property(struct power_supply *psy,
1772 					enum power_supply_property psp,
1773 					union power_supply_propval *val)
1774 {
1775 	int ret = 0;
1776 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1777 
1778 	mutex_lock(&di->lock);
1779 	if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1780 		cancel_delayed_work_sync(&di->work);
1781 		bq27xxx_battery_poll(&di->work.work);
1782 	}
1783 	mutex_unlock(&di->lock);
1784 
1785 	if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1786 		return -ENODEV;
1787 
1788 	switch (psp) {
1789 	case POWER_SUPPLY_PROP_STATUS:
1790 		ret = bq27xxx_battery_status(di, val);
1791 		break;
1792 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1793 		ret = bq27xxx_battery_voltage(di, val);
1794 		break;
1795 	case POWER_SUPPLY_PROP_PRESENT:
1796 		val->intval = di->cache.flags < 0 ? 0 : 1;
1797 		break;
1798 	case POWER_SUPPLY_PROP_CURRENT_NOW:
1799 		ret = bq27xxx_battery_current(di, val);
1800 		break;
1801 	case POWER_SUPPLY_PROP_CAPACITY:
1802 		ret = bq27xxx_simple_value(di->cache.capacity, val);
1803 		break;
1804 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1805 		ret = bq27xxx_battery_capacity_level(di, val);
1806 		break;
1807 	case POWER_SUPPLY_PROP_TEMP:
1808 		ret = bq27xxx_simple_value(di->cache.temperature, val);
1809 		if (ret == 0)
1810 			val->intval -= 2731; /* convert decidegree k to c */
1811 		break;
1812 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1813 		ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1814 		break;
1815 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1816 		ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1817 		break;
1818 	case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1819 		ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1820 		break;
1821 	case POWER_SUPPLY_PROP_TECHNOLOGY:
1822 		val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1823 		break;
1824 	case POWER_SUPPLY_PROP_CHARGE_NOW:
1825 		ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1826 		break;
1827 	case POWER_SUPPLY_PROP_CHARGE_FULL:
1828 		ret = bq27xxx_simple_value(di->cache.charge_full, val);
1829 		break;
1830 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1831 		ret = bq27xxx_simple_value(di->charge_design_full, val);
1832 		break;
1833 	/*
1834 	 * TODO: Implement these to make registers set from
1835 	 * power_supply_battery_info visible in sysfs.
1836 	 */
1837 	case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1838 	case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1839 		return -EINVAL;
1840 	case POWER_SUPPLY_PROP_CYCLE_COUNT:
1841 		ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1842 		break;
1843 	case POWER_SUPPLY_PROP_ENERGY_NOW:
1844 		ret = bq27xxx_simple_value(di->cache.energy, val);
1845 		break;
1846 	case POWER_SUPPLY_PROP_POWER_AVG:
1847 		ret = bq27xxx_simple_value(di->cache.power_avg, val);
1848 		break;
1849 	case POWER_SUPPLY_PROP_HEALTH:
1850 		ret = bq27xxx_simple_value(di->cache.health, val);
1851 		break;
1852 	case POWER_SUPPLY_PROP_MANUFACTURER:
1853 		val->strval = BQ27XXX_MANUFACTURER;
1854 		break;
1855 	default:
1856 		return -EINVAL;
1857 	}
1858 
1859 	return ret;
1860 }
1861 
1862 static void bq27xxx_external_power_changed(struct power_supply *psy)
1863 {
1864 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1865 
1866 	cancel_delayed_work_sync(&di->work);
1867 	schedule_delayed_work(&di->work, 0);
1868 }
1869 
1870 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
1871 {
1872 	struct power_supply_desc *psy_desc;
1873 	struct power_supply_config psy_cfg = {
1874 		.of_node = di->dev->of_node,
1875 		.drv_data = di,
1876 	};
1877 
1878 	INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
1879 	mutex_init(&di->lock);
1880 
1881 	di->regs       = bq27xxx_chip_data[di->chip].regs;
1882 	di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
1883 	di->dm_regs    = bq27xxx_chip_data[di->chip].dm_regs;
1884 	di->opts       = bq27xxx_chip_data[di->chip].opts;
1885 
1886 	psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
1887 	if (!psy_desc)
1888 		return -ENOMEM;
1889 
1890 	psy_desc->name = di->name;
1891 	psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
1892 	psy_desc->properties = bq27xxx_chip_data[di->chip].props;
1893 	psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
1894 	psy_desc->get_property = bq27xxx_battery_get_property;
1895 	psy_desc->external_power_changed = bq27xxx_external_power_changed;
1896 
1897 	di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
1898 	if (IS_ERR(di->bat)) {
1899 		dev_err(di->dev, "failed to register battery\n");
1900 		return PTR_ERR(di->bat);
1901 	}
1902 
1903 	bq27xxx_battery_settings(di);
1904 	bq27xxx_battery_update(di);
1905 
1906 	mutex_lock(&bq27xxx_list_lock);
1907 	list_add(&di->list, &bq27xxx_battery_devices);
1908 	mutex_unlock(&bq27xxx_list_lock);
1909 
1910 	return 0;
1911 }
1912 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
1913 
1914 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
1915 {
1916 	/*
1917 	 * power_supply_unregister call bq27xxx_battery_get_property which
1918 	 * call bq27xxx_battery_poll.
1919 	 * Make sure that bq27xxx_battery_poll will not call
1920 	 * schedule_delayed_work again after unregister (which cause OOPS).
1921 	 */
1922 	poll_interval = 0;
1923 
1924 	cancel_delayed_work_sync(&di->work);
1925 
1926 	power_supply_unregister(di->bat);
1927 
1928 	mutex_lock(&bq27xxx_list_lock);
1929 	list_del(&di->list);
1930 	mutex_unlock(&bq27xxx_list_lock);
1931 
1932 	mutex_destroy(&di->lock);
1933 }
1934 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
1935 
1936 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1937 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
1938 MODULE_LICENSE("GPL");
1939