1 /*
2  * BQ27xxx battery driver
3  *
4  * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
5  * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
6  * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
7  * Copyright (C) 2011 Pali Rohár <pali.rohar@gmail.com>
8  * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
9  *
10  * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
11  *
12  * This package is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19  *
20  * Datasheets:
21  * http://www.ti.com/product/bq27000
22  * http://www.ti.com/product/bq27200
23  * http://www.ti.com/product/bq27010
24  * http://www.ti.com/product/bq27210
25  * http://www.ti.com/product/bq27500
26  * http://www.ti.com/product/bq27510-g1
27  * http://www.ti.com/product/bq27510-g2
28  * http://www.ti.com/product/bq27510-g3
29  * http://www.ti.com/product/bq27520-g4
30  * http://www.ti.com/product/bq27520-g1
31  * http://www.ti.com/product/bq27520-g2
32  * http://www.ti.com/product/bq27520-g3
33  * http://www.ti.com/product/bq27520-g4
34  * http://www.ti.com/product/bq27530-g1
35  * http://www.ti.com/product/bq27531-g1
36  * http://www.ti.com/product/bq27541-g1
37  * http://www.ti.com/product/bq27542-g1
38  * http://www.ti.com/product/bq27546-g1
39  * http://www.ti.com/product/bq27742-g1
40  * http://www.ti.com/product/bq27545-g1
41  * http://www.ti.com/product/bq27421-g1
42  * http://www.ti.com/product/bq27425-g1
43  * http://www.ti.com/product/bq27411-g1
44  * http://www.ti.com/product/bq27621-g1
45  */
46 
47 #include <linux/device.h>
48 #include <linux/module.h>
49 #include <linux/mutex.h>
50 #include <linux/param.h>
51 #include <linux/jiffies.h>
52 #include <linux/workqueue.h>
53 #include <linux/delay.h>
54 #include <linux/platform_device.h>
55 #include <linux/power_supply.h>
56 #include <linux/slab.h>
57 #include <linux/of.h>
58 
59 #include <linux/power/bq27xxx_battery.h>
60 
61 #define BQ27XXX_MANUFACTURER	"Texas Instruments"
62 
63 /* BQ27XXX Flags */
64 #define BQ27XXX_FLAG_DSC	BIT(0)
65 #define BQ27XXX_FLAG_SOCF	BIT(1) /* State-of-Charge threshold final */
66 #define BQ27XXX_FLAG_SOC1	BIT(2) /* State-of-Charge threshold 1 */
67 #define BQ27XXX_FLAG_CFGUP	BIT(4)
68 #define BQ27XXX_FLAG_FC		BIT(9)
69 #define BQ27XXX_FLAG_OTD	BIT(14)
70 #define BQ27XXX_FLAG_OTC	BIT(15)
71 #define BQ27XXX_FLAG_UT		BIT(14)
72 #define BQ27XXX_FLAG_OT		BIT(15)
73 
74 /* BQ27000 has different layout for Flags register */
75 #define BQ27000_FLAG_EDVF	BIT(0) /* Final End-of-Discharge-Voltage flag */
76 #define BQ27000_FLAG_EDV1	BIT(1) /* First End-of-Discharge-Voltage flag */
77 #define BQ27000_FLAG_CI		BIT(4) /* Capacity Inaccurate flag */
78 #define BQ27000_FLAG_FC		BIT(5)
79 #define BQ27000_FLAG_CHGS	BIT(7) /* Charge state flag */
80 
81 /* control register params */
82 #define BQ27XXX_SEALED			0x20
83 #define BQ27XXX_SET_CFGUPDATE		0x13
84 #define BQ27XXX_SOFT_RESET		0x42
85 #define BQ27XXX_RESET			0x41
86 
87 #define BQ27XXX_RS			(20) /* Resistor sense mOhm */
88 #define BQ27XXX_POWER_CONSTANT		(29200) /* 29.2 µV^2 * 1000 */
89 #define BQ27XXX_CURRENT_CONSTANT	(3570) /* 3.57 µV * 1000 */
90 
91 #define INVALID_REG_ADDR	0xff
92 
93 /*
94  * bq27xxx_reg_index - Register names
95  *
96  * These are indexes into a device's register mapping array.
97  */
98 
99 enum bq27xxx_reg_index {
100 	BQ27XXX_REG_CTRL = 0,	/* Control */
101 	BQ27XXX_REG_TEMP,	/* Temperature */
102 	BQ27XXX_REG_INT_TEMP,	/* Internal Temperature */
103 	BQ27XXX_REG_VOLT,	/* Voltage */
104 	BQ27XXX_REG_AI,		/* Average Current */
105 	BQ27XXX_REG_FLAGS,	/* Flags */
106 	BQ27XXX_REG_TTE,	/* Time-to-Empty */
107 	BQ27XXX_REG_TTF,	/* Time-to-Full */
108 	BQ27XXX_REG_TTES,	/* Time-to-Empty Standby */
109 	BQ27XXX_REG_TTECP,	/* Time-to-Empty at Constant Power */
110 	BQ27XXX_REG_NAC,	/* Nominal Available Capacity */
111 	BQ27XXX_REG_FCC,	/* Full Charge Capacity */
112 	BQ27XXX_REG_CYCT,	/* Cycle Count */
113 	BQ27XXX_REG_AE,		/* Available Energy */
114 	BQ27XXX_REG_SOC,	/* State-of-Charge */
115 	BQ27XXX_REG_DCAP,	/* Design Capacity */
116 	BQ27XXX_REG_AP,		/* Average Power */
117 	BQ27XXX_DM_CTRL,	/* Block Data Control */
118 	BQ27XXX_DM_CLASS,	/* Data Class */
119 	BQ27XXX_DM_BLOCK,	/* Data Block */
120 	BQ27XXX_DM_DATA,	/* Block Data */
121 	BQ27XXX_DM_CKSUM,	/* Block Data Checksum */
122 	BQ27XXX_REG_MAX,	/* sentinel */
123 };
124 
125 #define BQ27XXX_DM_REG_ROWS \
126 	[BQ27XXX_DM_CTRL] = 0x61,  \
127 	[BQ27XXX_DM_CLASS] = 0x3e, \
128 	[BQ27XXX_DM_BLOCK] = 0x3f, \
129 	[BQ27XXX_DM_DATA] = 0x40,  \
130 	[BQ27XXX_DM_CKSUM] = 0x60
131 
132 /* Register mappings */
133 static u8
134 	bq27000_regs[BQ27XXX_REG_MAX] = {
135 		[BQ27XXX_REG_CTRL] = 0x00,
136 		[BQ27XXX_REG_TEMP] = 0x06,
137 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
138 		[BQ27XXX_REG_VOLT] = 0x08,
139 		[BQ27XXX_REG_AI] = 0x14,
140 		[BQ27XXX_REG_FLAGS] = 0x0a,
141 		[BQ27XXX_REG_TTE] = 0x16,
142 		[BQ27XXX_REG_TTF] = 0x18,
143 		[BQ27XXX_REG_TTES] = 0x1c,
144 		[BQ27XXX_REG_TTECP] = 0x26,
145 		[BQ27XXX_REG_NAC] = 0x0c,
146 		[BQ27XXX_REG_FCC] = 0x12,
147 		[BQ27XXX_REG_CYCT] = 0x2a,
148 		[BQ27XXX_REG_AE] = 0x22,
149 		[BQ27XXX_REG_SOC] = 0x0b,
150 		[BQ27XXX_REG_DCAP] = 0x76,
151 		[BQ27XXX_REG_AP] = 0x24,
152 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
153 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
154 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
155 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
156 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
157 	},
158 	bq27010_regs[BQ27XXX_REG_MAX] = {
159 		[BQ27XXX_REG_CTRL] = 0x00,
160 		[BQ27XXX_REG_TEMP] = 0x06,
161 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
162 		[BQ27XXX_REG_VOLT] = 0x08,
163 		[BQ27XXX_REG_AI] = 0x14,
164 		[BQ27XXX_REG_FLAGS] = 0x0a,
165 		[BQ27XXX_REG_TTE] = 0x16,
166 		[BQ27XXX_REG_TTF] = 0x18,
167 		[BQ27XXX_REG_TTES] = 0x1c,
168 		[BQ27XXX_REG_TTECP] = 0x26,
169 		[BQ27XXX_REG_NAC] = 0x0c,
170 		[BQ27XXX_REG_FCC] = 0x12,
171 		[BQ27XXX_REG_CYCT] = 0x2a,
172 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
173 		[BQ27XXX_REG_SOC] = 0x0b,
174 		[BQ27XXX_REG_DCAP] = 0x76,
175 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
176 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
177 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
178 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
179 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
180 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
181 	},
182 	bq2750x_regs[BQ27XXX_REG_MAX] = {
183 		[BQ27XXX_REG_CTRL] = 0x00,
184 		[BQ27XXX_REG_TEMP] = 0x06,
185 		[BQ27XXX_REG_INT_TEMP] = 0x28,
186 		[BQ27XXX_REG_VOLT] = 0x08,
187 		[BQ27XXX_REG_AI] = 0x14,
188 		[BQ27XXX_REG_FLAGS] = 0x0a,
189 		[BQ27XXX_REG_TTE] = 0x16,
190 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
191 		[BQ27XXX_REG_TTES] = 0x1a,
192 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
193 		[BQ27XXX_REG_NAC] = 0x0c,
194 		[BQ27XXX_REG_FCC] = 0x12,
195 		[BQ27XXX_REG_CYCT] = 0x2a,
196 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
197 		[BQ27XXX_REG_SOC] = 0x2c,
198 		[BQ27XXX_REG_DCAP] = 0x3c,
199 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
200 		BQ27XXX_DM_REG_ROWS,
201 	},
202 #define bq2751x_regs bq27510g3_regs
203 #define bq2752x_regs bq27510g3_regs
204 	bq27500_regs[BQ27XXX_REG_MAX] = {
205 		[BQ27XXX_REG_CTRL] = 0x00,
206 		[BQ27XXX_REG_TEMP] = 0x06,
207 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
208 		[BQ27XXX_REG_VOLT] = 0x08,
209 		[BQ27XXX_REG_AI] = 0x14,
210 		[BQ27XXX_REG_FLAGS] = 0x0a,
211 		[BQ27XXX_REG_TTE] = 0x16,
212 		[BQ27XXX_REG_TTF] = 0x18,
213 		[BQ27XXX_REG_TTES] = 0x1c,
214 		[BQ27XXX_REG_TTECP] = 0x26,
215 		[BQ27XXX_REG_NAC] = 0x0c,
216 		[BQ27XXX_REG_FCC] = 0x12,
217 		[BQ27XXX_REG_CYCT] = 0x2a,
218 		[BQ27XXX_REG_AE] = 0x22,
219 		[BQ27XXX_REG_SOC] = 0x2c,
220 		[BQ27XXX_REG_DCAP] = 0x3c,
221 		[BQ27XXX_REG_AP] = 0x24,
222 		BQ27XXX_DM_REG_ROWS,
223 	},
224 #define bq27510g1_regs bq27500_regs
225 #define bq27510g2_regs bq27500_regs
226 	bq27510g3_regs[BQ27XXX_REG_MAX] = {
227 		[BQ27XXX_REG_CTRL] = 0x00,
228 		[BQ27XXX_REG_TEMP] = 0x06,
229 		[BQ27XXX_REG_INT_TEMP] = 0x28,
230 		[BQ27XXX_REG_VOLT] = 0x08,
231 		[BQ27XXX_REG_AI] = 0x14,
232 		[BQ27XXX_REG_FLAGS] = 0x0a,
233 		[BQ27XXX_REG_TTE] = 0x16,
234 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
235 		[BQ27XXX_REG_TTES] = 0x1a,
236 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
237 		[BQ27XXX_REG_NAC] = 0x0c,
238 		[BQ27XXX_REG_FCC] = 0x12,
239 		[BQ27XXX_REG_CYCT] = 0x1e,
240 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
241 		[BQ27XXX_REG_SOC] = 0x20,
242 		[BQ27XXX_REG_DCAP] = 0x2e,
243 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
244 		BQ27XXX_DM_REG_ROWS,
245 	},
246 	bq27520g1_regs[BQ27XXX_REG_MAX] = {
247 		[BQ27XXX_REG_CTRL] = 0x00,
248 		[BQ27XXX_REG_TEMP] = 0x06,
249 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
250 		[BQ27XXX_REG_VOLT] = 0x08,
251 		[BQ27XXX_REG_AI] = 0x14,
252 		[BQ27XXX_REG_FLAGS] = 0x0a,
253 		[BQ27XXX_REG_TTE] = 0x16,
254 		[BQ27XXX_REG_TTF] = 0x18,
255 		[BQ27XXX_REG_TTES] = 0x1c,
256 		[BQ27XXX_REG_TTECP] = 0x26,
257 		[BQ27XXX_REG_NAC] = 0x0c,
258 		[BQ27XXX_REG_FCC] = 0x12,
259 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
260 		[BQ27XXX_REG_AE] = 0x22,
261 		[BQ27XXX_REG_SOC] = 0x2c,
262 		[BQ27XXX_REG_DCAP] = 0x3c,
263 		[BQ27XXX_REG_AP] = 0x24,
264 		BQ27XXX_DM_REG_ROWS,
265 	},
266 	bq27520g2_regs[BQ27XXX_REG_MAX] = {
267 		[BQ27XXX_REG_CTRL] = 0x00,
268 		[BQ27XXX_REG_TEMP] = 0x06,
269 		[BQ27XXX_REG_INT_TEMP] = 0x36,
270 		[BQ27XXX_REG_VOLT] = 0x08,
271 		[BQ27XXX_REG_AI] = 0x14,
272 		[BQ27XXX_REG_FLAGS] = 0x0a,
273 		[BQ27XXX_REG_TTE] = 0x16,
274 		[BQ27XXX_REG_TTF] = 0x18,
275 		[BQ27XXX_REG_TTES] = 0x1c,
276 		[BQ27XXX_REG_TTECP] = 0x26,
277 		[BQ27XXX_REG_NAC] = 0x0c,
278 		[BQ27XXX_REG_FCC] = 0x12,
279 		[BQ27XXX_REG_CYCT] = 0x2a,
280 		[BQ27XXX_REG_AE] = 0x22,
281 		[BQ27XXX_REG_SOC] = 0x2c,
282 		[BQ27XXX_REG_DCAP] = 0x3c,
283 		[BQ27XXX_REG_AP] = 0x24,
284 		BQ27XXX_DM_REG_ROWS,
285 	},
286 	bq27520g3_regs[BQ27XXX_REG_MAX] = {
287 		[BQ27XXX_REG_CTRL] = 0x00,
288 		[BQ27XXX_REG_TEMP] = 0x06,
289 		[BQ27XXX_REG_INT_TEMP] = 0x36,
290 		[BQ27XXX_REG_VOLT] = 0x08,
291 		[BQ27XXX_REG_AI] = 0x14,
292 		[BQ27XXX_REG_FLAGS] = 0x0a,
293 		[BQ27XXX_REG_TTE] = 0x16,
294 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
295 		[BQ27XXX_REG_TTES] = 0x1c,
296 		[BQ27XXX_REG_TTECP] = 0x26,
297 		[BQ27XXX_REG_NAC] = 0x0c,
298 		[BQ27XXX_REG_FCC] = 0x12,
299 		[BQ27XXX_REG_CYCT] = 0x2a,
300 		[BQ27XXX_REG_AE] = 0x22,
301 		[BQ27XXX_REG_SOC] = 0x2c,
302 		[BQ27XXX_REG_DCAP] = 0x3c,
303 		[BQ27XXX_REG_AP] = 0x24,
304 		BQ27XXX_DM_REG_ROWS,
305 	},
306 	bq27520g4_regs[BQ27XXX_REG_MAX] = {
307 		[BQ27XXX_REG_CTRL] = 0x00,
308 		[BQ27XXX_REG_TEMP] = 0x06,
309 		[BQ27XXX_REG_INT_TEMP] = 0x28,
310 		[BQ27XXX_REG_VOLT] = 0x08,
311 		[BQ27XXX_REG_AI] = 0x14,
312 		[BQ27XXX_REG_FLAGS] = 0x0a,
313 		[BQ27XXX_REG_TTE] = 0x16,
314 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
315 		[BQ27XXX_REG_TTES] = 0x1c,
316 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
317 		[BQ27XXX_REG_NAC] = 0x0c,
318 		[BQ27XXX_REG_FCC] = 0x12,
319 		[BQ27XXX_REG_CYCT] = 0x1e,
320 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
321 		[BQ27XXX_REG_SOC] = 0x20,
322 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
323 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
324 		BQ27XXX_DM_REG_ROWS,
325 	},
326 	bq27530_regs[BQ27XXX_REG_MAX] = {
327 		[BQ27XXX_REG_CTRL] = 0x00,
328 		[BQ27XXX_REG_TEMP] = 0x06,
329 		[BQ27XXX_REG_INT_TEMP] = 0x32,
330 		[BQ27XXX_REG_VOLT] = 0x08,
331 		[BQ27XXX_REG_AI] = 0x14,
332 		[BQ27XXX_REG_FLAGS] = 0x0a,
333 		[BQ27XXX_REG_TTE] = 0x16,
334 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
335 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
336 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
337 		[BQ27XXX_REG_NAC] = 0x0c,
338 		[BQ27XXX_REG_FCC] = 0x12,
339 		[BQ27XXX_REG_CYCT] = 0x2a,
340 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
341 		[BQ27XXX_REG_SOC] = 0x2c,
342 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
343 		[BQ27XXX_REG_AP] = 0x24,
344 		BQ27XXX_DM_REG_ROWS,
345 	},
346 #define bq27531_regs bq27530_regs
347 	bq27541_regs[BQ27XXX_REG_MAX] = {
348 		[BQ27XXX_REG_CTRL] = 0x00,
349 		[BQ27XXX_REG_TEMP] = 0x06,
350 		[BQ27XXX_REG_INT_TEMP] = 0x28,
351 		[BQ27XXX_REG_VOLT] = 0x08,
352 		[BQ27XXX_REG_AI] = 0x14,
353 		[BQ27XXX_REG_FLAGS] = 0x0a,
354 		[BQ27XXX_REG_TTE] = 0x16,
355 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
356 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
357 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
358 		[BQ27XXX_REG_NAC] = 0x0c,
359 		[BQ27XXX_REG_FCC] = 0x12,
360 		[BQ27XXX_REG_CYCT] = 0x2a,
361 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
362 		[BQ27XXX_REG_SOC] = 0x2c,
363 		[BQ27XXX_REG_DCAP] = 0x3c,
364 		[BQ27XXX_REG_AP] = 0x24,
365 		BQ27XXX_DM_REG_ROWS,
366 	},
367 #define bq27542_regs bq27541_regs
368 #define bq27546_regs bq27541_regs
369 #define bq27742_regs bq27541_regs
370 	bq27545_regs[BQ27XXX_REG_MAX] = {
371 		[BQ27XXX_REG_CTRL] = 0x00,
372 		[BQ27XXX_REG_TEMP] = 0x06,
373 		[BQ27XXX_REG_INT_TEMP] = 0x28,
374 		[BQ27XXX_REG_VOLT] = 0x08,
375 		[BQ27XXX_REG_AI] = 0x14,
376 		[BQ27XXX_REG_FLAGS] = 0x0a,
377 		[BQ27XXX_REG_TTE] = 0x16,
378 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
379 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
380 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
381 		[BQ27XXX_REG_NAC] = 0x0c,
382 		[BQ27XXX_REG_FCC] = 0x12,
383 		[BQ27XXX_REG_CYCT] = 0x2a,
384 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
385 		[BQ27XXX_REG_SOC] = 0x2c,
386 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
387 		[BQ27XXX_REG_AP] = 0x24,
388 		BQ27XXX_DM_REG_ROWS,
389 	},
390 	bq27421_regs[BQ27XXX_REG_MAX] = {
391 		[BQ27XXX_REG_CTRL] = 0x00,
392 		[BQ27XXX_REG_TEMP] = 0x02,
393 		[BQ27XXX_REG_INT_TEMP] = 0x1e,
394 		[BQ27XXX_REG_VOLT] = 0x04,
395 		[BQ27XXX_REG_AI] = 0x10,
396 		[BQ27XXX_REG_FLAGS] = 0x06,
397 		[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
398 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
399 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
400 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
401 		[BQ27XXX_REG_NAC] = 0x08,
402 		[BQ27XXX_REG_FCC] = 0x0e,
403 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
404 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
405 		[BQ27XXX_REG_SOC] = 0x1c,
406 		[BQ27XXX_REG_DCAP] = 0x3c,
407 		[BQ27XXX_REG_AP] = 0x18,
408 		BQ27XXX_DM_REG_ROWS,
409 	};
410 #define bq27425_regs bq27421_regs
411 #define bq27441_regs bq27421_regs
412 #define bq27621_regs bq27421_regs
413 
414 static enum power_supply_property bq27000_props[] = {
415 	POWER_SUPPLY_PROP_STATUS,
416 	POWER_SUPPLY_PROP_PRESENT,
417 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
418 	POWER_SUPPLY_PROP_CURRENT_NOW,
419 	POWER_SUPPLY_PROP_CAPACITY,
420 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
421 	POWER_SUPPLY_PROP_TEMP,
422 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
423 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
424 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
425 	POWER_SUPPLY_PROP_TECHNOLOGY,
426 	POWER_SUPPLY_PROP_CHARGE_FULL,
427 	POWER_SUPPLY_PROP_CHARGE_NOW,
428 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
429 	POWER_SUPPLY_PROP_CYCLE_COUNT,
430 	POWER_SUPPLY_PROP_ENERGY_NOW,
431 	POWER_SUPPLY_PROP_POWER_AVG,
432 	POWER_SUPPLY_PROP_HEALTH,
433 	POWER_SUPPLY_PROP_MANUFACTURER,
434 };
435 
436 static enum power_supply_property bq27010_props[] = {
437 	POWER_SUPPLY_PROP_STATUS,
438 	POWER_SUPPLY_PROP_PRESENT,
439 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
440 	POWER_SUPPLY_PROP_CURRENT_NOW,
441 	POWER_SUPPLY_PROP_CAPACITY,
442 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
443 	POWER_SUPPLY_PROP_TEMP,
444 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
445 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
446 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
447 	POWER_SUPPLY_PROP_TECHNOLOGY,
448 	POWER_SUPPLY_PROP_CHARGE_FULL,
449 	POWER_SUPPLY_PROP_CHARGE_NOW,
450 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
451 	POWER_SUPPLY_PROP_CYCLE_COUNT,
452 	POWER_SUPPLY_PROP_HEALTH,
453 	POWER_SUPPLY_PROP_MANUFACTURER,
454 };
455 
456 #define bq2750x_props bq27510g3_props
457 #define bq2751x_props bq27510g3_props
458 #define bq2752x_props bq27510g3_props
459 
460 static enum power_supply_property bq27500_props[] = {
461 	POWER_SUPPLY_PROP_STATUS,
462 	POWER_SUPPLY_PROP_PRESENT,
463 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
464 	POWER_SUPPLY_PROP_CURRENT_NOW,
465 	POWER_SUPPLY_PROP_CAPACITY,
466 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
467 	POWER_SUPPLY_PROP_TEMP,
468 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
469 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
470 	POWER_SUPPLY_PROP_TECHNOLOGY,
471 	POWER_SUPPLY_PROP_CHARGE_FULL,
472 	POWER_SUPPLY_PROP_CHARGE_NOW,
473 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
474 	POWER_SUPPLY_PROP_CYCLE_COUNT,
475 	POWER_SUPPLY_PROP_ENERGY_NOW,
476 	POWER_SUPPLY_PROP_POWER_AVG,
477 	POWER_SUPPLY_PROP_HEALTH,
478 	POWER_SUPPLY_PROP_MANUFACTURER,
479 };
480 #define bq27510g1_props bq27500_props
481 #define bq27510g2_props bq27500_props
482 
483 static enum power_supply_property bq27510g3_props[] = {
484 	POWER_SUPPLY_PROP_STATUS,
485 	POWER_SUPPLY_PROP_PRESENT,
486 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
487 	POWER_SUPPLY_PROP_CURRENT_NOW,
488 	POWER_SUPPLY_PROP_CAPACITY,
489 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
490 	POWER_SUPPLY_PROP_TEMP,
491 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
492 	POWER_SUPPLY_PROP_TECHNOLOGY,
493 	POWER_SUPPLY_PROP_CHARGE_FULL,
494 	POWER_SUPPLY_PROP_CHARGE_NOW,
495 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
496 	POWER_SUPPLY_PROP_CYCLE_COUNT,
497 	POWER_SUPPLY_PROP_HEALTH,
498 	POWER_SUPPLY_PROP_MANUFACTURER,
499 };
500 
501 static enum power_supply_property bq27520g1_props[] = {
502 	POWER_SUPPLY_PROP_STATUS,
503 	POWER_SUPPLY_PROP_PRESENT,
504 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
505 	POWER_SUPPLY_PROP_CURRENT_NOW,
506 	POWER_SUPPLY_PROP_CAPACITY,
507 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
508 	POWER_SUPPLY_PROP_TEMP,
509 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
510 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
511 	POWER_SUPPLY_PROP_TECHNOLOGY,
512 	POWER_SUPPLY_PROP_CHARGE_FULL,
513 	POWER_SUPPLY_PROP_CHARGE_NOW,
514 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
515 	POWER_SUPPLY_PROP_ENERGY_NOW,
516 	POWER_SUPPLY_PROP_POWER_AVG,
517 	POWER_SUPPLY_PROP_HEALTH,
518 	POWER_SUPPLY_PROP_MANUFACTURER,
519 };
520 
521 #define bq27520g2_props bq27500_props
522 
523 static enum power_supply_property bq27520g3_props[] = {
524 	POWER_SUPPLY_PROP_STATUS,
525 	POWER_SUPPLY_PROP_PRESENT,
526 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
527 	POWER_SUPPLY_PROP_CURRENT_NOW,
528 	POWER_SUPPLY_PROP_CAPACITY,
529 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
530 	POWER_SUPPLY_PROP_TEMP,
531 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
532 	POWER_SUPPLY_PROP_TECHNOLOGY,
533 	POWER_SUPPLY_PROP_CHARGE_FULL,
534 	POWER_SUPPLY_PROP_CHARGE_NOW,
535 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
536 	POWER_SUPPLY_PROP_CYCLE_COUNT,
537 	POWER_SUPPLY_PROP_ENERGY_NOW,
538 	POWER_SUPPLY_PROP_POWER_AVG,
539 	POWER_SUPPLY_PROP_HEALTH,
540 	POWER_SUPPLY_PROP_MANUFACTURER,
541 };
542 
543 static enum power_supply_property bq27520g4_props[] = {
544 	POWER_SUPPLY_PROP_STATUS,
545 	POWER_SUPPLY_PROP_PRESENT,
546 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
547 	POWER_SUPPLY_PROP_CURRENT_NOW,
548 	POWER_SUPPLY_PROP_CAPACITY,
549 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
550 	POWER_SUPPLY_PROP_TEMP,
551 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
552 	POWER_SUPPLY_PROP_TECHNOLOGY,
553 	POWER_SUPPLY_PROP_CHARGE_FULL,
554 	POWER_SUPPLY_PROP_CHARGE_NOW,
555 	POWER_SUPPLY_PROP_CYCLE_COUNT,
556 	POWER_SUPPLY_PROP_HEALTH,
557 	POWER_SUPPLY_PROP_MANUFACTURER,
558 };
559 
560 static enum power_supply_property bq27530_props[] = {
561 	POWER_SUPPLY_PROP_STATUS,
562 	POWER_SUPPLY_PROP_PRESENT,
563 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
564 	POWER_SUPPLY_PROP_CURRENT_NOW,
565 	POWER_SUPPLY_PROP_CAPACITY,
566 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
567 	POWER_SUPPLY_PROP_TEMP,
568 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
569 	POWER_SUPPLY_PROP_TECHNOLOGY,
570 	POWER_SUPPLY_PROP_CHARGE_FULL,
571 	POWER_SUPPLY_PROP_CHARGE_NOW,
572 	POWER_SUPPLY_PROP_POWER_AVG,
573 	POWER_SUPPLY_PROP_HEALTH,
574 	POWER_SUPPLY_PROP_CYCLE_COUNT,
575 	POWER_SUPPLY_PROP_MANUFACTURER,
576 };
577 #define bq27531_props bq27530_props
578 
579 static enum power_supply_property bq27541_props[] = {
580 	POWER_SUPPLY_PROP_STATUS,
581 	POWER_SUPPLY_PROP_PRESENT,
582 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
583 	POWER_SUPPLY_PROP_CURRENT_NOW,
584 	POWER_SUPPLY_PROP_CAPACITY,
585 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
586 	POWER_SUPPLY_PROP_TEMP,
587 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
588 	POWER_SUPPLY_PROP_TECHNOLOGY,
589 	POWER_SUPPLY_PROP_CHARGE_FULL,
590 	POWER_SUPPLY_PROP_CHARGE_NOW,
591 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
592 	POWER_SUPPLY_PROP_CYCLE_COUNT,
593 	POWER_SUPPLY_PROP_POWER_AVG,
594 	POWER_SUPPLY_PROP_HEALTH,
595 	POWER_SUPPLY_PROP_MANUFACTURER,
596 };
597 #define bq27542_props bq27541_props
598 #define bq27546_props bq27541_props
599 #define bq27742_props bq27541_props
600 
601 static enum power_supply_property bq27545_props[] = {
602 	POWER_SUPPLY_PROP_STATUS,
603 	POWER_SUPPLY_PROP_PRESENT,
604 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
605 	POWER_SUPPLY_PROP_CURRENT_NOW,
606 	POWER_SUPPLY_PROP_CAPACITY,
607 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
608 	POWER_SUPPLY_PROP_TEMP,
609 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
610 	POWER_SUPPLY_PROP_TECHNOLOGY,
611 	POWER_SUPPLY_PROP_CHARGE_FULL,
612 	POWER_SUPPLY_PROP_CHARGE_NOW,
613 	POWER_SUPPLY_PROP_HEALTH,
614 	POWER_SUPPLY_PROP_CYCLE_COUNT,
615 	POWER_SUPPLY_PROP_POWER_AVG,
616 	POWER_SUPPLY_PROP_MANUFACTURER,
617 };
618 
619 static enum power_supply_property bq27421_props[] = {
620 	POWER_SUPPLY_PROP_STATUS,
621 	POWER_SUPPLY_PROP_PRESENT,
622 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
623 	POWER_SUPPLY_PROP_CURRENT_NOW,
624 	POWER_SUPPLY_PROP_CAPACITY,
625 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
626 	POWER_SUPPLY_PROP_TEMP,
627 	POWER_SUPPLY_PROP_TECHNOLOGY,
628 	POWER_SUPPLY_PROP_CHARGE_FULL,
629 	POWER_SUPPLY_PROP_CHARGE_NOW,
630 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
631 	POWER_SUPPLY_PROP_MANUFACTURER,
632 };
633 #define bq27425_props bq27421_props
634 #define bq27441_props bq27421_props
635 #define bq27621_props bq27421_props
636 
637 struct bq27xxx_dm_reg {
638 	u8 subclass_id;
639 	u8 offset;
640 	u8 bytes;
641 	u16 min, max;
642 };
643 
644 enum bq27xxx_dm_reg_id {
645 	BQ27XXX_DM_DESIGN_CAPACITY = 0,
646 	BQ27XXX_DM_DESIGN_ENERGY,
647 	BQ27XXX_DM_TERMINATE_VOLTAGE,
648 };
649 
650 #define bq27000_dm_regs 0
651 #define bq27010_dm_regs 0
652 #define bq2750x_dm_regs 0
653 #define bq2751x_dm_regs 0
654 #define bq2752x_dm_regs 0
655 
656 #if 0 /* not yet tested */
657 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
658 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 10, 2,    0, 65535 },
659 	[BQ27XXX_DM_DESIGN_ENERGY]     = { }, /* missing on chip */
660 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
661 };
662 #else
663 #define bq27500_dm_regs 0
664 #endif
665 
666 /* todo create data memory definitions from datasheets and test on chips */
667 #define bq27510g1_dm_regs 0
668 #define bq27510g2_dm_regs 0
669 #define bq27510g3_dm_regs 0
670 #define bq27520g1_dm_regs 0
671 #define bq27520g2_dm_regs 0
672 #define bq27520g3_dm_regs 0
673 #define bq27520g4_dm_regs 0
674 #define bq27530_dm_regs 0
675 #define bq27531_dm_regs 0
676 #define bq27541_dm_regs 0
677 #define bq27542_dm_regs 0
678 #define bq27546_dm_regs 0
679 #define bq27742_dm_regs 0
680 
681 #if 0 /* not yet tested */
682 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
683 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 23, 2,    0, 32767 },
684 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 48, 25, 2,    0, 32767 },
685 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800,  3700 },
686 };
687 #else
688 #define bq27545_dm_regs 0
689 #endif
690 
691 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
692 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 10, 2,    0,  8000 },
693 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 12, 2,    0, 32767 },
694 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500,  3700 },
695 };
696 
697 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
698 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 12, 2,    0, 32767 },
699 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 14, 2,    0, 32767 },
700 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800,  3700 },
701 };
702 
703 #if 0 /* not yet tested */
704 #define bq27441_dm_regs bq27421_dm_regs
705 #else
706 #define bq27441_dm_regs 0
707 #endif
708 
709 #if 0 /* not yet tested */
710 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
711 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 3, 2,    0,  8000 },
712 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 5, 2,    0, 32767 },
713 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500,  3700 },
714 };
715 #else
716 #define bq27621_dm_regs 0
717 #endif
718 
719 #define BQ27XXX_O_ZERO	0x00000001
720 #define BQ27XXX_O_OTDC	0x00000002
721 #define BQ27XXX_O_UTOT  0x00000004
722 #define BQ27XXX_O_CFGUP	0x00000008
723 #define BQ27XXX_O_RAM	0x00000010
724 
725 #define BQ27XXX_DATA(ref, key, opt) {		\
726 	.opts = (opt),				\
727 	.unseal_key = key,			\
728 	.regs  = ref##_regs,			\
729 	.dm_regs = ref##_dm_regs,		\
730 	.props = ref##_props,			\
731 	.props_size = ARRAY_SIZE(ref##_props) }
732 
733 static struct {
734 	u32 opts;
735 	u32 unseal_key;
736 	u8 *regs;
737 	struct bq27xxx_dm_reg *dm_regs;
738 	enum power_supply_property *props;
739 	size_t props_size;
740 } bq27xxx_chip_data[] = {
741 	[BQ27000]   = BQ27XXX_DATA(bq27000,   0         , BQ27XXX_O_ZERO),
742 	[BQ27010]   = BQ27XXX_DATA(bq27010,   0         , BQ27XXX_O_ZERO),
743 	[BQ2750X]   = BQ27XXX_DATA(bq2750x,   0         , BQ27XXX_O_OTDC),
744 	[BQ2751X]   = BQ27XXX_DATA(bq2751x,   0         , BQ27XXX_O_OTDC),
745 	[BQ2752X]   = BQ27XXX_DATA(bq2752x,   0         , BQ27XXX_O_OTDC),
746 	[BQ27500]   = BQ27XXX_DATA(bq27500,   0x04143672, BQ27XXX_O_OTDC),
747 	[BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0         , BQ27XXX_O_OTDC),
748 	[BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0         , BQ27XXX_O_OTDC),
749 	[BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0         , BQ27XXX_O_OTDC),
750 	[BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0         , BQ27XXX_O_OTDC),
751 	[BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0         , BQ27XXX_O_OTDC),
752 	[BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0         , BQ27XXX_O_OTDC),
753 	[BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0         , BQ27XXX_O_OTDC),
754 	[BQ27530]   = BQ27XXX_DATA(bq27530,   0         , BQ27XXX_O_UTOT),
755 	[BQ27531]   = BQ27XXX_DATA(bq27531,   0         , BQ27XXX_O_UTOT),
756 	[BQ27541]   = BQ27XXX_DATA(bq27541,   0         , BQ27XXX_O_OTDC),
757 	[BQ27542]   = BQ27XXX_DATA(bq27542,   0         , BQ27XXX_O_OTDC),
758 	[BQ27546]   = BQ27XXX_DATA(bq27546,   0         , BQ27XXX_O_OTDC),
759 	[BQ27742]   = BQ27XXX_DATA(bq27742,   0         , BQ27XXX_O_OTDC),
760 	[BQ27545]   = BQ27XXX_DATA(bq27545,   0x04143672, BQ27XXX_O_OTDC),
761 	[BQ27421]   = BQ27XXX_DATA(bq27421,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
762 	[BQ27425]   = BQ27XXX_DATA(bq27425,   0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
763 	[BQ27441]   = BQ27XXX_DATA(bq27441,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
764 	[BQ27621]   = BQ27XXX_DATA(bq27621,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
765 };
766 
767 static DEFINE_MUTEX(bq27xxx_list_lock);
768 static LIST_HEAD(bq27xxx_battery_devices);
769 
770 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
771 
772 #define BQ27XXX_DM_SZ	32
773 
774 /**
775  * struct bq27xxx_dm_buf - chip data memory buffer
776  * @class: data memory subclass_id
777  * @block: data memory block number
778  * @data: data from/for the block
779  * @has_data: true if data has been filled by read
780  * @dirty: true if data has changed since last read/write
781  *
782  * Encapsulates info required to manage chip data memory blocks.
783  */
784 struct bq27xxx_dm_buf {
785 	u8 class;
786 	u8 block;
787 	u8 data[BQ27XXX_DM_SZ];
788 	bool has_data, dirty;
789 };
790 
791 #define BQ27XXX_DM_BUF(di, i) { \
792 	.class = (di)->dm_regs[i].subclass_id, \
793 	.block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
794 }
795 
796 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
797 				      struct bq27xxx_dm_reg *reg)
798 {
799 	if (buf->class == reg->subclass_id &&
800 	    buf->block == reg->offset / BQ27XXX_DM_SZ)
801 		return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
802 
803 	return NULL;
804 }
805 
806 static const char * const bq27xxx_dm_reg_name[] = {
807 	[BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
808 	[BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
809 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
810 };
811 
812 
813 static bool bq27xxx_dt_to_nvm = true;
814 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
815 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
816 	"Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
817 	"Users must set this =0 when installing a different type of battery!\n"
818 	"Default is =1."
819 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
820 	"\nSetting this affects future kernel updates, not the current configuration."
821 #endif
822 );
823 
824 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
825 {
826 	struct bq27xxx_device_info *di;
827 	unsigned int prev_val = *(unsigned int *) kp->arg;
828 	int ret;
829 
830 	ret = param_set_uint(val, kp);
831 	if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
832 		return ret;
833 
834 	mutex_lock(&bq27xxx_list_lock);
835 	list_for_each_entry(di, &bq27xxx_battery_devices, list) {
836 		cancel_delayed_work_sync(&di->work);
837 		schedule_delayed_work(&di->work, 0);
838 	}
839 	mutex_unlock(&bq27xxx_list_lock);
840 
841 	return ret;
842 }
843 
844 static const struct kernel_param_ops param_ops_poll_interval = {
845 	.get = param_get_uint,
846 	.set = poll_interval_param_set,
847 };
848 
849 static unsigned int poll_interval = 360;
850 module_param_cb(poll_interval, &param_ops_poll_interval, &poll_interval, 0644);
851 MODULE_PARM_DESC(poll_interval,
852 		 "battery poll interval in seconds - 0 disables polling");
853 
854 /*
855  * Common code for BQ27xxx devices
856  */
857 
858 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
859 			       bool single)
860 {
861 	int ret;
862 
863 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
864 		return -EINVAL;
865 
866 	ret = di->bus.read(di, di->regs[reg_index], single);
867 	if (ret < 0)
868 		dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
869 			di->regs[reg_index], reg_index);
870 
871 	return ret;
872 }
873 
874 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
875 				u16 value, bool single)
876 {
877 	int ret;
878 
879 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
880 		return -EINVAL;
881 
882 	if (!di->bus.write)
883 		return -EPERM;
884 
885 	ret = di->bus.write(di, di->regs[reg_index], value, single);
886 	if (ret < 0)
887 		dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
888 			di->regs[reg_index], reg_index);
889 
890 	return ret;
891 }
892 
893 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
894 				     u8 *data, int len)
895 {
896 	int ret;
897 
898 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
899 		return -EINVAL;
900 
901 	if (!di->bus.read_bulk)
902 		return -EPERM;
903 
904 	ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
905 	if (ret < 0)
906 		dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
907 			di->regs[reg_index], reg_index);
908 
909 	return ret;
910 }
911 
912 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
913 				      u8 *data, int len)
914 {
915 	int ret;
916 
917 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
918 		return -EINVAL;
919 
920 	if (!di->bus.write_bulk)
921 		return -EPERM;
922 
923 	ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
924 	if (ret < 0)
925 		dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
926 			di->regs[reg_index], reg_index);
927 
928 	return ret;
929 }
930 
931 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
932 {
933 	int ret;
934 
935 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
936 	if (ret < 0) {
937 		dev_err(di->dev, "bus error on seal: %d\n", ret);
938 		return ret;
939 	}
940 
941 	return 0;
942 }
943 
944 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
945 {
946 	int ret;
947 
948 	if (di->unseal_key == 0) {
949 		dev_err(di->dev, "unseal failed due to missing key\n");
950 		return -EINVAL;
951 	}
952 
953 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
954 	if (ret < 0)
955 		goto out;
956 
957 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
958 	if (ret < 0)
959 		goto out;
960 
961 	return 0;
962 
963 out:
964 	dev_err(di->dev, "bus error on unseal: %d\n", ret);
965 	return ret;
966 }
967 
968 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
969 {
970 	u16 sum = 0;
971 	int i;
972 
973 	for (i = 0; i < BQ27XXX_DM_SZ; i++)
974 		sum += buf->data[i];
975 	sum &= 0xff;
976 
977 	return 0xff - sum;
978 }
979 
980 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
981 					 struct bq27xxx_dm_buf *buf)
982 {
983 	int ret;
984 
985 	buf->has_data = false;
986 
987 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
988 	if (ret < 0)
989 		goto out;
990 
991 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
992 	if (ret < 0)
993 		goto out;
994 
995 	BQ27XXX_MSLEEP(1);
996 
997 	ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
998 	if (ret < 0)
999 		goto out;
1000 
1001 	ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1002 	if (ret < 0)
1003 		goto out;
1004 
1005 	if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1006 		ret = -EINVAL;
1007 		goto out;
1008 	}
1009 
1010 	buf->has_data = true;
1011 	buf->dirty = false;
1012 
1013 	return 0;
1014 
1015 out:
1016 	dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1017 	return ret;
1018 }
1019 
1020 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1021 					    struct bq27xxx_dm_buf *buf,
1022 					    enum bq27xxx_dm_reg_id reg_id,
1023 					    unsigned int val)
1024 {
1025 	struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1026 	const char *str = bq27xxx_dm_reg_name[reg_id];
1027 	u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1028 
1029 	if (prev == NULL) {
1030 		dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1031 		return;
1032 	}
1033 
1034 	if (reg->bytes != 2) {
1035 		dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1036 		return;
1037 	}
1038 
1039 	if (!buf->has_data)
1040 		return;
1041 
1042 	if (be16_to_cpup(prev) == val) {
1043 		dev_info(di->dev, "%s has %u\n", str, val);
1044 		return;
1045 	}
1046 
1047 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1048 	if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1049 #else
1050 	if (!(di->opts & BQ27XXX_O_RAM)) {
1051 #endif
1052 		/* devicetree and NVM differ; defer to NVM */
1053 		dev_warn(di->dev, "%s has %u; update to %u disallowed "
1054 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1055 			 "by dt_monitored_battery_updates_nvm=0"
1056 #else
1057 			 "for flash/NVM data memory"
1058 #endif
1059 			 "\n", str, be16_to_cpup(prev), val);
1060 		return;
1061 	}
1062 
1063 	dev_info(di->dev, "update %s to %u\n", str, val);
1064 
1065 	*prev = cpu_to_be16(val);
1066 	buf->dirty = true;
1067 }
1068 
1069 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1070 {
1071 	const int limit = 100;
1072 	u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1073 	int ret, try = limit;
1074 
1075 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1076 	if (ret < 0)
1077 		return ret;
1078 
1079 	do {
1080 		BQ27XXX_MSLEEP(25);
1081 		ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1082 		if (ret < 0)
1083 			return ret;
1084 	} while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1085 
1086 	if (!try && di->chip != BQ27425) { // 425 has a bug
1087 		dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1088 		return -EINVAL;
1089 	}
1090 
1091 	if (limit - try > 3)
1092 		dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1093 
1094 	return 0;
1095 }
1096 
1097 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1098 {
1099 	int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1100 	if (ret < 0 && ret != -EINVAL)
1101 		dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1102 
1103 	return ret;
1104 }
1105 
1106 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1107 {
1108 	int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1109 	if (ret < 0 && ret != -EINVAL)
1110 		dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1111 
1112 	return ret;
1113 }
1114 
1115 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1116 					  struct bq27xxx_dm_buf *buf)
1117 {
1118 	bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1119 	int ret;
1120 
1121 	if (!buf->dirty)
1122 		return 0;
1123 
1124 	if (cfgup) {
1125 		ret = bq27xxx_battery_set_cfgupdate(di);
1126 		if (ret < 0)
1127 			return ret;
1128 	}
1129 
1130 	ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1131 	if (ret < 0)
1132 		goto out;
1133 
1134 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1135 	if (ret < 0)
1136 		goto out;
1137 
1138 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1139 	if (ret < 0)
1140 		goto out;
1141 
1142 	BQ27XXX_MSLEEP(1);
1143 
1144 	ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1145 	if (ret < 0)
1146 		goto out;
1147 
1148 	ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1149 			    bq27xxx_battery_checksum_dm_block(buf), true);
1150 	if (ret < 0)
1151 		goto out;
1152 
1153 	/* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1154 	 * corruption on the '425 chip (and perhaps others), which can damage
1155 	 * the chip.
1156 	 */
1157 
1158 	if (cfgup) {
1159 		BQ27XXX_MSLEEP(1);
1160 		ret = bq27xxx_battery_soft_reset(di);
1161 		if (ret < 0)
1162 			return ret;
1163 	} else {
1164 		BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1165 	}
1166 
1167 	buf->dirty = false;
1168 
1169 	return 0;
1170 
1171 out:
1172 	if (cfgup)
1173 		bq27xxx_battery_soft_reset(di);
1174 
1175 	dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1176 	return ret;
1177 }
1178 
1179 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1180 				       struct power_supply_battery_info *info)
1181 {
1182 	struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1183 	struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1184 	bool updated;
1185 
1186 	if (bq27xxx_battery_unseal(di) < 0)
1187 		return;
1188 
1189 	if (info->charge_full_design_uah != -EINVAL &&
1190 	    info->energy_full_design_uwh != -EINVAL) {
1191 		bq27xxx_battery_read_dm_block(di, &bd);
1192 		/* assume design energy & capacity are in same block */
1193 		bq27xxx_battery_update_dm_block(di, &bd,
1194 					BQ27XXX_DM_DESIGN_CAPACITY,
1195 					info->charge_full_design_uah / 1000);
1196 		bq27xxx_battery_update_dm_block(di, &bd,
1197 					BQ27XXX_DM_DESIGN_ENERGY,
1198 					info->energy_full_design_uwh / 1000);
1199 	}
1200 
1201 	if (info->voltage_min_design_uv != -EINVAL) {
1202 		bool same = bd.class == bt.class && bd.block == bt.block;
1203 		if (!same)
1204 			bq27xxx_battery_read_dm_block(di, &bt);
1205 		bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1206 					BQ27XXX_DM_TERMINATE_VOLTAGE,
1207 					info->voltage_min_design_uv / 1000);
1208 	}
1209 
1210 	updated = bd.dirty || bt.dirty;
1211 
1212 	bq27xxx_battery_write_dm_block(di, &bd);
1213 	bq27xxx_battery_write_dm_block(di, &bt);
1214 
1215 	bq27xxx_battery_seal(di);
1216 
1217 	if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1218 		bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1219 		BQ27XXX_MSLEEP(300); /* reset time is not documented */
1220 	}
1221 	/* assume bq27xxx_battery_update() is called hereafter */
1222 }
1223 
1224 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1225 {
1226 	struct power_supply_battery_info info = {};
1227 	unsigned int min, max;
1228 
1229 	if (power_supply_get_battery_info(di->bat, &info) < 0)
1230 		return;
1231 
1232 	if (!di->dm_regs) {
1233 		dev_warn(di->dev, "data memory update not supported for chip\n");
1234 		return;
1235 	}
1236 
1237 	if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1238 		if (info.energy_full_design_uwh == -EINVAL)
1239 			dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1240 		else if (info.charge_full_design_uah == -EINVAL)
1241 			dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1242 	}
1243 
1244 	/* assume min == 0 */
1245 	max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1246 	if (info.energy_full_design_uwh > max * 1000) {
1247 		dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1248 			info.energy_full_design_uwh);
1249 		info.energy_full_design_uwh = -EINVAL;
1250 	}
1251 
1252 	/* assume min == 0 */
1253 	max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1254 	if (info.charge_full_design_uah > max * 1000) {
1255 		dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1256 			info.charge_full_design_uah);
1257 		info.charge_full_design_uah = -EINVAL;
1258 	}
1259 
1260 	min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1261 	max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1262 	if ((info.voltage_min_design_uv < min * 1000 ||
1263 	     info.voltage_min_design_uv > max * 1000) &&
1264 	     info.voltage_min_design_uv != -EINVAL) {
1265 		dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1266 			info.voltage_min_design_uv);
1267 		info.voltage_min_design_uv = -EINVAL;
1268 	}
1269 
1270 	if ((info.energy_full_design_uwh != -EINVAL &&
1271 	     info.charge_full_design_uah != -EINVAL) ||
1272 	     info.voltage_min_design_uv  != -EINVAL)
1273 		bq27xxx_battery_set_config(di, &info);
1274 }
1275 
1276 /*
1277  * Return the battery State-of-Charge
1278  * Or < 0 if something fails.
1279  */
1280 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1281 {
1282 	int soc;
1283 
1284 	if (di->opts & BQ27XXX_O_ZERO)
1285 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1286 	else
1287 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1288 
1289 	if (soc < 0)
1290 		dev_dbg(di->dev, "error reading State-of-Charge\n");
1291 
1292 	return soc;
1293 }
1294 
1295 /*
1296  * Return a battery charge value in µAh
1297  * Or < 0 if something fails.
1298  */
1299 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1300 {
1301 	int charge;
1302 
1303 	charge = bq27xxx_read(di, reg, false);
1304 	if (charge < 0) {
1305 		dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1306 			reg, charge);
1307 		return charge;
1308 	}
1309 
1310 	if (di->opts & BQ27XXX_O_ZERO)
1311 		charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1312 	else
1313 		charge *= 1000;
1314 
1315 	return charge;
1316 }
1317 
1318 /*
1319  * Return the battery Nominal available capacity in µAh
1320  * Or < 0 if something fails.
1321  */
1322 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1323 {
1324 	int flags;
1325 
1326 	if (di->opts & BQ27XXX_O_ZERO) {
1327 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1328 		if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1329 			return -ENODATA;
1330 	}
1331 
1332 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1333 }
1334 
1335 /*
1336  * Return the battery Full Charge Capacity in µAh
1337  * Or < 0 if something fails.
1338  */
1339 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1340 {
1341 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1342 }
1343 
1344 /*
1345  * Return the Design Capacity in µAh
1346  * Or < 0 if something fails.
1347  */
1348 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1349 {
1350 	int dcap;
1351 
1352 	if (di->opts & BQ27XXX_O_ZERO)
1353 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1354 	else
1355 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1356 
1357 	if (dcap < 0) {
1358 		dev_dbg(di->dev, "error reading initial last measured discharge\n");
1359 		return dcap;
1360 	}
1361 
1362 	if (di->opts & BQ27XXX_O_ZERO)
1363 		dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1364 	else
1365 		dcap *= 1000;
1366 
1367 	return dcap;
1368 }
1369 
1370 /*
1371  * Return the battery Available energy in µWh
1372  * Or < 0 if something fails.
1373  */
1374 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1375 {
1376 	int ae;
1377 
1378 	ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1379 	if (ae < 0) {
1380 		dev_dbg(di->dev, "error reading available energy\n");
1381 		return ae;
1382 	}
1383 
1384 	if (di->opts & BQ27XXX_O_ZERO)
1385 		ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1386 	else
1387 		ae *= 1000;
1388 
1389 	return ae;
1390 }
1391 
1392 /*
1393  * Return the battery temperature in tenths of degree Kelvin
1394  * Or < 0 if something fails.
1395  */
1396 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1397 {
1398 	int temp;
1399 
1400 	temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1401 	if (temp < 0) {
1402 		dev_err(di->dev, "error reading temperature\n");
1403 		return temp;
1404 	}
1405 
1406 	if (di->opts & BQ27XXX_O_ZERO)
1407 		temp = 5 * temp / 2;
1408 
1409 	return temp;
1410 }
1411 
1412 /*
1413  * Return the battery Cycle count total
1414  * Or < 0 if something fails.
1415  */
1416 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1417 {
1418 	int cyct;
1419 
1420 	cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1421 	if (cyct < 0)
1422 		dev_err(di->dev, "error reading cycle count total\n");
1423 
1424 	return cyct;
1425 }
1426 
1427 /*
1428  * Read a time register.
1429  * Return < 0 if something fails.
1430  */
1431 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1432 {
1433 	int tval;
1434 
1435 	tval = bq27xxx_read(di, reg, false);
1436 	if (tval < 0) {
1437 		dev_dbg(di->dev, "error reading time register %02x: %d\n",
1438 			reg, tval);
1439 		return tval;
1440 	}
1441 
1442 	if (tval == 65535)
1443 		return -ENODATA;
1444 
1445 	return tval * 60;
1446 }
1447 
1448 /*
1449  * Read an average power register.
1450  * Return < 0 if something fails.
1451  */
1452 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1453 {
1454 	int tval;
1455 
1456 	tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1457 	if (tval < 0) {
1458 		dev_err(di->dev, "error reading average power register  %02x: %d\n",
1459 			BQ27XXX_REG_AP, tval);
1460 		return tval;
1461 	}
1462 
1463 	if (di->opts & BQ27XXX_O_ZERO)
1464 		return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1465 	else
1466 		return tval;
1467 }
1468 
1469 /*
1470  * Returns true if a battery over temperature condition is detected
1471  */
1472 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1473 {
1474 	if (di->opts & BQ27XXX_O_OTDC)
1475 		return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1476         if (di->opts & BQ27XXX_O_UTOT)
1477 		return flags & BQ27XXX_FLAG_OT;
1478 
1479 	return false;
1480 }
1481 
1482 /*
1483  * Returns true if a battery under temperature condition is detected
1484  */
1485 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1486 {
1487 	if (di->opts & BQ27XXX_O_UTOT)
1488 		return flags & BQ27XXX_FLAG_UT;
1489 
1490 	return false;
1491 }
1492 
1493 /*
1494  * Returns true if a low state of charge condition is detected
1495  */
1496 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1497 {
1498 	if (di->opts & BQ27XXX_O_ZERO)
1499 		return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1500 	else
1501 		return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1502 }
1503 
1504 /*
1505  * Read flag register.
1506  * Return < 0 if something fails.
1507  */
1508 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1509 {
1510 	int flags;
1511 	bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1512 
1513 	flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1514 	if (flags < 0) {
1515 		dev_err(di->dev, "error reading flag register:%d\n", flags);
1516 		return flags;
1517 	}
1518 
1519 	/* Unlikely but important to return first */
1520 	if (unlikely(bq27xxx_battery_overtemp(di, flags)))
1521 		return POWER_SUPPLY_HEALTH_OVERHEAT;
1522 	if (unlikely(bq27xxx_battery_undertemp(di, flags)))
1523 		return POWER_SUPPLY_HEALTH_COLD;
1524 	if (unlikely(bq27xxx_battery_dead(di, flags)))
1525 		return POWER_SUPPLY_HEALTH_DEAD;
1526 
1527 	return POWER_SUPPLY_HEALTH_GOOD;
1528 }
1529 
1530 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1531 {
1532 	struct bq27xxx_reg_cache cache = {0, };
1533 	bool has_ci_flag = di->opts & BQ27XXX_O_ZERO;
1534 	bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1535 
1536 	cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1537 	if ((cache.flags & 0xff) == 0xff)
1538 		cache.flags = -1; /* read error */
1539 	if (cache.flags >= 0) {
1540 		cache.temperature = bq27xxx_battery_read_temperature(di);
1541 		if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1542 			dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1543 			cache.capacity = -ENODATA;
1544 			cache.energy = -ENODATA;
1545 			cache.time_to_empty = -ENODATA;
1546 			cache.time_to_empty_avg = -ENODATA;
1547 			cache.time_to_full = -ENODATA;
1548 			cache.charge_full = -ENODATA;
1549 			cache.health = -ENODATA;
1550 		} else {
1551 			if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1552 				cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1553 			if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1554 				cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1555 			if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1556 				cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1557 			cache.charge_full = bq27xxx_battery_read_fcc(di);
1558 			cache.capacity = bq27xxx_battery_read_soc(di);
1559 			if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1560 				cache.energy = bq27xxx_battery_read_energy(di);
1561 			cache.health = bq27xxx_battery_read_health(di);
1562 		}
1563 		if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1564 			cache.cycle_count = bq27xxx_battery_read_cyct(di);
1565 		if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1566 			cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1567 
1568 		/* We only have to read charge design full once */
1569 		if (di->charge_design_full <= 0)
1570 			di->charge_design_full = bq27xxx_battery_read_dcap(di);
1571 	}
1572 
1573 	if (di->cache.capacity != cache.capacity)
1574 		power_supply_changed(di->bat);
1575 
1576 	if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1577 		di->cache = cache;
1578 
1579 	di->last_update = jiffies;
1580 }
1581 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1582 
1583 static void bq27xxx_battery_poll(struct work_struct *work)
1584 {
1585 	struct bq27xxx_device_info *di =
1586 			container_of(work, struct bq27xxx_device_info,
1587 				     work.work);
1588 
1589 	bq27xxx_battery_update(di);
1590 
1591 	if (poll_interval > 0)
1592 		schedule_delayed_work(&di->work, poll_interval * HZ);
1593 }
1594 
1595 /*
1596  * Return the battery average current in µA
1597  * Note that current can be negative signed as well
1598  * Or 0 if something fails.
1599  */
1600 static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1601 				   union power_supply_propval *val)
1602 {
1603 	int curr;
1604 	int flags;
1605 
1606 	curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1607 	if (curr < 0) {
1608 		dev_err(di->dev, "error reading current\n");
1609 		return curr;
1610 	}
1611 
1612 	if (di->opts & BQ27XXX_O_ZERO) {
1613 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1614 		if (flags & BQ27000_FLAG_CHGS) {
1615 			dev_dbg(di->dev, "negative current!\n");
1616 			curr = -curr;
1617 		}
1618 
1619 		val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1620 	} else {
1621 		/* Other gauges return signed value */
1622 		val->intval = (int)((s16)curr) * 1000;
1623 	}
1624 
1625 	return 0;
1626 }
1627 
1628 static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1629 				  union power_supply_propval *val)
1630 {
1631 	int status;
1632 
1633 	if (di->opts & BQ27XXX_O_ZERO) {
1634 		if (di->cache.flags & BQ27000_FLAG_FC)
1635 			status = POWER_SUPPLY_STATUS_FULL;
1636 		else if (di->cache.flags & BQ27000_FLAG_CHGS)
1637 			status = POWER_SUPPLY_STATUS_CHARGING;
1638 		else if (power_supply_am_i_supplied(di->bat))
1639 			status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1640 		else
1641 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1642 	} else {
1643 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1644 			status = POWER_SUPPLY_STATUS_FULL;
1645 		else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1646 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1647 		else
1648 			status = POWER_SUPPLY_STATUS_CHARGING;
1649 	}
1650 
1651 	val->intval = status;
1652 
1653 	return 0;
1654 }
1655 
1656 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1657 					  union power_supply_propval *val)
1658 {
1659 	int level;
1660 
1661 	if (di->opts & BQ27XXX_O_ZERO) {
1662 		if (di->cache.flags & BQ27000_FLAG_FC)
1663 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1664 		else if (di->cache.flags & BQ27000_FLAG_EDV1)
1665 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1666 		else if (di->cache.flags & BQ27000_FLAG_EDVF)
1667 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1668 		else
1669 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1670 	} else {
1671 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1672 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1673 		else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1674 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1675 		else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1676 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1677 		else
1678 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1679 	}
1680 
1681 	val->intval = level;
1682 
1683 	return 0;
1684 }
1685 
1686 /*
1687  * Return the battery Voltage in millivolts
1688  * Or < 0 if something fails.
1689  */
1690 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1691 				   union power_supply_propval *val)
1692 {
1693 	int volt;
1694 
1695 	volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1696 	if (volt < 0) {
1697 		dev_err(di->dev, "error reading voltage\n");
1698 		return volt;
1699 	}
1700 
1701 	val->intval = volt * 1000;
1702 
1703 	return 0;
1704 }
1705 
1706 static int bq27xxx_simple_value(int value,
1707 				union power_supply_propval *val)
1708 {
1709 	if (value < 0)
1710 		return value;
1711 
1712 	val->intval = value;
1713 
1714 	return 0;
1715 }
1716 
1717 static int bq27xxx_battery_get_property(struct power_supply *psy,
1718 					enum power_supply_property psp,
1719 					union power_supply_propval *val)
1720 {
1721 	int ret = 0;
1722 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1723 
1724 	mutex_lock(&di->lock);
1725 	if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1726 		cancel_delayed_work_sync(&di->work);
1727 		bq27xxx_battery_poll(&di->work.work);
1728 	}
1729 	mutex_unlock(&di->lock);
1730 
1731 	if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1732 		return -ENODEV;
1733 
1734 	switch (psp) {
1735 	case POWER_SUPPLY_PROP_STATUS:
1736 		ret = bq27xxx_battery_status(di, val);
1737 		break;
1738 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1739 		ret = bq27xxx_battery_voltage(di, val);
1740 		break;
1741 	case POWER_SUPPLY_PROP_PRESENT:
1742 		val->intval = di->cache.flags < 0 ? 0 : 1;
1743 		break;
1744 	case POWER_SUPPLY_PROP_CURRENT_NOW:
1745 		ret = bq27xxx_battery_current(di, val);
1746 		break;
1747 	case POWER_SUPPLY_PROP_CAPACITY:
1748 		ret = bq27xxx_simple_value(di->cache.capacity, val);
1749 		break;
1750 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1751 		ret = bq27xxx_battery_capacity_level(di, val);
1752 		break;
1753 	case POWER_SUPPLY_PROP_TEMP:
1754 		ret = bq27xxx_simple_value(di->cache.temperature, val);
1755 		if (ret == 0)
1756 			val->intval -= 2731; /* convert decidegree k to c */
1757 		break;
1758 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1759 		ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1760 		break;
1761 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1762 		ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1763 		break;
1764 	case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1765 		ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1766 		break;
1767 	case POWER_SUPPLY_PROP_TECHNOLOGY:
1768 		val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1769 		break;
1770 	case POWER_SUPPLY_PROP_CHARGE_NOW:
1771 		ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1772 		break;
1773 	case POWER_SUPPLY_PROP_CHARGE_FULL:
1774 		ret = bq27xxx_simple_value(di->cache.charge_full, val);
1775 		break;
1776 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1777 		ret = bq27xxx_simple_value(di->charge_design_full, val);
1778 		break;
1779 	/*
1780 	 * TODO: Implement these to make registers set from
1781 	 * power_supply_battery_info visible in sysfs.
1782 	 */
1783 	case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1784 	case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1785 		return -EINVAL;
1786 	case POWER_SUPPLY_PROP_CYCLE_COUNT:
1787 		ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1788 		break;
1789 	case POWER_SUPPLY_PROP_ENERGY_NOW:
1790 		ret = bq27xxx_simple_value(di->cache.energy, val);
1791 		break;
1792 	case POWER_SUPPLY_PROP_POWER_AVG:
1793 		ret = bq27xxx_simple_value(di->cache.power_avg, val);
1794 		break;
1795 	case POWER_SUPPLY_PROP_HEALTH:
1796 		ret = bq27xxx_simple_value(di->cache.health, val);
1797 		break;
1798 	case POWER_SUPPLY_PROP_MANUFACTURER:
1799 		val->strval = BQ27XXX_MANUFACTURER;
1800 		break;
1801 	default:
1802 		return -EINVAL;
1803 	}
1804 
1805 	return ret;
1806 }
1807 
1808 static void bq27xxx_external_power_changed(struct power_supply *psy)
1809 {
1810 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1811 
1812 	cancel_delayed_work_sync(&di->work);
1813 	schedule_delayed_work(&di->work, 0);
1814 }
1815 
1816 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
1817 {
1818 	struct power_supply_desc *psy_desc;
1819 	struct power_supply_config psy_cfg = {
1820 		.of_node = di->dev->of_node,
1821 		.drv_data = di,
1822 	};
1823 
1824 	INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
1825 	mutex_init(&di->lock);
1826 
1827 	di->regs       = bq27xxx_chip_data[di->chip].regs;
1828 	di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
1829 	di->dm_regs    = bq27xxx_chip_data[di->chip].dm_regs;
1830 	di->opts       = bq27xxx_chip_data[di->chip].opts;
1831 
1832 	psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
1833 	if (!psy_desc)
1834 		return -ENOMEM;
1835 
1836 	psy_desc->name = di->name;
1837 	psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
1838 	psy_desc->properties = bq27xxx_chip_data[di->chip].props;
1839 	psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
1840 	psy_desc->get_property = bq27xxx_battery_get_property;
1841 	psy_desc->external_power_changed = bq27xxx_external_power_changed;
1842 
1843 	di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
1844 	if (IS_ERR(di->bat)) {
1845 		dev_err(di->dev, "failed to register battery\n");
1846 		return PTR_ERR(di->bat);
1847 	}
1848 
1849 	bq27xxx_battery_settings(di);
1850 	bq27xxx_battery_update(di);
1851 
1852 	mutex_lock(&bq27xxx_list_lock);
1853 	list_add(&di->list, &bq27xxx_battery_devices);
1854 	mutex_unlock(&bq27xxx_list_lock);
1855 
1856 	return 0;
1857 }
1858 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
1859 
1860 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
1861 {
1862 	/*
1863 	 * power_supply_unregister call bq27xxx_battery_get_property which
1864 	 * call bq27xxx_battery_poll.
1865 	 * Make sure that bq27xxx_battery_poll will not call
1866 	 * schedule_delayed_work again after unregister (which cause OOPS).
1867 	 */
1868 	poll_interval = 0;
1869 
1870 	cancel_delayed_work_sync(&di->work);
1871 
1872 	power_supply_unregister(di->bat);
1873 
1874 	mutex_lock(&bq27xxx_list_lock);
1875 	list_del(&di->list);
1876 	mutex_unlock(&bq27xxx_list_lock);
1877 
1878 	mutex_destroy(&di->lock);
1879 }
1880 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
1881 
1882 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1883 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
1884 MODULE_LICENSE("GPL");
1885