1 // SPDX-License-Identifier: GPL-2.0 2 // BQ25980 Battery Charger Driver 3 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 5 #include <linux/err.h> 6 #include <linux/i2c.h> 7 #include <linux/init.h> 8 #include <linux/interrupt.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/power_supply.h> 13 #include <linux/regmap.h> 14 #include <linux/types.h> 15 #include <linux/delay.h> 16 #include <linux/device.h> 17 #include <linux/moduleparam.h> 18 #include <linux/slab.h> 19 20 #include "bq25980_charger.h" 21 22 struct bq25980_state { 23 bool dischg; 24 bool ovp; 25 bool ocp; 26 bool wdt; 27 bool tflt; 28 bool online; 29 bool ce; 30 bool hiz; 31 bool bypass; 32 33 u32 vbat_adc; 34 u32 vsys_adc; 35 u32 ibat_adc; 36 }; 37 38 enum bq25980_id { 39 BQ25980, 40 BQ25975, 41 BQ25960, 42 }; 43 44 struct bq25980_chip_info { 45 46 int model_id; 47 48 const struct regmap_config *regmap_config; 49 50 int busocp_def; 51 int busocp_sc_max; 52 int busocp_byp_max; 53 int busocp_sc_min; 54 int busocp_byp_min; 55 56 int busovp_sc_def; 57 int busovp_byp_def; 58 int busovp_sc_step; 59 60 int busovp_sc_offset; 61 int busovp_byp_step; 62 int busovp_byp_offset; 63 int busovp_sc_min; 64 int busovp_sc_max; 65 int busovp_byp_min; 66 int busovp_byp_max; 67 68 int batovp_def; 69 int batovp_max; 70 int batovp_min; 71 int batovp_step; 72 int batovp_offset; 73 74 int batocp_def; 75 int batocp_max; 76 }; 77 78 struct bq25980_init_data { 79 u32 ichg; 80 u32 bypass_ilim; 81 u32 sc_ilim; 82 u32 vreg; 83 u32 iterm; 84 u32 iprechg; 85 u32 bypass_vlim; 86 u32 sc_vlim; 87 u32 ichg_max; 88 u32 vreg_max; 89 }; 90 91 struct bq25980_device { 92 struct i2c_client *client; 93 struct device *dev; 94 struct power_supply *charger; 95 struct power_supply *battery; 96 struct mutex lock; 97 struct regmap *regmap; 98 99 char model_name[I2C_NAME_SIZE]; 100 101 struct bq25980_init_data init_data; 102 const struct bq25980_chip_info *chip_info; 103 struct bq25980_state state; 104 int watchdog_timer; 105 }; 106 107 static struct reg_default bq25980_reg_defs[] = { 108 {BQ25980_BATOVP, 0x5A}, 109 {BQ25980_BATOVP_ALM, 0x46}, 110 {BQ25980_BATOCP, 0x51}, 111 {BQ25980_BATOCP_ALM, 0x50}, 112 {BQ25980_BATUCP_ALM, 0x28}, 113 {BQ25980_CHRGR_CTRL_1, 0x0}, 114 {BQ25980_BUSOVP, 0x26}, 115 {BQ25980_BUSOVP_ALM, 0x22}, 116 {BQ25980_BUSOCP, 0xD}, 117 {BQ25980_BUSOCP_ALM, 0xC}, 118 {BQ25980_TEMP_CONTROL, 0x30}, 119 {BQ25980_TDIE_ALM, 0xC8}, 120 {BQ25980_TSBUS_FLT, 0x15}, 121 {BQ25980_TSBAT_FLG, 0x15}, 122 {BQ25980_VAC_CONTROL, 0x0}, 123 {BQ25980_CHRGR_CTRL_2, 0x0}, 124 {BQ25980_CHRGR_CTRL_3, 0x20}, 125 {BQ25980_CHRGR_CTRL_4, 0x1D}, 126 {BQ25980_CHRGR_CTRL_5, 0x18}, 127 {BQ25980_STAT1, 0x0}, 128 {BQ25980_STAT2, 0x0}, 129 {BQ25980_STAT3, 0x0}, 130 {BQ25980_STAT4, 0x0}, 131 {BQ25980_STAT5, 0x0}, 132 {BQ25980_FLAG1, 0x0}, 133 {BQ25980_FLAG2, 0x0}, 134 {BQ25980_FLAG3, 0x0}, 135 {BQ25980_FLAG4, 0x0}, 136 {BQ25980_FLAG5, 0x0}, 137 {BQ25980_MASK1, 0x0}, 138 {BQ25980_MASK2, 0x0}, 139 {BQ25980_MASK3, 0x0}, 140 {BQ25980_MASK4, 0x0}, 141 {BQ25980_MASK5, 0x0}, 142 {BQ25980_DEVICE_INFO, 0x8}, 143 {BQ25980_ADC_CONTROL1, 0x0}, 144 {BQ25980_ADC_CONTROL2, 0x0}, 145 {BQ25980_IBUS_ADC_LSB, 0x0}, 146 {BQ25980_IBUS_ADC_MSB, 0x0}, 147 {BQ25980_VBUS_ADC_LSB, 0x0}, 148 {BQ25980_VBUS_ADC_MSB, 0x0}, 149 {BQ25980_VAC1_ADC_LSB, 0x0}, 150 {BQ25980_VAC2_ADC_LSB, 0x0}, 151 {BQ25980_VOUT_ADC_LSB, 0x0}, 152 {BQ25980_VBAT_ADC_LSB, 0x0}, 153 {BQ25980_IBAT_ADC_MSB, 0x0}, 154 {BQ25980_IBAT_ADC_LSB, 0x0}, 155 {BQ25980_TSBUS_ADC_LSB, 0x0}, 156 {BQ25980_TSBAT_ADC_LSB, 0x0}, 157 {BQ25980_TDIE_ADC_LSB, 0x0}, 158 {BQ25980_DEGLITCH_TIME, 0x0}, 159 {BQ25980_CHRGR_CTRL_6, 0x0}, 160 }; 161 162 static struct reg_default bq25975_reg_defs[] = { 163 {BQ25980_BATOVP, 0x5A}, 164 {BQ25980_BATOVP_ALM, 0x46}, 165 {BQ25980_BATOCP, 0x51}, 166 {BQ25980_BATOCP_ALM, 0x50}, 167 {BQ25980_BATUCP_ALM, 0x28}, 168 {BQ25980_CHRGR_CTRL_1, 0x0}, 169 {BQ25980_BUSOVP, 0x26}, 170 {BQ25980_BUSOVP_ALM, 0x22}, 171 {BQ25980_BUSOCP, 0xD}, 172 {BQ25980_BUSOCP_ALM, 0xC}, 173 {BQ25980_TEMP_CONTROL, 0x30}, 174 {BQ25980_TDIE_ALM, 0xC8}, 175 {BQ25980_TSBUS_FLT, 0x15}, 176 {BQ25980_TSBAT_FLG, 0x15}, 177 {BQ25980_VAC_CONTROL, 0x0}, 178 {BQ25980_CHRGR_CTRL_2, 0x0}, 179 {BQ25980_CHRGR_CTRL_3, 0x20}, 180 {BQ25980_CHRGR_CTRL_4, 0x1D}, 181 {BQ25980_CHRGR_CTRL_5, 0x18}, 182 {BQ25980_STAT1, 0x0}, 183 {BQ25980_STAT2, 0x0}, 184 {BQ25980_STAT3, 0x0}, 185 {BQ25980_STAT4, 0x0}, 186 {BQ25980_STAT5, 0x0}, 187 {BQ25980_FLAG1, 0x0}, 188 {BQ25980_FLAG2, 0x0}, 189 {BQ25980_FLAG3, 0x0}, 190 {BQ25980_FLAG4, 0x0}, 191 {BQ25980_FLAG5, 0x0}, 192 {BQ25980_MASK1, 0x0}, 193 {BQ25980_MASK2, 0x0}, 194 {BQ25980_MASK3, 0x0}, 195 {BQ25980_MASK4, 0x0}, 196 {BQ25980_MASK5, 0x0}, 197 {BQ25980_DEVICE_INFO, 0x8}, 198 {BQ25980_ADC_CONTROL1, 0x0}, 199 {BQ25980_ADC_CONTROL2, 0x0}, 200 {BQ25980_IBUS_ADC_LSB, 0x0}, 201 {BQ25980_IBUS_ADC_MSB, 0x0}, 202 {BQ25980_VBUS_ADC_LSB, 0x0}, 203 {BQ25980_VBUS_ADC_MSB, 0x0}, 204 {BQ25980_VAC1_ADC_LSB, 0x0}, 205 {BQ25980_VAC2_ADC_LSB, 0x0}, 206 {BQ25980_VOUT_ADC_LSB, 0x0}, 207 {BQ25980_VBAT_ADC_LSB, 0x0}, 208 {BQ25980_IBAT_ADC_MSB, 0x0}, 209 {BQ25980_IBAT_ADC_LSB, 0x0}, 210 {BQ25980_TSBUS_ADC_LSB, 0x0}, 211 {BQ25980_TSBAT_ADC_LSB, 0x0}, 212 {BQ25980_TDIE_ADC_LSB, 0x0}, 213 {BQ25980_DEGLITCH_TIME, 0x0}, 214 {BQ25980_CHRGR_CTRL_6, 0x0}, 215 }; 216 217 static struct reg_default bq25960_reg_defs[] = { 218 {BQ25980_BATOVP, 0x5A}, 219 {BQ25980_BATOVP_ALM, 0x46}, 220 {BQ25980_BATOCP, 0x51}, 221 {BQ25980_BATOCP_ALM, 0x50}, 222 {BQ25980_BATUCP_ALM, 0x28}, 223 {BQ25980_CHRGR_CTRL_1, 0x0}, 224 {BQ25980_BUSOVP, 0x26}, 225 {BQ25980_BUSOVP_ALM, 0x22}, 226 {BQ25980_BUSOCP, 0xD}, 227 {BQ25980_BUSOCP_ALM, 0xC}, 228 {BQ25980_TEMP_CONTROL, 0x30}, 229 {BQ25980_TDIE_ALM, 0xC8}, 230 {BQ25980_TSBUS_FLT, 0x15}, 231 {BQ25980_TSBAT_FLG, 0x15}, 232 {BQ25980_VAC_CONTROL, 0x0}, 233 {BQ25980_CHRGR_CTRL_2, 0x0}, 234 {BQ25980_CHRGR_CTRL_3, 0x20}, 235 {BQ25980_CHRGR_CTRL_4, 0x1D}, 236 {BQ25980_CHRGR_CTRL_5, 0x18}, 237 {BQ25980_STAT1, 0x0}, 238 {BQ25980_STAT2, 0x0}, 239 {BQ25980_STAT3, 0x0}, 240 {BQ25980_STAT4, 0x0}, 241 {BQ25980_STAT5, 0x0}, 242 {BQ25980_FLAG1, 0x0}, 243 {BQ25980_FLAG2, 0x0}, 244 {BQ25980_FLAG3, 0x0}, 245 {BQ25980_FLAG4, 0x0}, 246 {BQ25980_FLAG5, 0x0}, 247 {BQ25980_MASK1, 0x0}, 248 {BQ25980_MASK2, 0x0}, 249 {BQ25980_MASK3, 0x0}, 250 {BQ25980_MASK4, 0x0}, 251 {BQ25980_MASK5, 0x0}, 252 {BQ25980_DEVICE_INFO, 0x8}, 253 {BQ25980_ADC_CONTROL1, 0x0}, 254 {BQ25980_ADC_CONTROL2, 0x0}, 255 {BQ25980_IBUS_ADC_LSB, 0x0}, 256 {BQ25980_IBUS_ADC_MSB, 0x0}, 257 {BQ25980_VBUS_ADC_LSB, 0x0}, 258 {BQ25980_VBUS_ADC_MSB, 0x0}, 259 {BQ25980_VAC1_ADC_LSB, 0x0}, 260 {BQ25980_VAC2_ADC_LSB, 0x0}, 261 {BQ25980_VOUT_ADC_LSB, 0x0}, 262 {BQ25980_VBAT_ADC_LSB, 0x0}, 263 {BQ25980_IBAT_ADC_MSB, 0x0}, 264 {BQ25980_IBAT_ADC_LSB, 0x0}, 265 {BQ25980_TSBUS_ADC_LSB, 0x0}, 266 {BQ25980_TSBAT_ADC_LSB, 0x0}, 267 {BQ25980_TDIE_ADC_LSB, 0x0}, 268 {BQ25980_DEGLITCH_TIME, 0x0}, 269 {BQ25980_CHRGR_CTRL_6, 0x0}, 270 }; 271 272 static int bq25980_watchdog_time[BQ25980_NUM_WD_VAL] = {5000, 10000, 50000, 273 300000}; 274 275 static int bq25980_get_input_curr_lim(struct bq25980_device *bq) 276 { 277 unsigned int busocp_reg_code; 278 int ret; 279 280 ret = regmap_read(bq->regmap, BQ25980_BUSOCP, &busocp_reg_code); 281 if (ret) 282 return ret; 283 284 return (busocp_reg_code * BQ25980_BUSOCP_STEP_uA) + BQ25980_BUSOCP_OFFSET_uA; 285 } 286 287 static int bq25980_set_hiz(struct bq25980_device *bq, int setting) 288 { 289 return regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 290 BQ25980_EN_HIZ, setting); 291 } 292 293 static int bq25980_set_input_curr_lim(struct bq25980_device *bq, int busocp) 294 { 295 unsigned int busocp_reg_code; 296 int ret; 297 298 if (!busocp) 299 return bq25980_set_hiz(bq, BQ25980_ENABLE_HIZ); 300 301 bq25980_set_hiz(bq, BQ25980_DISABLE_HIZ); 302 303 if (busocp < BQ25980_BUSOCP_MIN_uA) 304 busocp = BQ25980_BUSOCP_MIN_uA; 305 306 if (bq->state.bypass) 307 busocp = min(busocp, bq->chip_info->busocp_sc_max); 308 else 309 busocp = min(busocp, bq->chip_info->busocp_byp_max); 310 311 busocp_reg_code = (busocp - BQ25980_BUSOCP_OFFSET_uA) 312 / BQ25980_BUSOCP_STEP_uA; 313 314 ret = regmap_write(bq->regmap, BQ25980_BUSOCP, busocp_reg_code); 315 if (ret) 316 return ret; 317 318 return regmap_write(bq->regmap, BQ25980_BUSOCP_ALM, busocp_reg_code); 319 } 320 321 static int bq25980_get_input_volt_lim(struct bq25980_device *bq) 322 { 323 unsigned int busovp_reg_code; 324 unsigned int busovp_offset; 325 unsigned int busovp_step; 326 int ret; 327 328 if (bq->state.bypass) { 329 busovp_step = bq->chip_info->busovp_byp_step; 330 busovp_offset = bq->chip_info->busovp_byp_offset; 331 } else { 332 busovp_step = bq->chip_info->busovp_sc_step; 333 busovp_offset = bq->chip_info->busovp_sc_offset; 334 } 335 336 ret = regmap_read(bq->regmap, BQ25980_BUSOVP, &busovp_reg_code); 337 if (ret) 338 return ret; 339 340 return (busovp_reg_code * busovp_step) + busovp_offset; 341 } 342 343 static int bq25980_set_input_volt_lim(struct bq25980_device *bq, int busovp) 344 { 345 unsigned int busovp_reg_code; 346 unsigned int busovp_step; 347 unsigned int busovp_offset; 348 int ret; 349 350 if (bq->state.bypass) { 351 busovp_step = bq->chip_info->busovp_byp_step; 352 busovp_offset = bq->chip_info->busovp_byp_offset; 353 if (busovp > bq->chip_info->busovp_byp_max) 354 busovp = bq->chip_info->busovp_byp_max; 355 else if (busovp < bq->chip_info->busovp_byp_min) 356 busovp = bq->chip_info->busovp_byp_min; 357 } else { 358 busovp_step = bq->chip_info->busovp_sc_step; 359 busovp_offset = bq->chip_info->busovp_sc_offset; 360 if (busovp > bq->chip_info->busovp_sc_max) 361 busovp = bq->chip_info->busovp_sc_max; 362 else if (busovp < bq->chip_info->busovp_sc_min) 363 busovp = bq->chip_info->busovp_sc_min; 364 } 365 366 busovp_reg_code = (busovp - busovp_offset) / busovp_step; 367 368 ret = regmap_write(bq->regmap, BQ25980_BUSOVP, busovp_reg_code); 369 if (ret) 370 return ret; 371 372 return regmap_write(bq->regmap, BQ25980_BUSOVP_ALM, busovp_reg_code); 373 } 374 375 static int bq25980_get_const_charge_curr(struct bq25980_device *bq) 376 { 377 unsigned int batocp_reg_code; 378 int ret; 379 380 ret = regmap_read(bq->regmap, BQ25980_BATOCP, &batocp_reg_code); 381 if (ret) 382 return ret; 383 384 return (batocp_reg_code & BQ25980_BATOCP_MASK) * 385 BQ25980_BATOCP_STEP_uA; 386 } 387 388 static int bq25980_set_const_charge_curr(struct bq25980_device *bq, int batocp) 389 { 390 unsigned int batocp_reg_code; 391 int ret; 392 393 batocp = max(batocp, BQ25980_BATOCP_MIN_uA); 394 batocp = min(batocp, bq->chip_info->batocp_max); 395 396 batocp_reg_code = batocp / BQ25980_BATOCP_STEP_uA; 397 398 ret = regmap_update_bits(bq->regmap, BQ25980_BATOCP, 399 BQ25980_BATOCP_MASK, batocp_reg_code); 400 if (ret) 401 return ret; 402 403 return regmap_update_bits(bq->regmap, BQ25980_BATOCP_ALM, 404 BQ25980_BATOCP_MASK, batocp_reg_code); 405 } 406 407 static int bq25980_get_const_charge_volt(struct bq25980_device *bq) 408 { 409 unsigned int batovp_reg_code; 410 int ret; 411 412 ret = regmap_read(bq->regmap, BQ25980_BATOVP, &batovp_reg_code); 413 if (ret) 414 return ret; 415 416 return ((batovp_reg_code * bq->chip_info->batovp_step) + 417 bq->chip_info->batovp_offset); 418 } 419 420 static int bq25980_set_const_charge_volt(struct bq25980_device *bq, int batovp) 421 { 422 unsigned int batovp_reg_code; 423 int ret; 424 425 if (batovp < bq->chip_info->batovp_min) 426 batovp = bq->chip_info->batovp_min; 427 428 if (batovp > bq->chip_info->batovp_max) 429 batovp = bq->chip_info->batovp_max; 430 431 batovp_reg_code = (batovp - bq->chip_info->batovp_offset) / 432 bq->chip_info->batovp_step; 433 434 ret = regmap_write(bq->regmap, BQ25980_BATOVP, batovp_reg_code); 435 if (ret) 436 return ret; 437 438 return regmap_write(bq->regmap, BQ25980_BATOVP_ALM, batovp_reg_code); 439 } 440 441 static int bq25980_set_bypass(struct bq25980_device *bq, bool en_bypass) 442 { 443 int ret; 444 445 if (en_bypass) 446 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 447 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS); 448 else 449 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 450 BQ25980_EN_BYPASS, en_bypass); 451 if (ret) 452 return ret; 453 454 bq->state.bypass = en_bypass; 455 456 return bq->state.bypass; 457 } 458 459 static int bq25980_set_chg_en(struct bq25980_device *bq, bool en_chg) 460 { 461 int ret; 462 463 if (en_chg) 464 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 465 BQ25980_CHG_EN, BQ25980_CHG_EN); 466 else 467 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 468 BQ25980_CHG_EN, en_chg); 469 if (ret) 470 return ret; 471 472 bq->state.ce = en_chg; 473 474 return 0; 475 } 476 477 static int bq25980_get_adc_ibus(struct bq25980_device *bq) 478 { 479 int ibus_adc_lsb, ibus_adc_msb; 480 u16 ibus_adc; 481 int ret; 482 483 ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_MSB, &ibus_adc_msb); 484 if (ret) 485 return ret; 486 487 ret = regmap_read(bq->regmap, BQ25980_IBUS_ADC_LSB, &ibus_adc_lsb); 488 if (ret) 489 return ret; 490 491 ibus_adc = (ibus_adc_msb << 8) | ibus_adc_lsb; 492 493 if (ibus_adc_msb & BQ25980_ADC_POLARITY_BIT) 494 return ((ibus_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA; 495 496 return ibus_adc * BQ25980_ADC_CURR_STEP_uA; 497 } 498 499 static int bq25980_get_adc_vbus(struct bq25980_device *bq) 500 { 501 int vbus_adc_lsb, vbus_adc_msb; 502 u16 vbus_adc; 503 int ret; 504 505 ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_MSB, &vbus_adc_msb); 506 if (ret) 507 return ret; 508 509 ret = regmap_read(bq->regmap, BQ25980_VBUS_ADC_LSB, &vbus_adc_lsb); 510 if (ret) 511 return ret; 512 513 vbus_adc = (vbus_adc_msb << 8) | vbus_adc_lsb; 514 515 return vbus_adc * BQ25980_ADC_VOLT_STEP_uV; 516 } 517 518 static int bq25980_get_ibat_adc(struct bq25980_device *bq) 519 { 520 int ret; 521 int ibat_adc_lsb, ibat_adc_msb; 522 int ibat_adc; 523 524 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb); 525 if (ret) 526 return ret; 527 528 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_LSB, &ibat_adc_lsb); 529 if (ret) 530 return ret; 531 532 ibat_adc = (ibat_adc_msb << 8) | ibat_adc_lsb; 533 534 if (ibat_adc_msb & BQ25980_ADC_POLARITY_BIT) 535 return ((ibat_adc ^ 0xffff) + 1) * BQ25980_ADC_CURR_STEP_uA; 536 537 return ibat_adc * BQ25980_ADC_CURR_STEP_uA; 538 } 539 540 static int bq25980_get_adc_vbat(struct bq25980_device *bq) 541 { 542 int vsys_adc_lsb, vsys_adc_msb; 543 u16 vsys_adc; 544 int ret; 545 546 ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_MSB, &vsys_adc_msb); 547 if (ret) 548 return ret; 549 550 ret = regmap_read(bq->regmap, BQ25980_VBAT_ADC_LSB, &vsys_adc_lsb); 551 if (ret) 552 return ret; 553 554 vsys_adc = (vsys_adc_msb << 8) | vsys_adc_lsb; 555 556 return vsys_adc * BQ25980_ADC_VOLT_STEP_uV; 557 } 558 559 static int bq25980_get_state(struct bq25980_device *bq, 560 struct bq25980_state *state) 561 { 562 unsigned int chg_ctrl_2; 563 unsigned int stat1; 564 unsigned int stat2; 565 unsigned int stat3; 566 unsigned int stat4; 567 unsigned int ibat_adc_msb; 568 int ret; 569 570 ret = regmap_read(bq->regmap, BQ25980_STAT1, &stat1); 571 if (ret) 572 return ret; 573 574 ret = regmap_read(bq->regmap, BQ25980_STAT2, &stat2); 575 if (ret) 576 return ret; 577 578 ret = regmap_read(bq->regmap, BQ25980_STAT3, &stat3); 579 if (ret) 580 return ret; 581 582 ret = regmap_read(bq->regmap, BQ25980_STAT4, &stat4); 583 if (ret) 584 return ret; 585 586 ret = regmap_read(bq->regmap, BQ25980_CHRGR_CTRL_2, &chg_ctrl_2); 587 if (ret) 588 return ret; 589 590 ret = regmap_read(bq->regmap, BQ25980_IBAT_ADC_MSB, &ibat_adc_msb); 591 if (ret) 592 return ret; 593 594 state->dischg = ibat_adc_msb & BQ25980_ADC_POLARITY_BIT; 595 state->ovp = (stat1 & BQ25980_STAT1_OVP_MASK) | 596 (stat3 & BQ25980_STAT3_OVP_MASK); 597 state->ocp = (stat1 & BQ25980_STAT1_OCP_MASK) | 598 (stat2 & BQ25980_STAT2_OCP_MASK); 599 state->tflt = stat4 & BQ25980_STAT4_TFLT_MASK; 600 state->wdt = stat4 & BQ25980_WD_STAT; 601 state->online = stat3 & BQ25980_PRESENT_MASK; 602 state->ce = chg_ctrl_2 & BQ25980_CHG_EN; 603 state->hiz = chg_ctrl_2 & BQ25980_EN_HIZ; 604 state->bypass = chg_ctrl_2 & BQ25980_EN_BYPASS; 605 606 return 0; 607 } 608 609 static int bq25980_set_battery_property(struct power_supply *psy, 610 enum power_supply_property psp, 611 const union power_supply_propval *val) 612 { 613 struct bq25980_device *bq = power_supply_get_drvdata(psy); 614 int ret = 0; 615 616 switch (psp) { 617 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 618 ret = bq25980_set_const_charge_curr(bq, val->intval); 619 if (ret) 620 return ret; 621 break; 622 623 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 624 ret = bq25980_set_const_charge_volt(bq, val->intval); 625 if (ret) 626 return ret; 627 break; 628 629 default: 630 return -EINVAL; 631 } 632 633 return ret; 634 } 635 636 static int bq25980_get_battery_property(struct power_supply *psy, 637 enum power_supply_property psp, 638 union power_supply_propval *val) 639 { 640 struct bq25980_device *bq = power_supply_get_drvdata(psy); 641 int ret = 0; 642 643 switch (psp) { 644 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: 645 val->intval = bq->init_data.ichg_max; 646 break; 647 648 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: 649 val->intval = bq->init_data.vreg_max; 650 break; 651 652 case POWER_SUPPLY_PROP_CURRENT_NOW: 653 ret = bq25980_get_ibat_adc(bq); 654 val->intval = ret; 655 break; 656 657 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 658 ret = bq25980_get_adc_vbat(bq); 659 if (ret < 0) 660 return ret; 661 662 val->intval = ret; 663 break; 664 665 default: 666 return -EINVAL; 667 } 668 669 return ret; 670 } 671 672 static int bq25980_set_charger_property(struct power_supply *psy, 673 enum power_supply_property prop, 674 const union power_supply_propval *val) 675 { 676 struct bq25980_device *bq = power_supply_get_drvdata(psy); 677 int ret = -EINVAL; 678 679 switch (prop) { 680 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 681 ret = bq25980_set_input_curr_lim(bq, val->intval); 682 if (ret) 683 return ret; 684 break; 685 686 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 687 ret = bq25980_set_input_volt_lim(bq, val->intval); 688 if (ret) 689 return ret; 690 break; 691 692 case POWER_SUPPLY_PROP_CHARGE_TYPE: 693 ret = bq25980_set_bypass(bq, val->intval); 694 if (ret) 695 return ret; 696 break; 697 698 case POWER_SUPPLY_PROP_STATUS: 699 ret = bq25980_set_chg_en(bq, val->intval); 700 if (ret) 701 return ret; 702 break; 703 704 default: 705 return -EINVAL; 706 } 707 708 return ret; 709 } 710 711 static int bq25980_get_charger_property(struct power_supply *psy, 712 enum power_supply_property psp, 713 union power_supply_propval *val) 714 { 715 struct bq25980_device *bq = power_supply_get_drvdata(psy); 716 struct bq25980_state state; 717 int ret = 0; 718 719 mutex_lock(&bq->lock); 720 ret = bq25980_get_state(bq, &state); 721 mutex_unlock(&bq->lock); 722 if (ret) 723 return ret; 724 725 switch (psp) { 726 case POWER_SUPPLY_PROP_MANUFACTURER: 727 val->strval = BQ25980_MANUFACTURER; 728 break; 729 case POWER_SUPPLY_PROP_MODEL_NAME: 730 val->strval = bq->model_name; 731 break; 732 case POWER_SUPPLY_PROP_ONLINE: 733 val->intval = state.online; 734 break; 735 736 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 737 ret = bq25980_get_input_volt_lim(bq); 738 if (ret < 0) 739 return ret; 740 val->intval = ret; 741 break; 742 743 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 744 ret = bq25980_get_input_curr_lim(bq); 745 if (ret < 0) 746 return ret; 747 748 val->intval = ret; 749 break; 750 751 case POWER_SUPPLY_PROP_HEALTH: 752 val->intval = POWER_SUPPLY_HEALTH_GOOD; 753 754 if (state.tflt) 755 val->intval = POWER_SUPPLY_HEALTH_OVERHEAT; 756 else if (state.ovp) 757 val->intval = POWER_SUPPLY_HEALTH_OVERVOLTAGE; 758 else if (state.ocp) 759 val->intval = POWER_SUPPLY_HEALTH_OVERCURRENT; 760 else if (state.wdt) 761 val->intval = 762 POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE; 763 break; 764 765 case POWER_SUPPLY_PROP_STATUS: 766 val->intval = POWER_SUPPLY_STATUS_UNKNOWN; 767 768 if ((state.ce) && (!state.hiz)) 769 val->intval = POWER_SUPPLY_STATUS_CHARGING; 770 else if (state.dischg) 771 val->intval = POWER_SUPPLY_STATUS_DISCHARGING; 772 else if (!state.ce) 773 val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING; 774 break; 775 776 case POWER_SUPPLY_PROP_CHARGE_TYPE: 777 val->intval = POWER_SUPPLY_CHARGE_TYPE_UNKNOWN; 778 779 if (!state.ce) 780 val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE; 781 else if (state.bypass) 782 val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST; 783 else if (!state.bypass) 784 val->intval = POWER_SUPPLY_CHARGE_TYPE_STANDARD; 785 break; 786 787 case POWER_SUPPLY_PROP_CURRENT_NOW: 788 ret = bq25980_get_adc_ibus(bq); 789 if (ret < 0) 790 return ret; 791 792 val->intval = ret; 793 break; 794 795 case POWER_SUPPLY_PROP_VOLTAGE_NOW: 796 ret = bq25980_get_adc_vbus(bq); 797 if (ret < 0) 798 return ret; 799 800 val->intval = ret; 801 break; 802 803 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 804 ret = bq25980_get_const_charge_curr(bq); 805 if (ret < 0) 806 return ret; 807 808 val->intval = ret; 809 break; 810 811 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 812 ret = bq25980_get_const_charge_volt(bq); 813 if (ret < 0) 814 return ret; 815 816 val->intval = ret; 817 break; 818 819 default: 820 return -EINVAL; 821 } 822 823 return ret; 824 } 825 826 static bool bq25980_state_changed(struct bq25980_device *bq, 827 struct bq25980_state *new_state) 828 { 829 struct bq25980_state old_state; 830 831 mutex_lock(&bq->lock); 832 old_state = bq->state; 833 mutex_unlock(&bq->lock); 834 835 return (old_state.dischg != new_state->dischg || 836 old_state.ovp != new_state->ovp || 837 old_state.ocp != new_state->ocp || 838 old_state.online != new_state->online || 839 old_state.wdt != new_state->wdt || 840 old_state.tflt != new_state->tflt || 841 old_state.ce != new_state->ce || 842 old_state.hiz != new_state->hiz || 843 old_state.bypass != new_state->bypass); 844 } 845 846 static irqreturn_t bq25980_irq_handler_thread(int irq, void *private) 847 { 848 struct bq25980_device *bq = private; 849 struct bq25980_state state; 850 int ret; 851 852 ret = bq25980_get_state(bq, &state); 853 if (ret < 0) 854 goto irq_out; 855 856 if (!bq25980_state_changed(bq, &state)) 857 goto irq_out; 858 859 mutex_lock(&bq->lock); 860 bq->state = state; 861 mutex_unlock(&bq->lock); 862 863 power_supply_changed(bq->charger); 864 865 irq_out: 866 return IRQ_HANDLED; 867 } 868 869 static enum power_supply_property bq25980_power_supply_props[] = { 870 POWER_SUPPLY_PROP_MANUFACTURER, 871 POWER_SUPPLY_PROP_MODEL_NAME, 872 POWER_SUPPLY_PROP_STATUS, 873 POWER_SUPPLY_PROP_ONLINE, 874 POWER_SUPPLY_PROP_HEALTH, 875 POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT, 876 POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, 877 POWER_SUPPLY_PROP_CHARGE_TYPE, 878 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT, 879 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE, 880 POWER_SUPPLY_PROP_CURRENT_NOW, 881 POWER_SUPPLY_PROP_VOLTAGE_NOW, 882 }; 883 884 static enum power_supply_property bq25980_battery_props[] = { 885 POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, 886 POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, 887 POWER_SUPPLY_PROP_CURRENT_NOW, 888 POWER_SUPPLY_PROP_VOLTAGE_NOW, 889 }; 890 891 static char *bq25980_charger_supplied_to[] = { 892 "main-battery", 893 }; 894 895 static int bq25980_property_is_writeable(struct power_supply *psy, 896 enum power_supply_property prop) 897 { 898 switch (prop) { 899 case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT: 900 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE: 901 case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT: 902 case POWER_SUPPLY_PROP_CHARGE_TYPE: 903 case POWER_SUPPLY_PROP_STATUS: 904 case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT: 905 return true; 906 default: 907 return false; 908 } 909 } 910 911 static const struct power_supply_desc bq25980_power_supply_desc = { 912 .name = "bq25980-charger", 913 .type = POWER_SUPPLY_TYPE_MAINS, 914 .properties = bq25980_power_supply_props, 915 .num_properties = ARRAY_SIZE(bq25980_power_supply_props), 916 .get_property = bq25980_get_charger_property, 917 .set_property = bq25980_set_charger_property, 918 .property_is_writeable = bq25980_property_is_writeable, 919 }; 920 921 static struct power_supply_desc bq25980_battery_desc = { 922 .name = "bq25980-battery", 923 .type = POWER_SUPPLY_TYPE_BATTERY, 924 .get_property = bq25980_get_battery_property, 925 .set_property = bq25980_set_battery_property, 926 .properties = bq25980_battery_props, 927 .num_properties = ARRAY_SIZE(bq25980_battery_props), 928 .property_is_writeable = bq25980_property_is_writeable, 929 }; 930 931 932 static bool bq25980_is_volatile_reg(struct device *dev, unsigned int reg) 933 { 934 switch (reg) { 935 case BQ25980_CHRGR_CTRL_2: 936 case BQ25980_STAT1...BQ25980_FLAG5: 937 case BQ25980_ADC_CONTROL1...BQ25980_TDIE_ADC_LSB: 938 return true; 939 default: 940 return false; 941 } 942 } 943 944 static const struct regmap_config bq25980_regmap_config = { 945 .reg_bits = 8, 946 .val_bits = 8, 947 948 .max_register = BQ25980_CHRGR_CTRL_6, 949 .reg_defaults = bq25980_reg_defs, 950 .num_reg_defaults = ARRAY_SIZE(bq25980_reg_defs), 951 .cache_type = REGCACHE_RBTREE, 952 .volatile_reg = bq25980_is_volatile_reg, 953 }; 954 955 static const struct regmap_config bq25975_regmap_config = { 956 .reg_bits = 8, 957 .val_bits = 8, 958 959 .max_register = BQ25980_CHRGR_CTRL_6, 960 .reg_defaults = bq25975_reg_defs, 961 .num_reg_defaults = ARRAY_SIZE(bq25975_reg_defs), 962 .cache_type = REGCACHE_RBTREE, 963 .volatile_reg = bq25980_is_volatile_reg, 964 }; 965 966 static const struct regmap_config bq25960_regmap_config = { 967 .reg_bits = 8, 968 .val_bits = 8, 969 970 .max_register = BQ25980_CHRGR_CTRL_6, 971 .reg_defaults = bq25960_reg_defs, 972 .num_reg_defaults = ARRAY_SIZE(bq25960_reg_defs), 973 .cache_type = REGCACHE_RBTREE, 974 .volatile_reg = bq25980_is_volatile_reg, 975 }; 976 977 static const struct bq25980_chip_info bq25980_chip_info_tbl[] = { 978 [BQ25980] = { 979 .model_id = BQ25980, 980 .regmap_config = &bq25980_regmap_config, 981 982 .busocp_def = BQ25980_BUSOCP_DFLT_uA, 983 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA, 984 .busocp_sc_max = BQ25980_BUSOCP_SC_MAX_uA, 985 .busocp_byp_max = BQ25980_BUSOCP_BYP_MAX_uA, 986 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA, 987 988 .busovp_sc_def = BQ25980_BUSOVP_DFLT_uV, 989 .busovp_byp_def = BQ25980_BUSOVP_BYPASS_DFLT_uV, 990 .busovp_sc_step = BQ25980_BUSOVP_SC_STEP_uV, 991 .busovp_sc_offset = BQ25980_BUSOVP_SC_OFFSET_uV, 992 .busovp_byp_step = BQ25980_BUSOVP_BYP_STEP_uV, 993 .busovp_byp_offset = BQ25980_BUSOVP_BYP_OFFSET_uV, 994 .busovp_sc_min = BQ25980_BUSOVP_SC_MIN_uV, 995 .busovp_sc_max = BQ25980_BUSOVP_SC_MAX_uV, 996 .busovp_byp_min = BQ25980_BUSOVP_BYP_MIN_uV, 997 .busovp_byp_max = BQ25980_BUSOVP_BYP_MAX_uV, 998 999 .batovp_def = BQ25980_BATOVP_DFLT_uV, 1000 .batovp_max = BQ25980_BATOVP_MAX_uV, 1001 .batovp_min = BQ25980_BATOVP_MIN_uV, 1002 .batovp_step = BQ25980_BATOVP_STEP_uV, 1003 .batovp_offset = BQ25980_BATOVP_OFFSET_uV, 1004 1005 .batocp_def = BQ25980_BATOCP_DFLT_uA, 1006 .batocp_max = BQ25980_BATOCP_MAX_uA, 1007 }, 1008 1009 [BQ25975] = { 1010 .model_id = BQ25975, 1011 .regmap_config = &bq25975_regmap_config, 1012 1013 .busocp_def = BQ25975_BUSOCP_DFLT_uA, 1014 .busocp_sc_min = BQ25975_BUSOCP_SC_MAX_uA, 1015 .busocp_sc_max = BQ25975_BUSOCP_SC_MAX_uA, 1016 .busocp_byp_min = BQ25980_BUSOCP_MIN_uA, 1017 .busocp_byp_max = BQ25975_BUSOCP_BYP_MAX_uA, 1018 1019 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV, 1020 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV, 1021 .busovp_sc_step = BQ25975_BUSOVP_SC_STEP_uV, 1022 .busovp_sc_offset = BQ25975_BUSOVP_SC_OFFSET_uV, 1023 .busovp_byp_step = BQ25975_BUSOVP_BYP_STEP_uV, 1024 .busovp_byp_offset = BQ25975_BUSOVP_BYP_OFFSET_uV, 1025 .busovp_sc_min = BQ25975_BUSOVP_SC_MIN_uV, 1026 .busovp_sc_max = BQ25975_BUSOVP_SC_MAX_uV, 1027 .busovp_byp_min = BQ25975_BUSOVP_BYP_MIN_uV, 1028 .busovp_byp_max = BQ25975_BUSOVP_BYP_MAX_uV, 1029 1030 .batovp_def = BQ25975_BATOVP_DFLT_uV, 1031 .batovp_max = BQ25975_BATOVP_MAX_uV, 1032 .batovp_min = BQ25975_BATOVP_MIN_uV, 1033 .batovp_step = BQ25975_BATOVP_STEP_uV, 1034 .batovp_offset = BQ25975_BATOVP_OFFSET_uV, 1035 1036 .batocp_def = BQ25980_BATOCP_DFLT_uA, 1037 .batocp_max = BQ25980_BATOCP_MAX_uA, 1038 }, 1039 1040 [BQ25960] = { 1041 .model_id = BQ25960, 1042 .regmap_config = &bq25960_regmap_config, 1043 1044 .busocp_def = BQ25960_BUSOCP_DFLT_uA, 1045 .busocp_sc_min = BQ25960_BUSOCP_SC_MAX_uA, 1046 .busocp_sc_max = BQ25960_BUSOCP_SC_MAX_uA, 1047 .busocp_byp_min = BQ25960_BUSOCP_SC_MAX_uA, 1048 .busocp_byp_max = BQ25960_BUSOCP_BYP_MAX_uA, 1049 1050 .busovp_sc_def = BQ25975_BUSOVP_DFLT_uV, 1051 .busovp_byp_def = BQ25975_BUSOVP_BYPASS_DFLT_uV, 1052 .busovp_sc_step = BQ25960_BUSOVP_SC_STEP_uV, 1053 .busovp_sc_offset = BQ25960_BUSOVP_SC_OFFSET_uV, 1054 .busovp_byp_step = BQ25960_BUSOVP_BYP_STEP_uV, 1055 .busovp_byp_offset = BQ25960_BUSOVP_BYP_OFFSET_uV, 1056 .busovp_sc_min = BQ25960_BUSOVP_SC_MIN_uV, 1057 .busovp_sc_max = BQ25960_BUSOVP_SC_MAX_uV, 1058 .busovp_byp_min = BQ25960_BUSOVP_BYP_MIN_uV, 1059 .busovp_byp_max = BQ25960_BUSOVP_BYP_MAX_uV, 1060 1061 .batovp_def = BQ25960_BATOVP_DFLT_uV, 1062 .batovp_max = BQ25960_BATOVP_MAX_uV, 1063 .batovp_min = BQ25960_BATOVP_MIN_uV, 1064 .batovp_step = BQ25960_BATOVP_STEP_uV, 1065 .batovp_offset = BQ25960_BATOVP_OFFSET_uV, 1066 1067 .batocp_def = BQ25960_BATOCP_DFLT_uA, 1068 .batocp_max = BQ25960_BATOCP_MAX_uA, 1069 }, 1070 }; 1071 1072 static int bq25980_power_supply_init(struct bq25980_device *bq, 1073 struct device *dev) 1074 { 1075 struct power_supply_config psy_cfg = { .drv_data = bq, 1076 .of_node = dev->of_node, }; 1077 1078 psy_cfg.supplied_to = bq25980_charger_supplied_to; 1079 psy_cfg.num_supplicants = ARRAY_SIZE(bq25980_charger_supplied_to); 1080 1081 bq->charger = devm_power_supply_register(bq->dev, 1082 &bq25980_power_supply_desc, 1083 &psy_cfg); 1084 if (IS_ERR(bq->charger)) 1085 return -EINVAL; 1086 1087 bq->battery = devm_power_supply_register(bq->dev, 1088 &bq25980_battery_desc, 1089 &psy_cfg); 1090 if (IS_ERR(bq->battery)) 1091 return -EINVAL; 1092 1093 return 0; 1094 } 1095 1096 static int bq25980_hw_init(struct bq25980_device *bq) 1097 { 1098 struct power_supply_battery_info bat_info = { }; 1099 int wd_reg_val = BQ25980_WATCHDOG_DIS; 1100 int wd_max_val = BQ25980_NUM_WD_VAL - 1; 1101 int ret = 0; 1102 int curr_val; 1103 int volt_val; 1104 int i; 1105 1106 if (bq->watchdog_timer) { 1107 if (bq->watchdog_timer >= bq25980_watchdog_time[wd_max_val]) 1108 wd_reg_val = wd_max_val; 1109 else { 1110 for (i = 0; i < wd_max_val; i++) { 1111 if (bq->watchdog_timer > bq25980_watchdog_time[i] && 1112 bq->watchdog_timer < bq25980_watchdog_time[i + 1]) { 1113 wd_reg_val = i; 1114 break; 1115 } 1116 } 1117 } 1118 } 1119 1120 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_3, 1121 BQ25980_WATCHDOG_MASK, wd_reg_val); 1122 if (ret) 1123 return ret; 1124 1125 ret = power_supply_get_battery_info(bq->charger, &bat_info); 1126 if (ret) { 1127 dev_warn(bq->dev, "battery info missing\n"); 1128 return -EINVAL; 1129 } 1130 1131 bq->init_data.ichg_max = bat_info.constant_charge_current_max_ua; 1132 bq->init_data.vreg_max = bat_info.constant_charge_voltage_max_uv; 1133 1134 if (bq->state.bypass) { 1135 ret = regmap_update_bits(bq->regmap, BQ25980_CHRGR_CTRL_2, 1136 BQ25980_EN_BYPASS, BQ25980_EN_BYPASS); 1137 if (ret) 1138 return ret; 1139 1140 curr_val = bq->init_data.bypass_ilim; 1141 volt_val = bq->init_data.bypass_vlim; 1142 } else { 1143 curr_val = bq->init_data.sc_ilim; 1144 volt_val = bq->init_data.sc_vlim; 1145 } 1146 1147 ret = bq25980_set_input_curr_lim(bq, curr_val); 1148 if (ret) 1149 return ret; 1150 1151 ret = bq25980_set_input_volt_lim(bq, volt_val); 1152 if (ret) 1153 return ret; 1154 1155 return regmap_update_bits(bq->regmap, BQ25980_ADC_CONTROL1, 1156 BQ25980_ADC_EN, BQ25980_ADC_EN); 1157 } 1158 1159 static int bq25980_parse_dt(struct bq25980_device *bq) 1160 { 1161 int ret; 1162 1163 ret = device_property_read_u32(bq->dev, "ti,watchdog-timeout-ms", 1164 &bq->watchdog_timer); 1165 if (ret) 1166 bq->watchdog_timer = BQ25980_WATCHDOG_MIN; 1167 1168 if (bq->watchdog_timer > BQ25980_WATCHDOG_MAX || 1169 bq->watchdog_timer < BQ25980_WATCHDOG_MIN) 1170 return -EINVAL; 1171 1172 ret = device_property_read_u32(bq->dev, 1173 "ti,sc-ovp-limit-microvolt", 1174 &bq->init_data.sc_vlim); 1175 if (ret) 1176 bq->init_data.sc_vlim = bq->chip_info->busovp_sc_def; 1177 1178 if (bq->init_data.sc_vlim > bq->chip_info->busovp_sc_max || 1179 bq->init_data.sc_vlim < bq->chip_info->busovp_sc_min) { 1180 dev_err(bq->dev, "SC ovp limit is out of range\n"); 1181 return -EINVAL; 1182 } 1183 1184 ret = device_property_read_u32(bq->dev, 1185 "ti,sc-ocp-limit-microamp", 1186 &bq->init_data.sc_ilim); 1187 if (ret) 1188 bq->init_data.sc_ilim = bq->chip_info->busocp_def; 1189 1190 if (bq->init_data.sc_ilim > bq->chip_info->busocp_sc_max || 1191 bq->init_data.sc_ilim < bq->chip_info->busocp_sc_min) { 1192 dev_err(bq->dev, "SC ocp limit is out of range\n"); 1193 return -EINVAL; 1194 } 1195 1196 ret = device_property_read_u32(bq->dev, 1197 "ti,bypass-ovp-limit-microvolt", 1198 &bq->init_data.bypass_vlim); 1199 if (ret) 1200 bq->init_data.bypass_vlim = bq->chip_info->busovp_byp_def; 1201 1202 if (bq->init_data.bypass_vlim > bq->chip_info->busovp_byp_max || 1203 bq->init_data.bypass_vlim < bq->chip_info->busovp_byp_min) { 1204 dev_err(bq->dev, "Bypass ovp limit is out of range\n"); 1205 return -EINVAL; 1206 } 1207 1208 ret = device_property_read_u32(bq->dev, 1209 "ti,bypass-ocp-limit-microamp", 1210 &bq->init_data.bypass_ilim); 1211 if (ret) 1212 bq->init_data.bypass_ilim = bq->chip_info->busocp_def; 1213 1214 if (bq->init_data.bypass_ilim > bq->chip_info->busocp_byp_max || 1215 bq->init_data.bypass_ilim < bq->chip_info->busocp_byp_min) { 1216 dev_err(bq->dev, "Bypass ocp limit is out of range\n"); 1217 return -EINVAL; 1218 } 1219 1220 1221 bq->state.bypass = device_property_read_bool(bq->dev, 1222 "ti,bypass-enable"); 1223 return 0; 1224 } 1225 1226 static int bq25980_probe(struct i2c_client *client, 1227 const struct i2c_device_id *id) 1228 { 1229 struct device *dev = &client->dev; 1230 struct bq25980_device *bq; 1231 int ret; 1232 1233 bq = devm_kzalloc(dev, sizeof(*bq), GFP_KERNEL); 1234 if (!bq) 1235 return -ENOMEM; 1236 1237 bq->client = client; 1238 bq->dev = dev; 1239 1240 mutex_init(&bq->lock); 1241 1242 strncpy(bq->model_name, id->name, I2C_NAME_SIZE); 1243 bq->chip_info = &bq25980_chip_info_tbl[id->driver_data]; 1244 1245 bq->regmap = devm_regmap_init_i2c(client, 1246 bq->chip_info->regmap_config); 1247 if (IS_ERR(bq->regmap)) { 1248 dev_err(dev, "Failed to allocate register map\n"); 1249 return PTR_ERR(bq->regmap); 1250 } 1251 1252 i2c_set_clientdata(client, bq); 1253 1254 ret = bq25980_parse_dt(bq); 1255 if (ret) { 1256 dev_err(dev, "Failed to read device tree properties%d\n", ret); 1257 return ret; 1258 } 1259 1260 if (client->irq) { 1261 ret = devm_request_threaded_irq(dev, client->irq, NULL, 1262 bq25980_irq_handler_thread, 1263 IRQF_TRIGGER_FALLING | 1264 IRQF_ONESHOT, 1265 dev_name(&client->dev), bq); 1266 if (ret) 1267 return ret; 1268 } 1269 1270 ret = bq25980_power_supply_init(bq, dev); 1271 if (ret) { 1272 dev_err(dev, "Failed to register power supply\n"); 1273 return ret; 1274 } 1275 1276 ret = bq25980_hw_init(bq); 1277 if (ret) { 1278 dev_err(dev, "Cannot initialize the chip.\n"); 1279 return ret; 1280 } 1281 1282 return 0; 1283 } 1284 1285 static const struct i2c_device_id bq25980_i2c_ids[] = { 1286 { "bq25980", BQ25980 }, 1287 { "bq25975", BQ25975 }, 1288 { "bq25960", BQ25960 }, 1289 {}, 1290 }; 1291 MODULE_DEVICE_TABLE(i2c, bq25980_i2c_ids); 1292 1293 static const struct of_device_id bq25980_of_match[] = { 1294 { .compatible = "ti,bq25980", .data = (void *)BQ25980 }, 1295 { .compatible = "ti,bq25975", .data = (void *)BQ25975 }, 1296 { .compatible = "ti,bq25960", .data = (void *)BQ25960 }, 1297 { }, 1298 }; 1299 MODULE_DEVICE_TABLE(of, bq25980_of_match); 1300 1301 static struct i2c_driver bq25980_driver = { 1302 .driver = { 1303 .name = "bq25980-charger", 1304 .of_match_table = bq25980_of_match, 1305 }, 1306 .probe = bq25980_probe, 1307 .id_table = bq25980_i2c_ids, 1308 }; 1309 module_i2c_driver(bq25980_driver); 1310 1311 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>"); 1312 MODULE_AUTHOR("Ricardo Rivera-Matos <r-rivera-matos@ti.com>"); 1313 MODULE_DESCRIPTION("bq25980 charger driver"); 1314 MODULE_LICENSE("GPL v2"); 1315