1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (C) 2020 ROHM Semiconductors */ 3 #ifndef BD99954_CHARGER_H 4 #define BD99954_CHARGER_H 5 6 #include <linux/regmap.h> 7 8 #define BD9995X_MANUFACTURER "Rohm Semiconductor" 9 #define BD9995X_IRQ_PIN "bd9995x_irq" 10 11 #define BD9995X_VSYS_PRECHARGE_OFFSET_MV 200 12 13 #define BD99954_ID 0x346 14 #define BD99955_ID 0x221 15 #define BD99956_ID 0x331 16 17 /* Battery Charger Commands */ 18 #define CHARGING_CURRENT 0x14 19 #define CHARGING_VOLTAGE 0x15 20 #define PROTECT_SET 0x3E 21 #define MAP_SET 0x3F 22 23 /* Extended commands */ 24 #define CHGSTM_STATUS 0x100 25 #define VBAT_VSYS_STATUS 0x101 26 #define VBUS_VCC_STATUS 0x102 27 #define CHGOP_STATUS 0x103 28 #define WDT_STATUS 0x104 29 #define CUR_ILIM_VAL 0x105 30 #define SEL_ILIM_VAL 0x106 31 #define IBUS_LIM_SET 0x107 32 #define ICC_LIM_SET 0x108 33 #define IOTG_LIM_SET 0x109 34 #define VIN_CTRL_SET 0x10A 35 #define CHGOP_SET1 0x10B 36 #define CHGOP_SET2 0x10C 37 #define VBUSCLPS_TH_SET 0x10D 38 #define VCCCLPS_TH_SET 0x10E 39 #define CHGWDT_SET 0x10F 40 #define BATTWDT_SET 0x110 41 #define VSYSREG_SET 0x111 42 #define VSYSVAL_THH_SET 0x112 43 #define VSYSVAL_THL_SET 0x113 44 #define ITRICH_SET 0x114 45 #define IPRECH_SET 0x115 46 #define ICHG_SET 0x116 47 #define ITERM_SET 0x117 48 #define VPRECHG_TH_SET 0x118 49 #define VRBOOST_SET 0x119 50 #define VFASTCHG_REG_SET1 0x11A 51 #define VFASTCHG_REG_SET2 0x11B 52 #define VFASTCHG_REG_SET3 0x11C 53 #define VRECHG_SET 0x11D 54 #define VBATOVP_SET 0x11E 55 #define IBATSHORT_SET 0x11F 56 #define PROCHOT_CTRL_SET 0x120 57 #define PROCHOT_ICRIT_SET 0x121 58 #define PROCHOT_INORM_SET 0x122 59 #define PROCHOT_IDCHG_SET 0x123 60 #define PROCHOT_VSYS_SET 0x124 61 #define PMON_IOUT_CTRL_SET 0x125 62 #define PMON_DACIN_VAL 0x126 63 #define IOUT_DACIN_VAL 0x127 64 #define VCC_UCD_SET 0x128 65 #define VCC_UCD_STATUS 0x129 66 #define VCC_IDD_STATUS 0x12A 67 #define VCC_UCD_FCTRL_SET 0x12B 68 #define VCC_UCD_FCTRL_EN 0x12C 69 #define VBUS_UCD_SET 0x130 70 #define VBUS_UCD_STATUS 0x131 71 #define VBUS_IDD_STATUS 0x132 72 #define VBUS_UCD_FCTRL_SET 0x133 73 #define VBUS_UCD_FCTRL_EN 0x134 74 #define CHIP_ID 0x138 75 #define CHIP_REV 0x139 76 #define IC_SET1 0x13A 77 #define IC_SET2 0x13B 78 #define SYSTEM_STATUS 0x13C 79 #define SYSTEM_CTRL_SET 0x13D 80 #define VM_CTRL_SET 0x140 81 #define THERM_WINDOW_SET1 0x141 82 #define THERM_WINDOW_SET2 0x142 83 #define THERM_WINDOW_SET3 0x143 84 #define THERM_WINDOW_SET4 0x144 85 #define THERM_WINDOW_SET5 0x145 86 #define IBATP_TH_SET 0x146 87 #define IBATM_TH_SET 0x147 88 #define VBAT_TH_SET 0x148 89 #define THERM_TH_SET 0x149 90 #define IACP_TH_SET 0x14A 91 #define VACP_TH_SET 0x14B 92 #define VBUS_TH_SET 0x14C 93 #define VCC_TH_SET 0x14D 94 #define VSYS_TH_SET 0x14E 95 #define EXTIADP_TH_SET 0x14F 96 #define IBATP_VAL 0x150 97 #define IBATP_AVE_VAL 0x151 98 #define IBATM_VAL 0x152 99 #define IBATM_AVE_VAL 0x153 100 #define VBAT_VAL 0x154 101 #define VBAT_AVE_VAL 0x155 102 #define THERM_VAL 0x156 103 #define VTH_VAL 0x157 104 #define IACP_VAL 0x158 105 #define IACP_AVE_VAL 0x159 106 #define VACP_VAL 0x15A 107 #define VACP_AVE_VAL 0x15B 108 #define VBUS_VAL 0x15C 109 #define VBUS_AVE_VAL 0x15D 110 #define VCC_VAL 0x15E 111 #define VCC_AVE_VAL 0x15F 112 #define VSYS_VAL 0x160 113 #define VSYS_AVE_VAL 0x161 114 #define EXTIADP_VAL 0x162 115 #define EXTIADP_AVE_VAL 0x163 116 #define VACPCLPS_TH_SET 0x164 117 #define INT0_SET 0x168 118 #define INT1_SET 0x169 119 #define INT2_SET 0x16A 120 #define INT3_SET 0x16B 121 #define INT4_SET 0x16C 122 #define INT5_SET 0x16D 123 #define INT6_SET 0x16E 124 #define INT7_SET 0x16F 125 #define INT0_STATUS 0x170 126 #define INT1_STATUS 0x171 127 #define INT2_STATUS 0x172 128 #define INT3_STATUS 0x173 129 #define INT4_STATUS 0x174 130 #define INT5_STATUS 0x175 131 #define INT6_STATUS 0x176 132 #define INT7_STATUS 0x177 133 #define OTPREG0 0x17A 134 #define OTPREG1 0x17B 135 #define SMBREG 0x17C 136 #define DEBUG_MODE_SET 0x17F 137 #define DEBUG0x14 0x214 138 #define DEBUG0x1A 0x21A 139 140 enum bd9995x_fields { 141 F_PREV_CHGSTM_STATE, F_CHGSTM_STATE, 142 F_VBAT_VSYS_STATUS, 143 F_VBUS_VCC_STATUS, 144 F_BATTEMP, F_VRECHG_DET, F_RBOOST_UV, F_RBOOSTS, 145 F_THERMWDT_VAL, F_CHGWDT_VAL, 146 F_CUR_ILIM_VAL, 147 F_SEL_ILIM_VAL, 148 F_IBUS_LIM_SET, 149 F_ICC_LIM_SET, 150 F_IOTG_LIM_SET, 151 F_OTG_BOTH_EN, 152 F_VRBOOST_TRIG, 153 F_VRBOOST_EN, 154 F_PP_BOTH_THRU, 155 F_VIN_ORD, 156 F_VBUS_EN, 157 F_VCC_EN, 158 F_VSYS_PRIORITY, 159 F_PPC_SUB_CAP, 160 F_PPC_CAP, 161 F_DCP_2500_SEL, 162 F_SDP_500_SEL, 163 F_ILIM_AUTO_DISEN, 164 F_VCC_BC_DISEN, 165 F_VBUS_BC_DISEN, 166 F_SDP_CHG_TRIG_EN, 167 F_SDP_CHG_TRIG, 168 F_AUTO_TOF, 169 F_AUTO_FST, 170 F_AUTO_RECH, 171 F_ILIM_RESET_EN, 172 F_DCDC_1MS_SEL, 173 F_SEL_ILIM_DIV, 174 F_BATT_LEARN, 175 F_CHG_EN, 176 F_USB_SUS, 177 F_CHOP_SS_INIT, 178 F_CHOP_ALL_INIT, 179 F_DCDC_CLK_SEL, 180 F_CHOP_SS, 181 F_CHOP_ALL, 182 F_VBUSCLPS_TH_SET, 183 F_VCCCLPS_TH_SET, 184 F_WDT_FST, 185 F_WDT_PRE, 186 F_WDT_IBAT_SHORT, 187 F_WDT_THERM, 188 F_VSYSREG_SET, 189 F_VSYSVAL_THH_SET, 190 F_VSYSVAL_THL_SET, 191 F_ITRICH_SET, 192 F_IPRECH_SET, 193 F_ICHG_SET, 194 F_ITERM_SET, 195 F_VPRECHG_TH_SET, 196 F_VRBOOST_SET, 197 F_VFASTCHG_REG_SET1, 198 F_VFASTCHG_REG_SET2, 199 F_VFASTCHG_REG_SET3, 200 F_VRECHG_SET, 201 F_VBATOVP_SET, 202 F_IBATM_SHORT_SET, 203 F_PROCHOT_DG_SET, 204 F_PROCHOT_ICRIT_DG_SET, 205 F_PROCHOT_IDCHG_DG_SET, 206 F_PROCHOT_EN, 207 F_PROCHOT_ICRIT_SET, 208 F_PROCHOT_INORM_SET, 209 F_PROCHOT_IDCHG_SET, 210 F_PROCHOT_VSYS_SET, 211 F_IMON_INSEL, 212 F_PMON_INSEL, 213 F_IOUT_OUT_EN, 214 F_IOUT_SOURCE_SEL, 215 F_IOUT_GAIN_SET, 216 F_PMON_OUT_EN, 217 F_PMON_GAIN_SET, 218 F_PMON_DACIN_VAL, 219 F_IOUT_DACIN_VAL, 220 F_VCC_BCSRETRY, 221 F_VCC_ADCRTRY, 222 F_VCC_USBDETEN, 223 F_VCC_IDRDETEN, 224 F_VCC_ENUMRDY, 225 F_VCC_ADCPOLEN, 226 F_VCC_DCDMODE, 227 F_VCC_USB_SW_EN, 228 F_VCC_USB_SW, 229 F_VCC_DCDFAIL, 230 F_VCC_CHGPORT, 231 F_VCC_PUPDET, 232 F_VCC_VBUS_VLD, 233 F_VCC_CHGDET, 234 F_VCC_OTGDET, 235 F_VCC_VBINOP, 236 F_VCC_EXTID, 237 F_VCC_IDRDET, 238 F_VCC_INDO, 239 F_VCC_UCDSWEN, 240 F_VCC_RREF_EN, 241 F_VCC_DPPU_EN, 242 F_VCC_DPREF_EN, 243 F_VCC_DMREF_EN, 244 F_VCC_DPDET_EN, 245 F_VCC_DMDET_EN, 246 F_VCC_DPSINK_EN, 247 F_VCC_DMSINK_EN, 248 F_VCC_DP_BUFF_EN, 249 F_VCC_DM_BUFF_EN, 250 F_VCC_EXTCLKENBL, 251 F_VCC_PLSTESTEN, 252 F_VCC_UCDSWEN_TSTENB, 253 F_VCC_RREF_EN_TSTENB, 254 F_VCC_DPPU_EN_TSTENB, 255 F_VCC_DPREF_EN_TSTENB, 256 F_VCC_DMREF_EN_TSTENB, 257 F_VCC_DPDET_EN_TSTENB, 258 F_VCC_DMDET_EN_TSTENB, 259 F_VCC_DPSINK_EN_TSTENB, 260 F_VCC_DMSINK_EN_TSTENB, 261 F_VCC_DP_BUFF_EN_TSTENB, 262 F_VCC_DM_BUFF_EN_TSTENB, 263 F_VBUS_BCSRETRY, 264 F_VBUS_ADCRTRY, 265 F_VBUS_USBDETEN, 266 F_VBUS_IDRDETEN, 267 F_VBUS_ENUMRDY, 268 F_VBUS_ADCPOLEN, 269 F_VBUS_DCDMODE, 270 F_VBUS_USB_SW_EN, 271 F_VBUS_USB_SW, 272 F_VBUS_DCDFAIL, 273 F_VBUS_CHGPORT, 274 F_VBUS_PUPDET, 275 F_VBUS_VBUS_VLD, 276 F_VBUS_CHGDET, 277 F_VBUS_OTGDET, 278 F_VBUS_VBINOP, 279 F_VBUS_EXTID, 280 F_VBUS_IDRDET, 281 F_VBUS_INDO, 282 F_VBUS_UCDSWEN, 283 F_VBUS_RREF_EN, 284 F_VBUS_DPPU_EN, 285 F_VBUS_DPREF_EN, 286 F_VBUS_DMREF_EN, 287 F_VBUS_DPDET_EN, 288 F_VBUS_DMDET_EN, 289 F_VBUS_DPSINK_EN, 290 F_VBUS_DMSINK_EN, 291 F_VBUS_DP_BUFF_EN, 292 F_VBUS_DM_BUFF_EN, 293 F_VBUS_EXTCLKENBL, 294 F_VBUS_PLSTESTEN, 295 F_VBUS_UCDSWEN_TSTENB, 296 F_VBUS_RREF_EN_TSTENB, 297 F_VBUS_DPPU_EN_TSTENB, 298 F_VBUS_DPREF_EN_TSTENB, 299 F_VBUS_DMREF_EN_TSTENB, 300 F_VBUS_DPDET_EN_TSTENB, 301 F_VBUS_DMDET_EN_TSTENB, 302 F_VBUS_DPSINK_EN_TSTENB, 303 F_VBUS_DMSINK_EN_TSTENB, 304 F_VBUS_DP_BUFF_EN_TSTENB, 305 F_VBUS_DM_BUFF_EN_TSTENB, 306 F_CHIP_ID, 307 F_CHIP_REV, 308 F_ONE_CELL_MODE, 309 F_cell, 310 F_VACP_AUTO_DISCHG, 311 F_VACP_LOAD, 312 F_ACOK_POL, 313 F_ACOK_DISEN, 314 F_DEBUG_SET1, 315 F_DEBUG_SET0, 316 F_MONRST_STATE, 317 F_ALMRST_STATE, 318 F_CHGRST_STATE, 319 F_OTPLD_STATE, 320 F_ALLRST_STATE, 321 F_PROTECT_SET, 322 F_MAP_SET, 323 F_ADCINTERVAL, 324 F_ADCMOD, 325 F_ADCTMOD, 326 F_EXTIADPEN, 327 F_VSYSENB, 328 F_VCCENB, 329 F_VBUSENB, 330 F_VACPENB, 331 F_IACPENB, 332 F_THERMENB, 333 F_VBATENB, 334 F_IBATMENB, 335 F_IBATPENB, 336 F_TMPTHR1B, 337 F_TMPTHR1A, 338 F_TMPTHR2B, 339 F_TMPTHR2A, 340 F_TMPTHR3B, 341 F_TMPTHR3A, 342 F_TMPTHR4B, 343 F_TMPTHR4A, 344 F_TMPTHR5B, 345 F_TMPTHR5A, 346 F_IBATP_TH_SET, 347 F_IBATM_TH_SET, 348 F_VBAT_TH_SET, 349 F_THERM_TH_SET, 350 F_IACP_TH_SET, 351 F_VACP_TH_SET, 352 F_VBUS_TH_SET, 353 F_VCC_TH_SET, 354 F_VSYS_TH_SET, 355 F_EXTIADP_TH_SET, 356 F_IBATP_VAL, 357 F_IBATP_AVE_VAL, 358 F_IBATM_VAL, 359 F_IBATM_AVE_VAL, 360 F_VBAT_VAL, 361 F_VBAT_AVE_VAL, 362 F_THERM_VAL, 363 F_VTH_VAL, 364 F_IACP_VAL, 365 F_IACP_AVE_VAL, 366 F_VACP_VAL, 367 F_VACP_AVE_VAL, 368 F_VBUS_VAL, 369 F_VBUS_AVE_VAL, 370 F_VCC_VAL, 371 F_VCC_AVE_VAL, 372 F_VSYS_VAL, 373 F_VSYS_AVE_VAL, 374 F_EXTIADP_VAL, 375 F_EXTIADP_AVE_VAL, 376 F_VACPCLPS_TH_SET, 377 F_INT7_SET, 378 F_INT6_SET, 379 F_INT5_SET, 380 F_INT4_SET, 381 F_INT3_SET, 382 F_INT2_SET, 383 F_INT1_SET, 384 F_INT0_SET, 385 F_VBUS_RBUV_DET, 386 F_VBUS_RBUV_RES, 387 F_VBUS_TH_DET, 388 F_VBUS_TH_RES, 389 F_VBUS_IIN_MOD, 390 F_VBUS_OV_DET, 391 F_VBUS_OV_RES, 392 F_VBUS_CLPS_DET, 393 F_VBUS_CLPS, 394 F_VBUS_DET, 395 F_VBUS_RES, 396 F_VCC_RBUV_DET, 397 F_VCC_RBUV_RES, 398 F_VCC_TH_DET, 399 F_VCC_TH_RES, 400 F_VCC_IIN_MOD, 401 F_VCC_OVP_DET, 402 F_VCC_OVP_RES, 403 F_VCC_CLPS_DET, 404 F_VCC_CLPS_RES, 405 F_VCC_DET, 406 F_VCC_RES, 407 F_TH_DET, 408 F_TH_RMV, 409 F_TMP_OUT_DET, 410 F_TMP_OUT_RES, 411 F_VBAT_TH_DET, 412 F_VBAT_TH_RES, 413 F_IBAT_SHORT_DET, 414 F_IBAT_SHORT_RES, 415 F_VBAT_OV_DET, 416 F_VBAT_OV_RES, 417 F_BAT_ASSIST_DET, 418 F_BAT_ASSIST_RES, 419 F_VSYS_TH_DET, 420 F_VSYS_TH_RES, 421 F_VSYS_OV_DET, 422 F_VSYS_OV_RES, 423 F_VSYS_SHT_DET, 424 F_VSYS_SHT_RES, 425 F_VSYS_UV_DET, 426 F_VSYS_UV_RES, 427 F_OTP_LOAD_DONE, 428 F_PWR_ON, 429 F_EXTIADP_TRNS, 430 F_EXTIADP_TH_DET, 431 F_EXIADP_TH_RES, 432 F_BAT_MNT_DET, 433 F_BAT_MNT_RES, 434 F_TSD_DET, 435 F_TSD_RES, 436 F_CHGWDT_EXP, 437 F_THERMWDT_EXP, 438 F_TMP_TRNS, 439 F_CHG_TRNS, 440 F_VBUS_UCD_PORT_DET, 441 F_VBUS_UCD_UCHG_DET, 442 F_VBUS_UCD_URID_RMV, 443 F_VBUS_UCD_OTG_DET, 444 F_VBUS_UCD_URID_MOD, 445 F_VCC_UCD_PORT_DET, 446 F_VCC_UCD_UCHG_DET, 447 F_VCC_UCD_URID_RMV, 448 F_VCC_UCD_OTG_DET, 449 F_VCC_UCD_URID_MOD, 450 F_PROCHOT_DET, 451 F_PROCHOT_RES, 452 F_VACP_DET, 453 F_VACP_RES, 454 F_VACP_TH_DET, 455 F_VACP_TH_RES, 456 F_IACP_TH_DET, 457 F_IACP_THE_RES, 458 F_THERM_TH_DET, 459 F_THERM_TH_RES, 460 F_IBATM_TH_DET, 461 F_IBATM_TH_RES, 462 F_IBATP_TH_DET, 463 F_IBATP_TH_RES, 464 F_INT7_STATUS, 465 F_INT6_STATUS, 466 F_INT5_STATUS, 467 F_INT4_STATUS, 468 F_INT3_STATUS, 469 F_INT2_STATUS, 470 F_INT1_STATUS, 471 F_INT0_STATUS, 472 F_ILIM_DECREASE, 473 F_RESERVE_OTPREG1, 474 F_POWER_SAVE_MODE, 475 F_DEBUG_MODE_SET, 476 F_DEBUG0x14, 477 F_DEBUG0x1A, 478 F_MAX_FIELDS 479 }; 480 481 static const struct reg_field bd9995x_reg_fields[] = { 482 [F_PREV_CHGSTM_STATE] = REG_FIELD(CHGSTM_STATUS, 8, 14), 483 [F_CHGSTM_STATE] = REG_FIELD(CHGSTM_STATUS, 0, 6), 484 [F_VBAT_VSYS_STATUS] = REG_FIELD(VBAT_VSYS_STATUS, 0, 15), 485 [F_VBUS_VCC_STATUS] = REG_FIELD(VBUS_VCC_STATUS, 0, 12), 486 [F_BATTEMP] = REG_FIELD(CHGOP_STATUS, 8, 10), 487 [F_VRECHG_DET] = REG_FIELD(CHGOP_STATUS, 6, 6), 488 [F_RBOOST_UV] = REG_FIELD(CHGOP_STATUS, 1, 1), 489 [F_RBOOSTS] = REG_FIELD(CHGOP_STATUS, 0, 0), 490 [F_THERMWDT_VAL] = REG_FIELD(WDT_STATUS, 8, 15), 491 [F_CHGWDT_VAL] = REG_FIELD(WDT_STATUS, 0, 7), 492 [F_CUR_ILIM_VAL] = REG_FIELD(CUR_ILIM_VAL, 0, 13), 493 [F_SEL_ILIM_VAL] = REG_FIELD(SEL_ILIM_VAL, 0, 13), 494 [F_IBUS_LIM_SET] = REG_FIELD(IBUS_LIM_SET, 5, 13), 495 [F_ICC_LIM_SET] = REG_FIELD(ICC_LIM_SET, 5, 13), 496 [F_IOTG_LIM_SET] = REG_FIELD(IOTG_LIM_SET, 5, 13), 497 [F_OTG_BOTH_EN] = REG_FIELD(VIN_CTRL_SET, 15, 15), 498 [F_VRBOOST_TRIG] = REG_FIELD(VIN_CTRL_SET, 14, 14), 499 [F_VRBOOST_EN] = REG_FIELD(VIN_CTRL_SET, 12, 13), 500 [F_PP_BOTH_THRU] = REG_FIELD(VIN_CTRL_SET, 11, 11), 501 [F_VIN_ORD] = REG_FIELD(VIN_CTRL_SET, 7, 7), 502 [F_VBUS_EN] = REG_FIELD(VIN_CTRL_SET, 6, 6), 503 [F_VCC_EN] = REG_FIELD(VIN_CTRL_SET, 5, 5), 504 [F_VSYS_PRIORITY] = REG_FIELD(VIN_CTRL_SET, 4, 4), 505 [F_PPC_SUB_CAP] = REG_FIELD(VIN_CTRL_SET, 2, 3), 506 [F_PPC_CAP] = REG_FIELD(VIN_CTRL_SET, 0, 1), 507 [F_DCP_2500_SEL] = REG_FIELD(CHGOP_SET1, 15, 15), 508 [F_SDP_500_SEL] = REG_FIELD(CHGOP_SET1, 14, 14), 509 [F_ILIM_AUTO_DISEN] = REG_FIELD(CHGOP_SET1, 13, 13), 510 [F_VCC_BC_DISEN] = REG_FIELD(CHGOP_SET1, 11, 11), 511 [F_VBUS_BC_DISEN] = REG_FIELD(CHGOP_SET1, 10, 10), 512 [F_SDP_CHG_TRIG_EN] = REG_FIELD(CHGOP_SET1, 9, 9), 513 [F_SDP_CHG_TRIG] = REG_FIELD(CHGOP_SET1, 8, 8), 514 [F_AUTO_TOF] = REG_FIELD(CHGOP_SET1, 6, 6), 515 [F_AUTO_FST] = REG_FIELD(CHGOP_SET1, 5, 5), 516 [F_AUTO_RECH] = REG_FIELD(CHGOP_SET1, 3, 3), 517 [F_ILIM_RESET_EN] = REG_FIELD(CHGOP_SET2, 14, 14), 518 [F_DCDC_1MS_SEL] = REG_FIELD(CHGOP_SET2, 12, 13), 519 [F_SEL_ILIM_DIV] = REG_FIELD(CHGOP_SET2, 10, 10), 520 [F_BATT_LEARN] = REG_FIELD(CHGOP_SET2, 8, 8), 521 [F_CHG_EN] = REG_FIELD(CHGOP_SET2, 7, 7), 522 [F_USB_SUS] = REG_FIELD(CHGOP_SET2, 6, 6), 523 [F_CHOP_SS_INIT] = REG_FIELD(CHGOP_SET2, 5, 5), 524 [F_CHOP_ALL_INIT] = REG_FIELD(CHGOP_SET2, 4, 4), 525 [F_DCDC_CLK_SEL] = REG_FIELD(CHGOP_SET2, 2, 3), 526 [F_CHOP_SS] = REG_FIELD(CHGOP_SET2, 1, 1), 527 [F_CHOP_ALL] = REG_FIELD(CHGOP_SET2, 0, 0), 528 [F_VBUSCLPS_TH_SET] = REG_FIELD(VBUSCLPS_TH_SET, 7, 14), 529 [F_VCCCLPS_TH_SET] = REG_FIELD(VCCCLPS_TH_SET, 7, 14), 530 [F_WDT_FST] = REG_FIELD(CHGWDT_SET, 8, 15), 531 [F_WDT_PRE] = REG_FIELD(CHGWDT_SET, 0, 7), 532 [F_WDT_IBAT_SHORT] = REG_FIELD(BATTWDT_SET, 8, 15), 533 [F_WDT_THERM] = REG_FIELD(BATTWDT_SET, 0, 7), 534 [F_VSYSREG_SET] = REG_FIELD(VSYSREG_SET, 6, 14), 535 [F_VSYSVAL_THH_SET] = REG_FIELD(VSYSVAL_THH_SET, 6, 14), 536 [F_VSYSVAL_THL_SET] = REG_FIELD(VSYSVAL_THL_SET, 6, 14), 537 [F_ITRICH_SET] = REG_FIELD(ITRICH_SET, 6, 10), 538 [F_IPRECH_SET] = REG_FIELD(IPRECH_SET, 6, 10), 539 [F_ICHG_SET] = REG_FIELD(ICHG_SET, 6, 13), 540 [F_ITERM_SET] = REG_FIELD(ITERM_SET, 6, 10), 541 [F_VPRECHG_TH_SET] = REG_FIELD(VPRECHG_TH_SET, 6, 14), 542 [F_VRBOOST_SET] = REG_FIELD(VRBOOST_SET, 6, 14), 543 [F_VFASTCHG_REG_SET1] = REG_FIELD(VFASTCHG_REG_SET1, 4, 14), 544 [F_VFASTCHG_REG_SET2] = REG_FIELD(VFASTCHG_REG_SET2, 4, 14), 545 [F_VFASTCHG_REG_SET3] = REG_FIELD(VFASTCHG_REG_SET3, 4, 14), 546 [F_VRECHG_SET] = REG_FIELD(VRECHG_SET, 4, 14), 547 [F_VBATOVP_SET] = REG_FIELD(VBATOVP_SET, 4, 14), 548 [F_IBATM_SHORT_SET] = REG_FIELD(IBATSHORT_SET, 0, 14), 549 [F_PROCHOT_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 14, 15), 550 [F_PROCHOT_ICRIT_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 10, 11), 551 [F_PROCHOT_IDCHG_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 8, 9), 552 [F_PROCHOT_EN] = REG_FIELD(PROCHOT_CTRL_SET, 0, 4), 553 [F_PROCHOT_ICRIT_SET] = REG_FIELD(PROCHOT_ICRIT_SET, 0, 14), 554 [F_PROCHOT_INORM_SET] = REG_FIELD(PROCHOT_INORM_SET, 0, 14), 555 [F_PROCHOT_IDCHG_SET] = REG_FIELD(PROCHOT_IDCHG_SET, 0, 14), 556 [F_PROCHOT_VSYS_SET] = REG_FIELD(PROCHOT_VSYS_SET, 0, 14), 557 [F_IMON_INSEL] = REG_FIELD(PMON_IOUT_CTRL_SET, 9, 9), 558 [F_PMON_INSEL] = REG_FIELD(PMON_IOUT_CTRL_SET, 8, 8), 559 [F_IOUT_OUT_EN] = REG_FIELD(PMON_IOUT_CTRL_SET, 7, 7), 560 [F_IOUT_SOURCE_SEL] = REG_FIELD(PMON_IOUT_CTRL_SET, 6, 6), 561 [F_IOUT_GAIN_SET] = REG_FIELD(PMON_IOUT_CTRL_SET, 4, 5), 562 [F_PMON_OUT_EN] = REG_FIELD(PMON_IOUT_CTRL_SET, 3, 3), 563 [F_PMON_GAIN_SET] = REG_FIELD(PMON_IOUT_CTRL_SET, 0, 2), 564 [F_PMON_DACIN_VAL] = REG_FIELD(PMON_DACIN_VAL, 0, 9), 565 [F_IOUT_DACIN_VAL] = REG_FIELD(IOUT_DACIN_VAL, 0, 11), 566 [F_VCC_BCSRETRY] = REG_FIELD(VCC_UCD_SET, 12, 12), 567 [F_VCC_ADCRTRY] = REG_FIELD(VCC_UCD_SET, 8, 8), 568 [F_VCC_USBDETEN] = REG_FIELD(VCC_UCD_SET, 7, 7), 569 [F_VCC_IDRDETEN] = REG_FIELD(VCC_UCD_SET, 6, 6), 570 [F_VCC_ENUMRDY] = REG_FIELD(VCC_UCD_SET, 5, 5), 571 [F_VCC_ADCPOLEN] = REG_FIELD(VCC_UCD_SET, 4, 4), 572 [F_VCC_DCDMODE] = REG_FIELD(VCC_UCD_SET, 3, 3), 573 [F_VCC_USB_SW_EN] = REG_FIELD(VCC_UCD_SET, 1, 1), 574 [F_VCC_USB_SW] = REG_FIELD(VCC_UCD_SET, 0, 0), 575 [F_VCC_DCDFAIL] = REG_FIELD(VCC_UCD_STATUS, 15, 15), 576 [F_VCC_CHGPORT] = REG_FIELD(VCC_UCD_STATUS, 12, 13), 577 [F_VCC_PUPDET] = REG_FIELD(VCC_UCD_STATUS, 11, 11), 578 [F_VCC_VBUS_VLD] = REG_FIELD(VCC_UCD_STATUS, 7, 7), 579 [F_VCC_CHGDET] = REG_FIELD(VCC_UCD_STATUS, 6, 6), 580 [F_VCC_OTGDET] = REG_FIELD(VCC_UCD_STATUS, 3, 3), 581 [F_VCC_VBINOP] = REG_FIELD(VCC_IDD_STATUS, 6, 6), 582 [F_VCC_EXTID] = REG_FIELD(VCC_IDD_STATUS, 5, 5), 583 [F_VCC_IDRDET] = REG_FIELD(VCC_IDD_STATUS, 4, 4), 584 [F_VCC_INDO] = REG_FIELD(VCC_IDD_STATUS, 0, 3), 585 [F_VCC_UCDSWEN] = REG_FIELD(VCC_UCD_FCTRL_SET, 10, 10), 586 [F_VCC_RREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 9, 9), 587 [F_VCC_DPPU_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 8, 8), 588 [F_VCC_DPREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 7, 7), 589 [F_VCC_DMREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 6, 6), 590 [F_VCC_DPDET_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 5, 5), 591 [F_VCC_DMDET_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 4, 4), 592 [F_VCC_DPSINK_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 3, 3), 593 [F_VCC_DMSINK_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 2, 2), 594 [F_VCC_DP_BUFF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 1, 1), 595 [F_VCC_DM_BUFF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 0, 0), 596 [F_VCC_EXTCLKENBL] = REG_FIELD(VCC_UCD_FCTRL_EN, 15, 15), 597 [F_VCC_PLSTESTEN] = REG_FIELD(VCC_UCD_FCTRL_EN, 14, 14), 598 [F_VCC_UCDSWEN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 10, 10), 599 [F_VCC_RREF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 9, 9), 600 [F_VCC_DPPU_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 8, 8), 601 [F_VCC_DPREF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 7, 7), 602 [F_VCC_DMREF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 6, 6), 603 [F_VCC_DPDET_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 5, 5), 604 [F_VCC_DMDET_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 4, 4), 605 [F_VCC_DPSINK_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 3, 3), 606 [F_VCC_DMSINK_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 2, 2), 607 [F_VCC_DP_BUFF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 1, 1), 608 [F_VCC_DM_BUFF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 0, 0), 609 610 [F_VBUS_BCSRETRY] = REG_FIELD(VBUS_UCD_SET, 12, 12), 611 [F_VBUS_ADCRTRY] = REG_FIELD(VBUS_UCD_SET, 8, 8), 612 [F_VBUS_USBDETEN] = REG_FIELD(VBUS_UCD_SET, 7, 7), 613 [F_VBUS_IDRDETEN] = REG_FIELD(VBUS_UCD_SET, 6, 6), 614 [F_VBUS_ENUMRDY] = REG_FIELD(VBUS_UCD_SET, 5, 5), 615 [F_VBUS_ADCPOLEN] = REG_FIELD(VBUS_UCD_SET, 4, 4), 616 [F_VBUS_DCDMODE] = REG_FIELD(VBUS_UCD_SET, 3, 3), 617 [F_VBUS_USB_SW_EN] = REG_FIELD(VBUS_UCD_SET, 1, 1), 618 [F_VBUS_USB_SW] = REG_FIELD(VBUS_UCD_SET, 0, 0), 619 [F_VBUS_DCDFAIL] = REG_FIELD(VBUS_UCD_STATUS, 15, 15), 620 [F_VBUS_CHGPORT] = REG_FIELD(VBUS_UCD_STATUS, 12, 13), 621 [F_VBUS_PUPDET] = REG_FIELD(VBUS_UCD_STATUS, 11, 11), 622 [F_VBUS_VBUS_VLD] = REG_FIELD(VBUS_UCD_STATUS, 7, 7), 623 [F_VBUS_CHGDET] = REG_FIELD(VBUS_UCD_STATUS, 6, 6), 624 [F_VBUS_OTGDET] = REG_FIELD(VBUS_UCD_STATUS, 3, 3), 625 [F_VBUS_VBINOP] = REG_FIELD(VBUS_IDD_STATUS, 6, 6), 626 [F_VBUS_EXTID] = REG_FIELD(VBUS_IDD_STATUS, 5, 5), 627 [F_VBUS_IDRDET] = REG_FIELD(VBUS_IDD_STATUS, 4, 4), 628 [F_VBUS_INDO] = REG_FIELD(VBUS_IDD_STATUS, 0, 3), 629 [F_VBUS_UCDSWEN] = REG_FIELD(VCC_UCD_FCTRL_SET, 10, 10), 630 [F_VBUS_RREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 9, 9), 631 [F_VBUS_DPPU_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 8, 8), 632 [F_VBUS_DPREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 7, 7), 633 [F_VBUS_DMREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 6, 6), 634 [F_VBUS_DPDET_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 5, 5), 635 [F_VBUS_DMDET_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 4, 4), 636 [F_VBUS_DPSINK_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 3, 3), 637 [F_VBUS_DMSINK_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 2, 2), 638 [F_VBUS_DP_BUFF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 1, 1), 639 [F_VBUS_DM_BUFF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 0, 0), 640 641 [F_VBUS_EXTCLKENBL] = REG_FIELD(VBUS_UCD_FCTRL_EN, 15, 15), 642 [F_VBUS_PLSTESTEN] = REG_FIELD(VBUS_UCD_FCTRL_EN, 14, 14), 643 [F_VBUS_UCDSWEN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 10, 10), 644 [F_VBUS_RREF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 9, 9), 645 [F_VBUS_DPPU_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 8, 8), 646 [F_VBUS_DPREF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 7, 7), 647 [F_VBUS_DMREF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 6, 6), 648 [F_VBUS_DPDET_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 5, 5), 649 [F_VBUS_DMDET_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 4, 4), 650 [F_VBUS_DPSINK_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 3, 3), 651 [F_VBUS_DMSINK_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 2, 2), 652 [F_VBUS_DP_BUFF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 1, 1), 653 [F_VBUS_DM_BUFF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 0, 0), 654 655 [F_CHIP_ID] = REG_FIELD(CHIP_ID, 0, 15), 656 [F_CHIP_REV] = REG_FIELD(CHIP_REV, 0, 15), 657 [F_ONE_CELL_MODE] = REG_FIELD(IC_SET1, 11, 11), 658 [F_cell] = REG_FIELD(IC_SET1, 1, 1), 659 [F_VACP_AUTO_DISCHG] = REG_FIELD(IC_SET1, 9, 9), 660 [F_VACP_LOAD] = REG_FIELD(IC_SET1, 8, 8), 661 [F_ACOK_POL] = REG_FIELD(IC_SET1, 1, 1), 662 [F_ACOK_DISEN] = REG_FIELD(IC_SET1, 0, 0), 663 [F_DEBUG_SET1] = REG_FIELD(IC_SET2, 4, 8), 664 [F_DEBUG_SET0] = REG_FIELD(IC_SET2, 0, 0), 665 [F_MONRST_STATE] = REG_FIELD(SYSTEM_STATUS, 6, 6), 666 [F_ALMRST_STATE] = REG_FIELD(SYSTEM_STATUS, 5, 5), 667 [F_CHGRST_STATE] = REG_FIELD(SYSTEM_STATUS, 4, 4), 668 [F_OTPLD_STATE] = REG_FIELD(SYSTEM_STATUS, 1, 1), 669 [F_ALLRST_STATE] = REG_FIELD(SYSTEM_STATUS, 0, 0), 670 [F_PROTECT_SET] = REG_FIELD(PROTECT_SET, 0, 15), 671 [F_MAP_SET] = REG_FIELD(MAP_SET, 0, 15), 672 [F_ADCINTERVAL] = REG_FIELD(VM_CTRL_SET, 14, 15), 673 [F_ADCMOD] = REG_FIELD(VM_CTRL_SET, 12, 13), 674 [F_ADCTMOD] = REG_FIELD(VM_CTRL_SET, 10, 11), 675 [F_EXTIADPEN] = REG_FIELD(VM_CTRL_SET, 9, 9), 676 [F_VSYSENB] = REG_FIELD(VM_CTRL_SET, 8, 8), 677 [F_VCCENB] = REG_FIELD(VM_CTRL_SET, 7, 7), 678 [F_VBUSENB] = REG_FIELD(VM_CTRL_SET, 6, 6), 679 [F_VACPENB] = REG_FIELD(VM_CTRL_SET, 5, 5), 680 [F_IACPENB] = REG_FIELD(VM_CTRL_SET, 4, 4), 681 [F_THERMENB] = REG_FIELD(VM_CTRL_SET, 3, 3), 682 [F_VBATENB] = REG_FIELD(VM_CTRL_SET, 2, 2), 683 [F_IBATMENB] = REG_FIELD(VM_CTRL_SET, 1, 1), 684 [F_IBATPENB] = REG_FIELD(VM_CTRL_SET, 0, 0), 685 [F_TMPTHR1B] = REG_FIELD(THERM_WINDOW_SET1, 8, 15), 686 [F_TMPTHR1A] = REG_FIELD(THERM_WINDOW_SET1, 0, 7), 687 [F_TMPTHR2B] = REG_FIELD(THERM_WINDOW_SET2, 8, 15), 688 [F_TMPTHR2A] = REG_FIELD(THERM_WINDOW_SET2, 0, 7), 689 [F_TMPTHR3B] = REG_FIELD(THERM_WINDOW_SET3, 8, 15), 690 [F_TMPTHR3A] = REG_FIELD(THERM_WINDOW_SET3, 0, 7), 691 [F_TMPTHR4B] = REG_FIELD(THERM_WINDOW_SET4, 8, 15), 692 [F_TMPTHR4A] = REG_FIELD(THERM_WINDOW_SET4, 0, 7), 693 [F_TMPTHR5B] = REG_FIELD(THERM_WINDOW_SET5, 8, 15), 694 [F_TMPTHR5A] = REG_FIELD(THERM_WINDOW_SET5, 0, 7), 695 [F_IBATP_TH_SET] = REG_FIELD(IBATP_TH_SET, 0, 14), 696 [F_IBATM_TH_SET] = REG_FIELD(IBATM_TH_SET, 0, 14), 697 [F_VBAT_TH_SET] = REG_FIELD(VBAT_TH_SET, 0, 14), 698 [F_THERM_TH_SET] = REG_FIELD(THERM_TH_SET, 0, 7), 699 [F_IACP_TH_SET] = REG_FIELD(IACP_TH_SET, 0, 14), 700 [F_VACP_TH_SET] = REG_FIELD(VACP_TH_SET, 0, 14), 701 [F_VBUS_TH_SET] = REG_FIELD(VBUS_TH_SET, 0, 14), 702 [F_VCC_TH_SET] = REG_FIELD(VCC_TH_SET, 0, 14), 703 [F_VSYS_TH_SET] = REG_FIELD(VSYS_TH_SET, 0, 14), 704 [F_EXTIADP_TH_SET] = REG_FIELD(EXTIADP_TH_SET, 0, 11), 705 [F_IBATP_VAL] = REG_FIELD(IBATP_VAL, 0, 14), 706 [F_IBATP_AVE_VAL] = REG_FIELD(IBATP_AVE_VAL, 0, 14), 707 [F_IBATM_VAL] = REG_FIELD(IBATM_VAL, 0, 14), 708 [F_IBATM_AVE_VAL] = REG_FIELD(IBATM_AVE_VAL, 0, 14), 709 [F_VBAT_VAL] = REG_FIELD(VBAT_VAL, 0, 14), 710 [F_VBAT_AVE_VAL] = REG_FIELD(VBAT_AVE_VAL, 0, 14), 711 [F_THERM_VAL] = REG_FIELD(THERM_VAL, 0, 7), 712 [F_VTH_VAL] = REG_FIELD(VTH_VAL, 0, 11), 713 [F_IACP_VAL] = REG_FIELD(IACP_VAL, 0, 14), 714 [F_IACP_AVE_VAL] = REG_FIELD(IACP_AVE_VAL, 0, 14), 715 [F_VACP_VAL] = REG_FIELD(VACP_VAL, 0, 14), 716 [F_VACP_AVE_VAL] = REG_FIELD(VACP_AVE_VAL, 0, 14), 717 [F_VBUS_VAL] = REG_FIELD(VBUS_VAL, 0, 14), 718 [F_VBUS_AVE_VAL] = REG_FIELD(VBUS_AVE_VAL, 0, 14), 719 [F_VCC_VAL] = REG_FIELD(VCC_VAL, 0, 14), 720 [F_VCC_AVE_VAL] = REG_FIELD(VCC_AVE_VAL, 0, 14), 721 [F_VSYS_VAL] = REG_FIELD(VSYS_VAL, 0, 14), 722 [F_VSYS_AVE_VAL] = REG_FIELD(VSYS_AVE_VAL, 0, 14), 723 [F_EXTIADP_VAL] = REG_FIELD(EXTIADP_VAL, 0, 11), 724 [F_EXTIADP_AVE_VAL] = REG_FIELD(EXTIADP_AVE_VAL, 0, 11), 725 [F_VACPCLPS_TH_SET] = REG_FIELD(VACPCLPS_TH_SET, 7, 14), 726 [F_INT7_SET] = REG_FIELD(INT7_SET, 0, 15), 727 [F_INT6_SET] = REG_FIELD(INT6_SET, 0, 13), 728 [F_INT5_SET] = REG_FIELD(INT5_SET, 0, 13), 729 [F_INT4_SET] = REG_FIELD(INT4_SET, 0, 9), 730 [F_INT3_SET] = REG_FIELD(INT3_SET, 0, 15), 731 [F_INT2_SET] = REG_FIELD(INT2_SET, 0, 15), 732 [F_INT1_SET] = REG_FIELD(INT1_SET, 0, 15), 733 [F_INT0_SET] = REG_FIELD(INT0_SET, 0, 7), 734 [F_VBUS_RBUV_DET] = REG_FIELD(INT1_SET, 15, 15), 735 [F_VBUS_RBUV_RES] = REG_FIELD(INT1_SET, 14, 14), 736 [F_VBUS_TH_DET] = REG_FIELD(INT1_SET, 9, 9), 737 [F_VBUS_TH_RES] = REG_FIELD(INT1_SET, 8, 8), 738 [F_VBUS_IIN_MOD] = REG_FIELD(INT1_SET, 6, 6), 739 [F_VBUS_OV_DET] = REG_FIELD(INT1_SET, 5, 5), 740 [F_VBUS_OV_RES] = REG_FIELD(INT1_SET, 4, 4), 741 [F_VBUS_CLPS_DET] = REG_FIELD(INT1_SET, 3, 3), 742 [F_VBUS_CLPS] = REG_FIELD(INT1_SET, 2, 2), 743 [F_VBUS_DET] = REG_FIELD(INT1_SET, 1, 1), 744 [F_VBUS_RES] = REG_FIELD(INT1_SET, 0, 0), 745 [F_VCC_RBUV_DET] = REG_FIELD(INT2_SET, 15, 15), 746 [F_VCC_RBUV_RES] = REG_FIELD(INT2_SET, 14, 14), 747 [F_VCC_TH_DET] = REG_FIELD(INT2_SET, 9, 9), 748 [F_VCC_TH_RES] = REG_FIELD(INT2_SET, 8, 8), 749 [F_VCC_IIN_MOD] = REG_FIELD(INT2_SET, 6, 6), 750 [F_VCC_OVP_DET] = REG_FIELD(INT2_SET, 5, 5), 751 [F_VCC_OVP_RES] = REG_FIELD(INT2_SET, 4, 4), 752 [F_VCC_CLPS_DET] = REG_FIELD(INT2_SET, 3, 3), 753 [F_VCC_CLPS_RES] = REG_FIELD(INT2_SET, 2, 2), 754 [F_VCC_DET] = REG_FIELD(INT2_SET, 1, 1), 755 [F_VCC_RES] = REG_FIELD(INT2_SET, 0, 0), 756 [F_TH_DET] = REG_FIELD(INT3_SET, 15, 15), 757 [F_TH_RMV] = REG_FIELD(INT3_SET, 14, 14), 758 [F_TMP_OUT_DET] = REG_FIELD(INT3_SET, 11, 11), 759 [F_TMP_OUT_RES] = REG_FIELD(INT3_SET, 10, 10), 760 [F_VBAT_TH_DET] = REG_FIELD(INT3_SET, 9, 9), 761 [F_VBAT_TH_RES] = REG_FIELD(INT3_SET, 8, 8), 762 [F_IBAT_SHORT_DET] = REG_FIELD(INT3_SET, 7, 7), 763 [F_IBAT_SHORT_RES] = REG_FIELD(INT3_SET, 6, 6), 764 [F_VBAT_OV_DET] = REG_FIELD(INT3_SET, 5, 5), 765 [F_VBAT_OV_RES] = REG_FIELD(INT3_SET, 4, 4), 766 [F_BAT_ASSIST_DET] = REG_FIELD(INT3_SET, 3, 3), 767 [F_BAT_ASSIST_RES] = REG_FIELD(INT3_SET, 2, 2), 768 [F_VSYS_TH_DET] = REG_FIELD(INT4_SET, 9, 9), 769 [F_VSYS_TH_RES] = REG_FIELD(INT4_SET, 8, 8), 770 [F_VSYS_OV_DET] = REG_FIELD(INT4_SET, 5, 5), 771 [F_VSYS_OV_RES] = REG_FIELD(INT4_SET, 4, 4), 772 [F_VSYS_SHT_DET] = REG_FIELD(INT4_SET, 3, 3), 773 [F_VSYS_SHT_RES] = REG_FIELD(INT4_SET, 2, 2), 774 [F_VSYS_UV_DET] = REG_FIELD(INT4_SET, 1, 1), 775 [F_VSYS_UV_RES] = REG_FIELD(INT4_SET, 0, 0), 776 [F_OTP_LOAD_DONE] = REG_FIELD(INT5_SET, 13, 13), 777 [F_PWR_ON] = REG_FIELD(INT5_SET, 12, 12), 778 [F_EXTIADP_TRNS] = REG_FIELD(INT5_SET, 11, 11), 779 [F_EXTIADP_TH_DET] = REG_FIELD(INT5_SET, 9, 9), 780 [F_EXIADP_TH_RES] = REG_FIELD(INT5_SET, 8, 8), 781 [F_BAT_MNT_DET] = REG_FIELD(INT5_SET, 7, 7), 782 [F_BAT_MNT_RES] = REG_FIELD(INT5_SET, 6, 6), 783 [F_TSD_DET] = REG_FIELD(INT5_SET, 5, 5), 784 [F_TSD_RES] = REG_FIELD(INT5_SET, 4, 4), 785 [F_CHGWDT_EXP] = REG_FIELD(INT5_SET, 3, 3), 786 [F_THERMWDT_EXP] = REG_FIELD(INT5_SET, 2, 2), 787 [F_TMP_TRNS] = REG_FIELD(INT5_SET, 1, 1), 788 [F_CHG_TRNS] = REG_FIELD(INT5_SET, 0, 0), 789 [F_VBUS_UCD_PORT_DET] = REG_FIELD(INT6_SET, 13, 13), 790 [F_VBUS_UCD_UCHG_DET] = REG_FIELD(INT6_SET, 12, 12), 791 [F_VBUS_UCD_URID_RMV] = REG_FIELD(INT6_SET, 11, 11), 792 [F_VBUS_UCD_OTG_DET] = REG_FIELD(INT6_SET, 10, 10), 793 [F_VBUS_UCD_URID_MOD] = REG_FIELD(INT6_SET, 8, 8), 794 [F_VCC_UCD_PORT_DET] = REG_FIELD(INT6_SET, 5, 5), 795 [F_VCC_UCD_UCHG_DET] = REG_FIELD(INT6_SET, 4, 4), 796 [F_VCC_UCD_URID_RMV] = REG_FIELD(INT6_SET, 3, 3), 797 [F_VCC_UCD_OTG_DET] = REG_FIELD(INT6_SET, 2, 2), 798 [F_VCC_UCD_URID_MOD] = REG_FIELD(INT6_SET, 0, 0), 799 [F_PROCHOT_DET] = REG_FIELD(INT7_SET, 15, 15), 800 [F_PROCHOT_RES] = REG_FIELD(INT7_SET, 14, 14), 801 [F_VACP_DET] = REG_FIELD(INT7_SET, 11, 11), 802 [F_VACP_RES] = REG_FIELD(INT7_SET, 10, 10), 803 [F_VACP_TH_DET] = REG_FIELD(INT7_SET, 9, 9), 804 [F_VACP_TH_RES] = REG_FIELD(INT7_SET, 8, 8), 805 [F_IACP_TH_DET] = REG_FIELD(INT7_SET, 7, 7), 806 [F_IACP_THE_RES] = REG_FIELD(INT7_SET, 6, 6), 807 [F_THERM_TH_DET] = REG_FIELD(INT7_SET, 5, 5), 808 [F_THERM_TH_RES] = REG_FIELD(INT7_SET, 4, 4), 809 [F_IBATM_TH_DET] = REG_FIELD(INT7_SET, 3, 3), 810 [F_IBATM_TH_RES] = REG_FIELD(INT7_SET, 2, 2), 811 [F_IBATP_TH_DET] = REG_FIELD(INT7_SET, 1, 1), 812 [F_IBATP_TH_RES] = REG_FIELD(INT7_SET, 0, 0), 813 [F_INT7_STATUS] = REG_FIELD(INT7_STATUS, 0, 15), 814 [F_INT6_STATUS] = REG_FIELD(INT6_STATUS, 0, 13), 815 [F_INT5_STATUS] = REG_FIELD(INT5_STATUS, 0, 13), 816 [F_INT4_STATUS] = REG_FIELD(INT4_STATUS, 0, 9), 817 [F_INT3_STATUS] = REG_FIELD(INT3_STATUS, 0, 15), 818 [F_INT2_STATUS] = REG_FIELD(INT2_STATUS, 0, 15), 819 [F_INT1_STATUS] = REG_FIELD(INT1_STATUS, 0, 15), 820 [F_INT0_STATUS] = REG_FIELD(INT0_STATUS, 0, 7), 821 [F_ILIM_DECREASE] = REG_FIELD(OTPREG0, 0, 15), 822 [F_RESERVE_OTPREG1] = REG_FIELD(OTPREG1, 0, 15), 823 [F_POWER_SAVE_MODE] = REG_FIELD(SMBREG, 0, 15), 824 [F_DEBUG_MODE_SET] = REG_FIELD(DEBUG_MODE_SET, 0, 15), 825 [F_DEBUG0x14] = REG_FIELD(DEBUG0x14, 0, 15), 826 [F_DEBUG0x1A] = REG_FIELD(DEBUG0x1A, 0, 15), 827 }; 828 829 /* CHGSTM_STATEs */ 830 #define CHGSTM_SUSPEND 0x00 831 #define CHGSTM_TRICKLE_CHARGE 0x01 832 #define CHGSTM_PRE_CHARGE 0x02 833 #define CHGSTM_FAST_CHARGE 0x03 834 #define CHGSTM_TOP_OFF 0x04 835 #define CHGSTM_DONE 0x05 836 #define CHGSTM_OTG 0x08 837 #define CHGSTM_OTG_DONE 0x09 838 #define CHGSTM_TEMPERATURE_ERROR_1 0x10 839 #define CHGSTM_TEMPERATURE_ERROR_2 0x11 840 #define CHGSTM_TEMPERATURE_ERROR_3 0x12 841 #define CHGSTM_TEMPERATURE_ERROR_4 0x13 842 #define CHGSTM_TEMPERATURE_ERROR_5 0x14 843 #define CHGSTM_TEMPERATURE_ERROR_6 0x15 844 #define CHGSTM_TEMPERATURE_ERROR_7 0x18 845 #define CHGSTM_THERMAL_SHUT_DOWN_1 0x20 846 #define CHGSTM_THERMAL_SHUT_DOWN_2 0x21 847 #define CHGSTM_THERMAL_SHUT_DOWN_3 0x22 848 #define CHGSTM_THERMAL_SHUT_DOWN_4 0x23 849 #define CHGSTM_THERMAL_SHUT_DOWN_5 0x24 850 #define CHGSTM_THERMAL_SHUT_DOWN_6 0x25 851 #define CHGSTM_THERMAL_SHUT_DOWN_7 0x28 852 #define CHGSTM_BATTERY_ERROR 0x40 853 854 /* VBAT_VSYS_STATUS */ 855 #define STATUS_VSYS_OV BIT(15) 856 #define STATUS_VSYS_SSD BIT(14) 857 #define STATUS_VSYS_SCP BIT(13) 858 #define STATUS_VSYS_UVN BIT(12) 859 #define STATUS_IBAT_SHORT BIT(6) 860 #define STATUS_VBAT_OV BIT(3) 861 #define STATUS_DEAD_BAT BIT(0) 862 863 /* VBUS_VCC_STATUS */ 864 #define STATUS_VACP_DET BIT(12) 865 #define STATUS_VCC_OVP BIT(11) 866 #define STATUS_ILIM_VCC_MOD BIT(10) 867 #define STATUS_VCC_CLPS BIT(9) 868 #define STATUS_VCC_DET BIT(8) 869 #define STATUS_VBUS_OVP BIT(3) 870 #define STATUS_ILIM_VBUS_MOD BIT(2) 871 #define STATUS_VBUS_CLPS BIT(1) 872 #define STATUS_VBUS_DET BIT(0) 873 874 /* Interrupt set/status definitions */ 875 876 /* INT 0 */ 877 #define INT0_INT7_STATUS BIT(7) 878 #define INT0_INT6_STATUS BIT(6) 879 #define INT0_INT5_STATUS BIT(5) 880 #define INT0_INT4_STATUS BIT(4) 881 #define INT0_INT3_STATUS BIT(3) 882 #define INT0_INT2_STATUS BIT(2) 883 #define INT0_INT1_STATUS BIT(1) 884 #define INT0_INT0_STATUS BIT(0) 885 #define INT0_ALL 0xff 886 887 /* INT 1 */ 888 #define VBUS_RBUV_DET BIT(15) 889 #define VBUS_RBUV_RES BIT(14) 890 #define VBUS_TH_DET BIT(9) 891 #define VBUS_TH_RES BIT(8) 892 #define VBUS_IIN_MOD BIT(6) 893 #define VBUS_OV_DET BIT(5) 894 #define VBUS_OV_RES BIT(4) 895 #define VBUS_CLPS_DET BIT(3) 896 #define VBUS_CLPS BIT(2) 897 #define VBUS_DET BIT(1) 898 #define VBUS_RES BIT(0) 899 #define INT1_ALL (VBUS_RBUV_DET|\ 900 VBUS_RBUV_RES|\ 901 VBUS_TH_DET |\ 902 VBUS_TH_RES |\ 903 VBUS_IIN_MOD|\ 904 VBUS_OV_DET |\ 905 VBUS_OV_RES |\ 906 VBUS_CLPS_DET |\ 907 VBUS_CLPS |\ 908 VBUS_DET |\ 909 VBUS_RES) 910 911 /* INT 2 */ 912 #define VCC_RBUV_DET BIT(15) 913 #define VCC_RBUV_RES BIT(14) 914 #define VCC_TH_DET BIT(9) 915 #define VCC_TH_RES BIT(8) 916 #define VCC_IIN_MOD BIT(6) 917 #define VCC_OVP_DET BIT(5) 918 #define VCC_OVP_RES BIT(4) 919 #define VCC_CLPS_DET BIT(3) 920 #define VCC_CLPS_RES BIT(2) 921 #define VCC_DET BIT(1) 922 #define VCC_RES BIT(0) 923 #define INT2_ALL (VCC_RBUV_DET |\ 924 VCC_RBUV_RES |\ 925 VCC_TH_DET |\ 926 VCC_TH_RES |\ 927 VCC_IIN_MOD |\ 928 VCC_OVP_DET |\ 929 VCC_OVP_RES |\ 930 VCC_CLPS_DET |\ 931 VCC_CLPS_RES |\ 932 VCC_DET |\ 933 VCC_RES) 934 /* INT 3 */ 935 #define TH_DET BIT(15) 936 #define TH_RMV BIT(14) 937 #define TMP_OUT_DET BIT(11) 938 #define TMP_OUT_RES BIT(10) 939 #define VBAT_TH_DET BIT(9) 940 #define VBAT_TH_RES BIT(8) 941 #define IBAT_SHORT_DET BIT(7) 942 #define IBAT_SHORT_RES BIT(6) 943 #define VBAT_OV_DET BIT(5) 944 #define VBAT_OV_RES BIT(4) 945 #define BAT_ASSIST_DET BIT(3) 946 #define BAT_ASSIST_RES BIT(2) 947 #define INT3_ALL (TH_DET |\ 948 TH_RMV |\ 949 TMP_OUT_DET |\ 950 TMP_OUT_RES |\ 951 VBAT_TH_DET |\ 952 VBAT_TH_RES |\ 953 IBAT_SHORT_DET |\ 954 IBAT_SHORT_RES |\ 955 VBAT_OV_DET |\ 956 VBAT_OV_RES |\ 957 BAT_ASSIST_DET |\ 958 BAT_ASSIST_RES) 959 960 /* INT 4 */ 961 #define VSYS_TH_DET BIT(9) 962 #define VSYS_TH_RES BIT(8) 963 #define VSYS_OV_DET BIT(5) 964 #define VSYS_OV_RES BIT(4) 965 #define VSYS_SHT_DET BIT(3) 966 #define VSYS_SHT_RES BIT(2) 967 #define VSYS_UV_DET BIT(1) 968 #define VSYS_UV_RES BIT(0) 969 #define INT4_ALL (VSYS_TH_DET |\ 970 VSYS_TH_RES |\ 971 VSYS_OV_DET |\ 972 VSYS_OV_RES |\ 973 VSYS_SHT_DET |\ 974 VSYS_SHT_RES |\ 975 VSYS_UV_DET |\ 976 VSYS_UV_RES) 977 978 /* INT 5*/ 979 #define OTP_LOAD_DONE BIT(13) 980 #define PWR_ON BIT(12) 981 #define EXTIADP_TRNS BIT(11) 982 #define EXTIADP_TH_DET BIT(9) 983 #define EXIADP_TH_RES BIT(8) 984 #define BAT_MNT_DET BIT(7) 985 #define BAT_MNT_RES BIT(6) 986 #define TSD_DET BIT(5) 987 #define TSD_RES BIT(4) 988 #define CHGWDT_EXP BIT(3) 989 #define THERMWDT_EXP BIT(2) 990 #define TMP_TRNS BIT(1) 991 #define CHG_TRNS BIT(0) 992 #define INT5_ALL (OTP_LOAD_DONE |\ 993 PWR_ON |\ 994 EXTIADP_TRNS |\ 995 EXTIADP_TH_DET |\ 996 EXIADP_TH_RES |\ 997 BAT_MNT_DET |\ 998 BAT_MNT_RES |\ 999 TSD_DET |\ 1000 TSD_RES |\ 1001 CHGWDT_EXP |\ 1002 THERMWDT_EXP |\ 1003 TMP_TRNS |\ 1004 CHG_TRNS) 1005 1006 /* INT 6*/ 1007 #define VBUS_UCD_PORT_DET BIT(13) 1008 #define VBUS_UCD_UCHG_DET BIT(12) 1009 #define VBUS_UCD_URID_RMV BIT(11) 1010 #define VBUS_UCD_OTG_DET BIT(10) 1011 #define VBUS_UCD_URID_MOD BIT(8) 1012 #define VCC_UCD_PORT_DET BIT(5) 1013 #define VCC_UCD_UCHG_DET BIT(4) 1014 #define VCC_UCD_URID_RMV BIT(3) 1015 #define VCC_UCD_OTG_DET BIT(2) 1016 #define VCC_UCD_URID_MOD BIT(0) 1017 #define INT6_ALL (VBUS_UCD_PORT_DET |\ 1018 VBUS_UCD_UCHG_DET |\ 1019 VBUS_UCD_URID_RMV |\ 1020 VBUS_UCD_OTG_DET |\ 1021 VBUS_UCD_URID_MOD |\ 1022 VCC_UCD_PORT_DET |\ 1023 VCC_UCD_UCHG_DET |\ 1024 VCC_UCD_URID_RMV |\ 1025 VCC_UCD_OTG_DET |\ 1026 VCC_UCD_URID_MOD) 1027 1028 /* INT 7 */ 1029 #define PROCHOT_DET BIT(15) 1030 #define PROCHOT_RES BIT(14) 1031 #define VACP_DET BIT(11) 1032 #define VACP_RES BIT(10) 1033 #define VACP_TH_DET BIT(9) 1034 #define VACP_TH_RES BIT(8) 1035 #define IACP_TH_DET BIT(7) 1036 #define IACP_THE_RES BIT(6) 1037 #define THERM_TH_DET BIT(5) 1038 #define THERM_TH_RES BIT(4) 1039 #define IBATM_TH_DET BIT(3) 1040 #define IBATM_TH_RES BIT(2) 1041 #define IBATP_TH_DET BIT(1) 1042 #define IBATP_TH_RES BIT(0) 1043 #define INT7_ALL (PROCHOT_DET |\ 1044 PROCHOT_RES |\ 1045 VACP_DET |\ 1046 VACP_RES |\ 1047 VACP_TH_DET |\ 1048 VACP_TH_RES |\ 1049 IACP_TH_DET |\ 1050 IACP_THE_RES |\ 1051 THERM_TH_DET |\ 1052 THERM_TH_RES |\ 1053 IBATM_TH_DET |\ 1054 IBATM_TH_RES |\ 1055 IBATP_TH_DET |\ 1056 IBATP_TH_RES) 1057 1058 /* SYSTEM_CTRL_SET*/ 1059 #define MONRST BIT(6) 1060 #define ALMRST BIT(5) 1061 #define CHGRST BIT(4) 1062 #define OTPLD BIT(1) 1063 #define ALLRST BIT(0) 1064 1065 /* F_BATTEMP */ 1066 #define ROOM 0x0 1067 #define HOT1 0x1 1068 #define HOT2 0x2 1069 #define HOT3 0x3 1070 #define COLD1 0x4 1071 #define COLD2 0x5 1072 #define TEMP_DIS 0x6 1073 #define BATT_OPEN 0x7 1074 1075 #endif 1076