1 /*
2  * Atmel SAMA5D2-Compatible Shutdown Controller (SHDWC) driver.
3  * Found on some SoCs as the sama5d2 (obviously).
4  *
5  * Copyright (C) 2015 Atmel Corporation,
6  *                    Nicolas Ferre <nicolas.ferre@atmel.com>
7  *
8  * Evolved from driver at91-poweroff.c.
9  *
10  * This file is licensed under the terms of the GNU General Public
11  * License version 2.  This program is licensed "as is" without any
12  * warranty of any kind, whether express or implied.
13  *
14  * TODO:
15  * - addition to status of other wake-up inputs [1 - 15]
16  * - Analog Comparator wake-up alarm
17  * - Serial RX wake-up alarm
18  * - low power debouncer
19  */
20 
21 #include <linux/clk.h>
22 #include <linux/clk/at91_pmc.h>
23 #include <linux/io.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/platform_device.h>
28 #include <linux/printk.h>
29 
30 #include <soc/at91/at91sam9_ddrsdr.h>
31 
32 #define SLOW_CLOCK_FREQ	32768
33 
34 #define AT91_SHDW_CR	0x00		/* Shut Down Control Register */
35 #define AT91_SHDW_SHDW		BIT(0)			/* Shut Down command */
36 #define AT91_SHDW_KEY		(0xa5UL << 24)		/* KEY Password */
37 
38 #define AT91_SHDW_MR	0x04		/* Shut Down Mode Register */
39 #define AT91_SHDW_WKUPDBC_SHIFT	24
40 #define AT91_SHDW_WKUPDBC_MASK	GENMASK(31, 16)
41 #define AT91_SHDW_WKUPDBC(x)	(((x) << AT91_SHDW_WKUPDBC_SHIFT) \
42 						& AT91_SHDW_WKUPDBC_MASK)
43 
44 #define AT91_SHDW_SR	0x08		/* Shut Down Status Register */
45 #define AT91_SHDW_WKUPIS_SHIFT	16
46 #define AT91_SHDW_WKUPIS_MASK	GENMASK(31, 16)
47 #define AT91_SHDW_WKUPIS(x)	((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
48 						& AT91_SHDW_WKUPIS_MASK)
49 
50 #define AT91_SHDW_WUIR	0x0c		/* Shutdown Wake-up Inputs Register */
51 #define AT91_SHDW_WKUPEN_MASK	GENMASK(15, 0)
52 #define AT91_SHDW_WKUPEN(x)	((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
53 #define AT91_SHDW_WKUPT_SHIFT	16
54 #define AT91_SHDW_WKUPT_MASK	GENMASK(31, 16)
55 #define AT91_SHDW_WKUPT(x)	((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
56 						& AT91_SHDW_WKUPT_MASK)
57 
58 #define SHDW_WK_PIN(reg, cfg)	((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
59 #define SHDW_RTCWK(reg, cfg)	(((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
60 #define SHDW_RTCWKEN(cfg)	(1 << ((cfg)->mr_rtcwk_shift))
61 
62 #define DBC_PERIOD_US(x)	DIV_ROUND_UP_ULL((1000000 * (x)), \
63 							SLOW_CLOCK_FREQ)
64 
65 struct shdwc_config {
66 	u8 wkup_pin_input;
67 	u8 mr_rtcwk_shift;
68 	u8 sr_rtcwk_shift;
69 };
70 
71 struct shdwc {
72 	const struct shdwc_config *cfg;
73 	void __iomem *at91_shdwc_base;
74 	void __iomem *mpddrc_base;
75 	void __iomem *pmc_base;
76 };
77 
78 /*
79  * Hold configuration here, cannot be more than one instance of the driver
80  * since pm_power_off itself is global.
81  */
82 static struct shdwc *at91_shdwc;
83 static struct clk *sclk;
84 
85 static const unsigned long long sdwc_dbc_period[] = {
86 	0, 3, 32, 512, 4096, 32768,
87 };
88 
89 static void __init at91_wakeup_status(struct platform_device *pdev)
90 {
91 	struct shdwc *shdw = platform_get_drvdata(pdev);
92 	u32 reg;
93 	char *reason = "unknown";
94 
95 	reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
96 
97 	dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
98 
99 	/* Simple power-on, just bail out */
100 	if (!reg)
101 		return;
102 
103 	if (SHDW_WK_PIN(reg, shdw->cfg))
104 		reason = "WKUP pin";
105 	else if (SHDW_RTCWK(reg, shdw->cfg))
106 		reason = "RTC";
107 
108 	pr_info("AT91: Wake-Up source: %s\n", reason);
109 }
110 
111 static void at91_poweroff(void)
112 {
113 	asm volatile(
114 		/* Align to cache lines */
115 		".balign 32\n\t"
116 
117 		/* Ensure AT91_SHDW_CR is in the TLB by reading it */
118 		"	ldr	r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
119 
120 		/* Power down SDRAM0 */
121 		"	tst	%0, #0\n\t"
122 		"	beq	1f\n\t"
123 		"	str	%1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t"
124 
125 		/* Switch the master clock source to slow clock. */
126 		"1:	ldr	r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
127 		"	bic	r6, r6,  #" __stringify(AT91_PMC_CSS) "\n\t"
128 		"	str	r6, [%4, #" __stringify(AT91_PMC_MCKR) "]\n\t"
129 		/* Wait for clock switch. */
130 		"2:	ldr	r6, [%4, #" __stringify(AT91_PMC_SR) "]\n\t"
131 		"	tst	r6, #"	    __stringify(AT91_PMC_MCKRDY) "\n\t"
132 		"	beq	2b\n\t"
133 
134 		/* Shutdown CPU */
135 		"	str	%3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t"
136 
137 		"	b	.\n\t"
138 		:
139 		: "r" (at91_shdwc->mpddrc_base),
140 		  "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF),
141 		  "r" (at91_shdwc->at91_shdwc_base),
142 		  "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW),
143 		  "r" (at91_shdwc->pmc_base)
144 		: "r6");
145 }
146 
147 static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
148 				      u32 in_period_us)
149 {
150 	int i;
151 	int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
152 	unsigned long long period_us;
153 	unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
154 
155 	if (in_period_us > max_period_us) {
156 		dev_warn(&pdev->dev,
157 			 "debouncer period %u too big, reduced to %llu us\n",
158 			 in_period_us, max_period_us);
159 		return max_idx;
160 	}
161 
162 	for (i = max_idx - 1; i > 0; i--) {
163 		period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
164 		dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
165 						__func__, i, period_us);
166 		if (in_period_us > period_us)
167 			break;
168 	}
169 
170 	return i + 1;
171 }
172 
173 static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
174 				       struct device_node *np)
175 {
176 	struct device_node *cnp;
177 	u32 wk_input_mask;
178 	u32 wuir = 0;
179 	u32 wk_input;
180 
181 	for_each_child_of_node(np, cnp) {
182 		if (of_property_read_u32(cnp, "reg", &wk_input)) {
183 			dev_warn(&pdev->dev, "reg property is missing for %pOF\n",
184 				 cnp);
185 			continue;
186 		}
187 
188 		wk_input_mask = 1 << wk_input;
189 		if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
190 			dev_warn(&pdev->dev,
191 				 "wake-up input %d out of bounds ignore\n",
192 				 wk_input);
193 			continue;
194 		}
195 		wuir |= wk_input_mask;
196 
197 		if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
198 			wuir |= AT91_SHDW_WKUPT(wk_input);
199 
200 		dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
201 						__func__, wk_input, wuir);
202 	}
203 
204 	return wuir;
205 }
206 
207 static void at91_shdwc_dt_configure(struct platform_device *pdev)
208 {
209 	struct shdwc *shdw = platform_get_drvdata(pdev);
210 	struct device_node *np = pdev->dev.of_node;
211 	u32 mode = 0, tmp, input;
212 
213 	if (!np) {
214 		dev_err(&pdev->dev, "device node not found\n");
215 		return;
216 	}
217 
218 	if (!of_property_read_u32(np, "debounce-delay-us", &tmp))
219 		mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
220 
221 	if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
222 		mode |= SHDW_RTCWKEN(shdw->cfg);
223 
224 	dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
225 	writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
226 
227 	input = at91_shdwc_get_wakeup_input(pdev, np);
228 	writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
229 }
230 
231 static const struct shdwc_config sama5d2_shdwc_config = {
232 	.wkup_pin_input = 0,
233 	.mr_rtcwk_shift = 17,
234 	.sr_rtcwk_shift = 5,
235 };
236 
237 static const struct of_device_id at91_shdwc_of_match[] = {
238 	{
239 		.compatible = "atmel,sama5d2-shdwc",
240 		.data = &sama5d2_shdwc_config,
241 	}, {
242 		/*sentinel*/
243 	}
244 };
245 MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
246 
247 static int __init at91_shdwc_probe(struct platform_device *pdev)
248 {
249 	struct resource *res;
250 	const struct of_device_id *match;
251 	struct device_node *np;
252 	u32 ddr_type;
253 	int ret;
254 
255 	if (!pdev->dev.of_node)
256 		return -ENODEV;
257 
258 	at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
259 	if (!at91_shdwc)
260 		return -ENOMEM;
261 
262 	platform_set_drvdata(pdev, at91_shdwc);
263 
264 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 	at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
266 	if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
267 		dev_err(&pdev->dev, "Could not map reset controller address\n");
268 		return PTR_ERR(at91_shdwc->at91_shdwc_base);
269 	}
270 
271 	match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
272 	at91_shdwc->cfg = match->data;
273 
274 	sclk = devm_clk_get(&pdev->dev, NULL);
275 	if (IS_ERR(sclk))
276 		return PTR_ERR(sclk);
277 
278 	ret = clk_prepare_enable(sclk);
279 	if (ret) {
280 		dev_err(&pdev->dev, "Could not enable slow clock\n");
281 		return ret;
282 	}
283 
284 	at91_wakeup_status(pdev);
285 
286 	at91_shdwc_dt_configure(pdev);
287 
288 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-pmc");
289 	if (!np) {
290 		ret = -ENODEV;
291 		goto clk_disable;
292 	}
293 
294 	at91_shdwc->pmc_base = of_iomap(np, 0);
295 	of_node_put(np);
296 
297 	if (!at91_shdwc->pmc_base) {
298 		ret = -ENOMEM;
299 		goto clk_disable;
300 	}
301 
302 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
303 	if (!np) {
304 		ret = -ENODEV;
305 		goto unmap;
306 	}
307 
308 	at91_shdwc->mpddrc_base = of_iomap(np, 0);
309 	of_node_put(np);
310 
311 	if (!at91_shdwc->mpddrc_base) {
312 		ret = -ENOMEM;
313 		goto unmap;
314 	}
315 
316 	pm_power_off = at91_poweroff;
317 
318 	ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
319 			 AT91_DDRSDRC_MD;
320 	if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
321 	    ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
322 		iounmap(at91_shdwc->mpddrc_base);
323 		at91_shdwc->mpddrc_base = NULL;
324 	}
325 
326 	return 0;
327 
328 unmap:
329 	iounmap(at91_shdwc->pmc_base);
330 clk_disable:
331 	clk_disable_unprepare(sclk);
332 
333 	return ret;
334 }
335 
336 static int __exit at91_shdwc_remove(struct platform_device *pdev)
337 {
338 	struct shdwc *shdw = platform_get_drvdata(pdev);
339 
340 	if (pm_power_off == at91_poweroff)
341 		pm_power_off = NULL;
342 
343 	/* Reset values to disable wake-up features  */
344 	writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
345 	writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
346 
347 	if (shdw->mpddrc_base)
348 		iounmap(shdw->mpddrc_base);
349 	iounmap(shdw->pmc_base);
350 
351 	clk_disable_unprepare(sclk);
352 
353 	return 0;
354 }
355 
356 static struct platform_driver at91_shdwc_driver = {
357 	.remove = __exit_p(at91_shdwc_remove),
358 	.driver = {
359 		.name = "at91-shdwc",
360 		.of_match_table = at91_shdwc_of_match,
361 	},
362 };
363 module_platform_driver_probe(at91_shdwc_driver, at91_shdwc_probe);
364 
365 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
366 MODULE_DESCRIPTION("Atmel shutdown controller driver");
367 MODULE_LICENSE("GPL v2");
368