1 /* 2 * Atmel AT91 SAM9 SoCs reset code 3 * 4 * Copyright (C) 2007 Atmel Corporation. 5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 6 * Copyright (C) 2014 Free Electrons 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/io.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/of_address.h> 18 #include <linux/platform_device.h> 19 #include <linux/printk.h> 20 21 #include <soc/at91/at91sam9_ddrsdr.h> 22 23 #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ 24 #define AT91_SHDW_SHDW BIT(0) /* Shut Down command */ 25 #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ 26 27 #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ 28 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */ 29 #define AT91_SHDW_CPTWK0_MAX 0xf /* Maximum Counter On Wake Up 0 */ 30 #define AT91_SHDW_CPTWK0 (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */ 31 #define AT91_SHDW_CPTWK0_(x) ((x) << 4) 32 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */ 33 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */ 34 35 #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ 36 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */ 37 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */ 38 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */ 39 40 enum wakeup_type { 41 AT91_SHDW_WKMODE0_NONE = 0, 42 AT91_SHDW_WKMODE0_HIGH = 1, 43 AT91_SHDW_WKMODE0_LOW = 2, 44 AT91_SHDW_WKMODE0_ANYLEVEL = 3, 45 }; 46 47 static const char *shdwc_wakeup_modes[] = { 48 [AT91_SHDW_WKMODE0_NONE] = "none", 49 [AT91_SHDW_WKMODE0_HIGH] = "high", 50 [AT91_SHDW_WKMODE0_LOW] = "low", 51 [AT91_SHDW_WKMODE0_ANYLEVEL] = "any", 52 }; 53 54 static void __iomem *at91_shdwc_base; 55 static struct clk *sclk; 56 static void __iomem *mpddrc_base; 57 58 static void __init at91_wakeup_status(void) 59 { 60 u32 reg = readl(at91_shdwc_base + AT91_SHDW_SR); 61 char *reason = "unknown"; 62 63 /* Simple power-on, just bail out */ 64 if (!reg) 65 return; 66 67 if (reg & AT91_SHDW_RTTWK) 68 reason = "RTT"; 69 else if (reg & AT91_SHDW_RTCWK) 70 reason = "RTC"; 71 72 pr_info("AT91: Wake-Up source: %s\n", reason); 73 } 74 75 static void at91_poweroff(void) 76 { 77 writel(AT91_SHDW_KEY | AT91_SHDW_SHDW, at91_shdwc_base + AT91_SHDW_CR); 78 } 79 80 static void at91_lpddr_poweroff(void) 81 { 82 asm volatile( 83 /* Align to cache lines */ 84 ".balign 32\n\t" 85 86 /* Ensure AT91_SHDW_CR is in the TLB by reading it */ 87 " ldr r6, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t" 88 89 /* Power down SDRAM0 */ 90 " str %1, [%0, #" __stringify(AT91_DDRSDRC_LPR) "]\n\t" 91 /* Shutdown CPU */ 92 " str %3, [%2, #" __stringify(AT91_SHDW_CR) "]\n\t" 93 94 " b .\n\t" 95 : 96 : "r" (mpddrc_base), 97 "r" cpu_to_le32(AT91_DDRSDRC_LPDDR2_PWOFF), 98 "r" (at91_shdwc_base), 99 "r" cpu_to_le32(AT91_SHDW_KEY | AT91_SHDW_SHDW) 100 : "r6"); 101 } 102 103 static int at91_poweroff_get_wakeup_mode(struct device_node *np) 104 { 105 const char *pm; 106 unsigned int i; 107 int err; 108 109 err = of_property_read_string(np, "atmel,wakeup-mode", &pm); 110 if (err < 0) 111 return AT91_SHDW_WKMODE0_ANYLEVEL; 112 113 for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++) 114 if (!strcasecmp(pm, shdwc_wakeup_modes[i])) 115 return i; 116 117 return -ENODEV; 118 } 119 120 static void at91_poweroff_dt_set_wakeup_mode(struct platform_device *pdev) 121 { 122 struct device_node *np = pdev->dev.of_node; 123 int wakeup_mode; 124 u32 mode = 0, tmp; 125 126 wakeup_mode = at91_poweroff_get_wakeup_mode(np); 127 if (wakeup_mode < 0) { 128 dev_warn(&pdev->dev, "shdwc unknown wakeup mode\n"); 129 return; 130 } 131 132 if (!of_property_read_u32(np, "atmel,wakeup-counter", &tmp)) { 133 if (tmp > AT91_SHDW_CPTWK0_MAX) { 134 dev_warn(&pdev->dev, 135 "shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", 136 tmp, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX); 137 tmp = AT91_SHDW_CPTWK0_MAX; 138 } 139 mode |= AT91_SHDW_CPTWK0_(tmp); 140 } 141 142 if (of_property_read_bool(np, "atmel,wakeup-rtc-timer")) 143 mode |= AT91_SHDW_RTCWKEN; 144 145 if (of_property_read_bool(np, "atmel,wakeup-rtt-timer")) 146 mode |= AT91_SHDW_RTTWKEN; 147 148 writel(wakeup_mode | mode, at91_shdwc_base + AT91_SHDW_MR); 149 } 150 151 static int __init at91_poweroff_probe(struct platform_device *pdev) 152 { 153 struct resource *res; 154 struct device_node *np; 155 u32 ddr_type; 156 int ret; 157 158 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 159 at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res); 160 if (IS_ERR(at91_shdwc_base)) { 161 dev_err(&pdev->dev, "Could not map reset controller address\n"); 162 return PTR_ERR(at91_shdwc_base); 163 } 164 165 sclk = devm_clk_get(&pdev->dev, NULL); 166 if (IS_ERR(sclk)) 167 return PTR_ERR(sclk); 168 169 ret = clk_prepare_enable(sclk); 170 if (ret) { 171 dev_err(&pdev->dev, "Could not enable slow clock\n"); 172 return ret; 173 } 174 175 at91_wakeup_status(); 176 177 if (pdev->dev.of_node) 178 at91_poweroff_dt_set_wakeup_mode(pdev); 179 180 pm_power_off = at91_poweroff; 181 182 np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc"); 183 if (!np) 184 return 0; 185 186 mpddrc_base = of_iomap(np, 0); 187 of_node_put(np); 188 189 if (!mpddrc_base) 190 return 0; 191 192 ddr_type = readl(mpddrc_base + AT91_DDRSDRC_MDR) & AT91_DDRSDRC_MD; 193 if ((ddr_type == AT91_DDRSDRC_MD_LPDDR2) || 194 (ddr_type == AT91_DDRSDRC_MD_LPDDR3)) 195 pm_power_off = at91_lpddr_poweroff; 196 else 197 iounmap(mpddrc_base); 198 199 return 0; 200 } 201 202 static int __exit at91_poweroff_remove(struct platform_device *pdev) 203 { 204 if (pm_power_off == at91_poweroff || 205 pm_power_off == at91_lpddr_poweroff) 206 pm_power_off = NULL; 207 208 clk_disable_unprepare(sclk); 209 210 return 0; 211 } 212 213 static const struct of_device_id at91_ramc_of_match[] = { 214 { .compatible = "atmel,sama5d3-ddramc", }, 215 { /* sentinel */ } 216 }; 217 218 static const struct of_device_id at91_poweroff_of_match[] = { 219 { .compatible = "atmel,at91sam9260-shdwc", }, 220 { .compatible = "atmel,at91sam9rl-shdwc", }, 221 { .compatible = "atmel,at91sam9x5-shdwc", }, 222 { /*sentinel*/ } 223 }; 224 MODULE_DEVICE_TABLE(of, at91_poweroff_of_match); 225 226 static struct platform_driver at91_poweroff_driver = { 227 .remove = __exit_p(at91_poweroff_remove), 228 .driver = { 229 .name = "at91-poweroff", 230 .of_match_table = at91_poweroff_of_match, 231 }, 232 }; 233 module_platform_driver_probe(at91_poweroff_driver, at91_poweroff_probe); 234 235 MODULE_AUTHOR("Atmel Corporation"); 236 MODULE_DESCRIPTION("Shutdown driver for Atmel SoCs"); 237 MODULE_LICENSE("GPL v2"); 238