1*e2ad626fSUlf Hansson // SPDX-License-Identifier: GPL-2.0 2*e2ad626fSUlf Hansson /* 3*e2ad626fSUlf Hansson * Renesas R-Car H2 System Controller 4*e2ad626fSUlf Hansson * 5*e2ad626fSUlf Hansson * Copyright (C) 2016 Glider bvba 6*e2ad626fSUlf Hansson */ 7*e2ad626fSUlf Hansson 8*e2ad626fSUlf Hansson #include <linux/kernel.h> 9*e2ad626fSUlf Hansson 10*e2ad626fSUlf Hansson #include <dt-bindings/power/r8a7790-sysc.h> 11*e2ad626fSUlf Hansson 12*e2ad626fSUlf Hansson #include "rcar-sysc.h" 13*e2ad626fSUlf Hansson 14*e2ad626fSUlf Hansson static const struct rcar_sysc_area r8a7790_areas[] __initconst = { 15*e2ad626fSUlf Hansson { "always-on", 0, 0, R8A7790_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, 16*e2ad626fSUlf Hansson { "ca15-scu", 0x180, 0, R8A7790_PD_CA15_SCU, R8A7790_PD_ALWAYS_ON, 17*e2ad626fSUlf Hansson PD_SCU }, 18*e2ad626fSUlf Hansson { "ca15-cpu0", 0x40, 0, R8A7790_PD_CA15_CPU0, R8A7790_PD_CA15_SCU, 19*e2ad626fSUlf Hansson PD_CPU_NOCR }, 20*e2ad626fSUlf Hansson { "ca15-cpu1", 0x40, 1, R8A7790_PD_CA15_CPU1, R8A7790_PD_CA15_SCU, 21*e2ad626fSUlf Hansson PD_CPU_NOCR }, 22*e2ad626fSUlf Hansson { "ca15-cpu2", 0x40, 2, R8A7790_PD_CA15_CPU2, R8A7790_PD_CA15_SCU, 23*e2ad626fSUlf Hansson PD_CPU_NOCR }, 24*e2ad626fSUlf Hansson { "ca15-cpu3", 0x40, 3, R8A7790_PD_CA15_CPU3, R8A7790_PD_CA15_SCU, 25*e2ad626fSUlf Hansson PD_CPU_NOCR }, 26*e2ad626fSUlf Hansson { "ca7-scu", 0x100, 0, R8A7790_PD_CA7_SCU, R8A7790_PD_ALWAYS_ON, 27*e2ad626fSUlf Hansson PD_SCU }, 28*e2ad626fSUlf Hansson { "ca7-cpu0", 0x1c0, 0, R8A7790_PD_CA7_CPU0, R8A7790_PD_CA7_SCU, 29*e2ad626fSUlf Hansson PD_CPU_NOCR }, 30*e2ad626fSUlf Hansson { "ca7-cpu1", 0x1c0, 1, R8A7790_PD_CA7_CPU1, R8A7790_PD_CA7_SCU, 31*e2ad626fSUlf Hansson PD_CPU_NOCR }, 32*e2ad626fSUlf Hansson { "ca7-cpu2", 0x1c0, 2, R8A7790_PD_CA7_CPU2, R8A7790_PD_CA7_SCU, 33*e2ad626fSUlf Hansson PD_CPU_NOCR }, 34*e2ad626fSUlf Hansson { "ca7-cpu3", 0x1c0, 3, R8A7790_PD_CA7_CPU3, R8A7790_PD_CA7_SCU, 35*e2ad626fSUlf Hansson PD_CPU_NOCR }, 36*e2ad626fSUlf Hansson { "sh-4a", 0x80, 0, R8A7790_PD_SH_4A, R8A7790_PD_ALWAYS_ON }, 37*e2ad626fSUlf Hansson { "rgx", 0xc0, 0, R8A7790_PD_RGX, R8A7790_PD_ALWAYS_ON }, 38*e2ad626fSUlf Hansson { "imp", 0x140, 0, R8A7790_PD_IMP, R8A7790_PD_ALWAYS_ON }, 39*e2ad626fSUlf Hansson }; 40*e2ad626fSUlf Hansson 41*e2ad626fSUlf Hansson const struct rcar_sysc_info r8a7790_sysc_info __initconst = { 42*e2ad626fSUlf Hansson .areas = r8a7790_areas, 43*e2ad626fSUlf Hansson .num_areas = ARRAY_SIZE(r8a7790_areas), 44*e2ad626fSUlf Hansson }; 45