1a2f9fbc2SHans de Goede /* SPDX-License-Identifier: GPL-2.0 */ 2a2f9fbc2SHans de Goede /* Author: Dan Scally <djrscally@gmail.com> */ 3a2f9fbc2SHans de Goede 4a2f9fbc2SHans de Goede #ifndef _INTEL_SKL_INT3472_H 5a2f9fbc2SHans de Goede #define _INTEL_SKL_INT3472_H 6a2f9fbc2SHans de Goede 7a2f9fbc2SHans de Goede #include <linux/clk-provider.h> 8a2f9fbc2SHans de Goede #include <linux/gpio/machine.h> 95ae20a80SHans de Goede #include <linux/leds.h> 10a2f9fbc2SHans de Goede #include <linux/regulator/driver.h> 11a2f9fbc2SHans de Goede #include <linux/regulator/machine.h> 12a2f9fbc2SHans de Goede #include <linux/types.h> 13a2f9fbc2SHans de Goede 14a2f9fbc2SHans de Goede /* FIXME drop this once the I2C_DEV_NAME_FORMAT macro has been added to include/linux/i2c.h */ 15a2f9fbc2SHans de Goede #ifndef I2C_DEV_NAME_FORMAT 16a2f9fbc2SHans de Goede #define I2C_DEV_NAME_FORMAT "i2c-%s" 17a2f9fbc2SHans de Goede #endif 18a2f9fbc2SHans de Goede 19a2f9fbc2SHans de Goede /* PMIC GPIO Types */ 20a2f9fbc2SHans de Goede #define INT3472_GPIO_TYPE_RESET 0x00 21a2f9fbc2SHans de Goede #define INT3472_GPIO_TYPE_POWERDOWN 0x01 22a2f9fbc2SHans de Goede #define INT3472_GPIO_TYPE_POWER_ENABLE 0x0b 23a2f9fbc2SHans de Goede #define INT3472_GPIO_TYPE_CLK_ENABLE 0x0c 24a2f9fbc2SHans de Goede #define INT3472_GPIO_TYPE_PRIVACY_LED 0x0d 25a2f9fbc2SHans de Goede 26a2f9fbc2SHans de Goede #define INT3472_PDEV_MAX_NAME_LEN 23 27a2f9fbc2SHans de Goede #define INT3472_MAX_SENSOR_GPIOS 3 28a2f9fbc2SHans de Goede 29a2f9fbc2SHans de Goede #define GPIO_REGULATOR_NAME_LENGTH 21 30a2f9fbc2SHans de Goede #define GPIO_REGULATOR_SUPPLY_NAME_LENGTH 9 31*ebeb3fffSHans de Goede #define GPIO_REGULATOR_SUPPLY_MAP_COUNT 2 32a2f9fbc2SHans de Goede 335ae20a80SHans de Goede #define INT3472_LED_MAX_NAME_LEN 32 345ae20a80SHans de Goede 35a2f9fbc2SHans de Goede #define CIO2_SENSOR_SSDB_MCLKSPEED_OFFSET 86 36a2f9fbc2SHans de Goede 37a2f9fbc2SHans de Goede #define INT3472_REGULATOR(_name, _supply, _ops) \ 38a2f9fbc2SHans de Goede (const struct regulator_desc) { \ 39a2f9fbc2SHans de Goede .name = _name, \ 40a2f9fbc2SHans de Goede .supply_name = _supply, \ 41a2f9fbc2SHans de Goede .type = REGULATOR_VOLTAGE, \ 42a2f9fbc2SHans de Goede .ops = _ops, \ 43a2f9fbc2SHans de Goede .owner = THIS_MODULE, \ 44a2f9fbc2SHans de Goede } 45a2f9fbc2SHans de Goede 46a2f9fbc2SHans de Goede #define to_int3472_clk(hw) \ 47e4543de8SBingbu Cao container_of(hw, struct int3472_clock, clk_hw) 48a2f9fbc2SHans de Goede 49a2f9fbc2SHans de Goede #define to_int3472_device(clk) \ 50a2f9fbc2SHans de Goede container_of(clk, struct int3472_discrete_device, clock) 51a2f9fbc2SHans de Goede 52a2f9fbc2SHans de Goede struct acpi_device; 53a2f9fbc2SHans de Goede struct i2c_client; 54a2f9fbc2SHans de Goede struct platform_device; 55a2f9fbc2SHans de Goede 56a2f9fbc2SHans de Goede struct int3472_cldb { 57a2f9fbc2SHans de Goede u8 version; 58a2f9fbc2SHans de Goede /* 59a2f9fbc2SHans de Goede * control logic type 60a2f9fbc2SHans de Goede * 0: UNKNOWN 61a2f9fbc2SHans de Goede * 1: DISCRETE(CRD-D) 62a2f9fbc2SHans de Goede * 2: PMIC TPS68470 63a2f9fbc2SHans de Goede * 3: PMIC uP6641 64a2f9fbc2SHans de Goede */ 65a2f9fbc2SHans de Goede u8 control_logic_type; 66a2f9fbc2SHans de Goede u8 control_logic_id; 67a2f9fbc2SHans de Goede u8 sensor_card_sku; 68e4543de8SBingbu Cao u8 reserved[10]; 69e4543de8SBingbu Cao u8 clock_source; 70e4543de8SBingbu Cao u8 reserved2[17]; 71a2f9fbc2SHans de Goede }; 72a2f9fbc2SHans de Goede 73a2f9fbc2SHans de Goede struct int3472_discrete_device { 74a2f9fbc2SHans de Goede struct acpi_device *adev; 75a2f9fbc2SHans de Goede struct device *dev; 76a2f9fbc2SHans de Goede struct acpi_device *sensor; 77a2f9fbc2SHans de Goede const char *sensor_name; 78a2f9fbc2SHans de Goede 79a2f9fbc2SHans de Goede const struct int3472_sensor_config *sensor_config; 80a2f9fbc2SHans de Goede 81a2f9fbc2SHans de Goede struct int3472_gpio_regulator { 82f1a58250SHans de Goede /* SUPPLY_MAP_COUNT * 2 to make room for second sensor mappings */ 83f1a58250SHans de Goede struct regulator_consumer_supply supply_map[GPIO_REGULATOR_SUPPLY_MAP_COUNT * 2]; 84a2f9fbc2SHans de Goede char regulator_name[GPIO_REGULATOR_NAME_LENGTH]; 85a2f9fbc2SHans de Goede char supply_name[GPIO_REGULATOR_SUPPLY_NAME_LENGTH]; 86a2f9fbc2SHans de Goede struct gpio_desc *gpio; 87a2f9fbc2SHans de Goede struct regulator_dev *rdev; 88a2f9fbc2SHans de Goede struct regulator_desc rdesc; 89a2f9fbc2SHans de Goede } regulator; 90a2f9fbc2SHans de Goede 91e4543de8SBingbu Cao struct int3472_clock { 92a2f9fbc2SHans de Goede struct clk *clk; 93a2f9fbc2SHans de Goede struct clk_hw clk_hw; 94a2f9fbc2SHans de Goede struct clk_lookup *cl; 95a2f9fbc2SHans de Goede struct gpio_desc *ena_gpio; 96a2f9fbc2SHans de Goede u32 frequency; 97e4543de8SBingbu Cao u8 imgclk_index; 98a2f9fbc2SHans de Goede } clock; 99a2f9fbc2SHans de Goede 1005ae20a80SHans de Goede struct int3472_pled { 1015ae20a80SHans de Goede struct led_classdev classdev; 1025ae20a80SHans de Goede struct led_lookup_data lookup; 1035ae20a80SHans de Goede char name[INT3472_LED_MAX_NAME_LEN]; 1045ae20a80SHans de Goede struct gpio_desc *gpio; 1055ae20a80SHans de Goede } pled; 1065ae20a80SHans de Goede 107a2f9fbc2SHans de Goede unsigned int ngpios; /* how many GPIOs have we seen */ 108a2f9fbc2SHans de Goede unsigned int n_sensor_gpios; /* how many have we mapped to sensor */ 109a2f9fbc2SHans de Goede struct gpiod_lookup_table gpios; 110a2f9fbc2SHans de Goede }; 111a2f9fbc2SHans de Goede 112a2f9fbc2SHans de Goede union acpi_object *skl_int3472_get_acpi_buffer(struct acpi_device *adev, 113a2f9fbc2SHans de Goede char *id); 114a2f9fbc2SHans de Goede int skl_int3472_fill_cldb(struct acpi_device *adev, struct int3472_cldb *cldb); 11571102bc7SHans de Goede int skl_int3472_get_sensor_adev_and_name(struct device *dev, 11671102bc7SHans de Goede struct acpi_device **sensor_adev_ret, 11771102bc7SHans de Goede const char **name_ret); 118a2f9fbc2SHans de Goede 119e4543de8SBingbu Cao int skl_int3472_register_gpio_clock(struct int3472_discrete_device *int3472, 1207a88de31SHans de Goede struct acpi_resource_gpio *agpio, u32 polarity); 121e4543de8SBingbu Cao int skl_int3472_register_dsm_clock(struct int3472_discrete_device *int3472); 122a2f9fbc2SHans de Goede void skl_int3472_unregister_clock(struct int3472_discrete_device *int3472); 123a2f9fbc2SHans de Goede 124a2f9fbc2SHans de Goede int skl_int3472_register_regulator(struct int3472_discrete_device *int3472, 125a2f9fbc2SHans de Goede struct acpi_resource_gpio *agpio); 126a2f9fbc2SHans de Goede void skl_int3472_unregister_regulator(struct int3472_discrete_device *int3472); 127a2f9fbc2SHans de Goede 1285ae20a80SHans de Goede int skl_int3472_register_pled(struct int3472_discrete_device *int3472, 1295ae20a80SHans de Goede struct acpi_resource_gpio *agpio, u32 polarity); 1305ae20a80SHans de Goede void skl_int3472_unregister_pled(struct int3472_discrete_device *int3472); 1315ae20a80SHans de Goede 132a2f9fbc2SHans de Goede #endif 133