1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2012 Intel, Inc. 4 * Copyright (C) 2013 Intel, Inc. 5 * Copyright (C) 2014 Linaro Limited 6 * Copyright (C) 2011-2016 Google, Inc. 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 /* This source file contains the implementation of a special device driver 20 * that intends to provide a *very* fast communication channel between the 21 * guest system and the QEMU emulator. 22 * 23 * Usage from the guest is simply the following (error handling simplified): 24 * 25 * int fd = open("/dev/qemu_pipe",O_RDWR); 26 * .... write() or read() through the pipe. 27 * 28 * This driver doesn't deal with the exact protocol used during the session. 29 * It is intended to be as simple as something like: 30 * 31 * // do this _just_ after opening the fd to connect to a specific 32 * // emulator service. 33 * const char* msg = "<pipename>"; 34 * if (write(fd, msg, strlen(msg)+1) < 0) { 35 * ... could not connect to <pipename> service 36 * close(fd); 37 * } 38 * 39 * // after this, simply read() and write() to communicate with the 40 * // service. Exact protocol details left as an exercise to the reader. 41 * 42 * This driver is very fast because it doesn't copy any data through 43 * intermediate buffers, since the emulator is capable of translating 44 * guest user addresses into host ones. 45 * 46 * Note that we must however ensure that each user page involved in the 47 * exchange is properly mapped during a transfer. 48 */ 49 50 51 #include <linux/module.h> 52 #include <linux/mod_devicetable.h> 53 #include <linux/interrupt.h> 54 #include <linux/kernel.h> 55 #include <linux/spinlock.h> 56 #include <linux/miscdevice.h> 57 #include <linux/platform_device.h> 58 #include <linux/poll.h> 59 #include <linux/sched.h> 60 #include <linux/bitops.h> 61 #include <linux/slab.h> 62 #include <linux/io.h> 63 #include <linux/goldfish.h> 64 #include <linux/dma-mapping.h> 65 #include <linux/mm.h> 66 #include <linux/acpi.h> 67 #include <linux/bug.h> 68 #include "goldfish_pipe_qemu.h" 69 70 /* 71 * Update this when something changes in the driver's behavior so the host 72 * can benefit from knowing it 73 */ 74 enum { 75 PIPE_DRIVER_VERSION = 2, 76 PIPE_CURRENT_DEVICE_VERSION = 2 77 }; 78 79 enum { 80 MAX_BUFFERS_PER_COMMAND = 336, 81 MAX_SIGNALLED_PIPES = 64, 82 INITIAL_PIPES_CAPACITY = 64 83 }; 84 85 struct goldfish_pipe_dev; 86 struct goldfish_pipe; 87 struct goldfish_pipe_command; 88 89 /* A per-pipe command structure, shared with the host */ 90 struct goldfish_pipe_command { 91 s32 cmd; /* PipeCmdCode, guest -> host */ 92 s32 id; /* pipe id, guest -> host */ 93 s32 status; /* command execution status, host -> guest */ 94 s32 reserved; /* to pad to 64-bit boundary */ 95 union { 96 /* Parameters for PIPE_CMD_{READ,WRITE} */ 97 struct { 98 /* number of buffers, guest -> host */ 99 u32 buffers_count; 100 /* number of consumed bytes, host -> guest */ 101 s32 consumed_size; 102 /* buffer pointers, guest -> host */ 103 u64 ptrs[MAX_BUFFERS_PER_COMMAND]; 104 /* buffer sizes, guest -> host */ 105 u32 sizes[MAX_BUFFERS_PER_COMMAND]; 106 } rw_params; 107 }; 108 }; 109 110 /* A single signalled pipe information */ 111 struct signalled_pipe_buffer { 112 u32 id; 113 u32 flags; 114 }; 115 116 /* Parameters for the PIPE_CMD_OPEN command */ 117 struct open_command_param { 118 u64 command_buffer_ptr; 119 u32 rw_params_max_count; 120 }; 121 122 /* Device-level set of buffers shared with the host */ 123 struct goldfish_pipe_dev_buffers { 124 struct open_command_param open_command_params; 125 struct signalled_pipe_buffer 126 signalled_pipe_buffers[MAX_SIGNALLED_PIPES]; 127 }; 128 129 /* This data type models a given pipe instance */ 130 struct goldfish_pipe { 131 /* pipe ID - index into goldfish_pipe_dev::pipes array */ 132 u32 id; 133 134 /* The wake flags pipe is waiting for 135 * Note: not protected with any lock, uses atomic operations 136 * and barriers to make it thread-safe. 137 */ 138 unsigned long flags; 139 140 /* wake flags host have signalled, 141 * - protected by goldfish_pipe_dev::lock 142 */ 143 unsigned long signalled_flags; 144 145 /* A pointer to command buffer */ 146 struct goldfish_pipe_command *command_buffer; 147 148 /* doubly linked list of signalled pipes, protected by 149 * goldfish_pipe_dev::lock 150 */ 151 struct goldfish_pipe *prev_signalled; 152 struct goldfish_pipe *next_signalled; 153 154 /* 155 * A pipe's own lock. Protects the following: 156 * - *command_buffer - makes sure a command can safely write its 157 * parameters to the host and read the results back. 158 */ 159 struct mutex lock; 160 161 /* A wake queue for sleeping until host signals an event */ 162 wait_queue_head_t wake_queue; 163 164 /* Pointer to the parent goldfish_pipe_dev instance */ 165 struct goldfish_pipe_dev *dev; 166 }; 167 168 /* The global driver data. Holds a reference to the i/o page used to 169 * communicate with the emulator, and a wake queue for blocked tasks 170 * waiting to be awoken. 171 */ 172 struct goldfish_pipe_dev { 173 /* 174 * Global device spinlock. Protects the following members: 175 * - pipes, pipes_capacity 176 * - [*pipes, *pipes + pipes_capacity) - array data 177 * - first_signalled_pipe, 178 * goldfish_pipe::prev_signalled, 179 * goldfish_pipe::next_signalled, 180 * goldfish_pipe::signalled_flags - all singnalled-related fields, 181 * in all allocated pipes 182 * - open_command_params - PIPE_CMD_OPEN-related buffers 183 * 184 * It looks like a lot of different fields, but the trick is that 185 * the only operation that happens often is the signalled pipes array 186 * manipulation. That's why it's OK for now to keep the rest of the 187 * fields under the same lock. If we notice too much contention because 188 * of PIPE_CMD_OPEN, then we should add a separate lock there. 189 */ 190 spinlock_t lock; 191 192 /* 193 * Array of the pipes of |pipes_capacity| elements, 194 * indexed by goldfish_pipe::id 195 */ 196 struct goldfish_pipe **pipes; 197 u32 pipes_capacity; 198 199 /* Pointers to the buffers host uses for interaction with this driver */ 200 struct goldfish_pipe_dev_buffers *buffers; 201 202 /* Head of a doubly linked list of signalled pipes */ 203 struct goldfish_pipe *first_signalled_pipe; 204 205 /* ptr to platform device's device struct */ 206 struct device *pdev_dev; 207 208 /* Some device-specific data */ 209 int irq; 210 int version; 211 unsigned char __iomem *base; 212 }; 213 214 struct goldfish_pipe_dev goldfish_pipe_dev; 215 216 static int goldfish_pipe_cmd_locked(struct goldfish_pipe *pipe, 217 enum PipeCmdCode cmd) 218 { 219 pipe->command_buffer->cmd = cmd; 220 /* failure by default */ 221 pipe->command_buffer->status = PIPE_ERROR_INVAL; 222 writel(pipe->id, pipe->dev->base + PIPE_REG_CMD); 223 return pipe->command_buffer->status; 224 } 225 226 static int goldfish_pipe_cmd(struct goldfish_pipe *pipe, enum PipeCmdCode cmd) 227 { 228 int status; 229 230 if (mutex_lock_interruptible(&pipe->lock)) 231 return PIPE_ERROR_IO; 232 status = goldfish_pipe_cmd_locked(pipe, cmd); 233 mutex_unlock(&pipe->lock); 234 return status; 235 } 236 237 /* 238 * This function converts an error code returned by the emulator through 239 * the PIPE_REG_STATUS i/o register into a valid negative errno value. 240 */ 241 static int goldfish_pipe_error_convert(int status) 242 { 243 switch (status) { 244 case PIPE_ERROR_AGAIN: 245 return -EAGAIN; 246 case PIPE_ERROR_NOMEM: 247 return -ENOMEM; 248 case PIPE_ERROR_IO: 249 return -EIO; 250 default: 251 return -EINVAL; 252 } 253 } 254 255 static int pin_user_pages(unsigned long first_page, 256 unsigned long last_page, 257 unsigned int last_page_size, 258 int is_write, 259 struct page *pages[MAX_BUFFERS_PER_COMMAND], 260 unsigned int *iter_last_page_size) 261 { 262 int ret; 263 int requested_pages = ((last_page - first_page) >> PAGE_SHIFT) + 1; 264 265 if (requested_pages > MAX_BUFFERS_PER_COMMAND) { 266 requested_pages = MAX_BUFFERS_PER_COMMAND; 267 *iter_last_page_size = PAGE_SIZE; 268 } else { 269 *iter_last_page_size = last_page_size; 270 } 271 272 ret = get_user_pages_fast(first_page, requested_pages, !is_write, 273 pages); 274 if (ret <= 0) 275 return -EFAULT; 276 if (ret < requested_pages) 277 *iter_last_page_size = PAGE_SIZE; 278 279 return ret; 280 } 281 282 static void release_user_pages(struct page **pages, int pages_count, 283 int is_write, s32 consumed_size) 284 { 285 int i; 286 287 for (i = 0; i < pages_count; i++) { 288 if (!is_write && consumed_size > 0) 289 set_page_dirty(pages[i]); 290 put_page(pages[i]); 291 } 292 } 293 294 /* Populate the call parameters, merging adjacent pages together */ 295 static void populate_rw_params(struct page **pages, 296 int pages_count, 297 unsigned long address, 298 unsigned long address_end, 299 unsigned long first_page, 300 unsigned long last_page, 301 unsigned int iter_last_page_size, 302 int is_write, 303 struct goldfish_pipe_command *command) 304 { 305 /* 306 * Process the first page separately - it's the only page that 307 * needs special handling for its start address. 308 */ 309 unsigned long xaddr = page_to_phys(pages[0]); 310 unsigned long xaddr_prev = xaddr; 311 int buffer_idx = 0; 312 int i = 1; 313 int size_on_page = first_page == last_page 314 ? (int)(address_end - address) 315 : (PAGE_SIZE - (address & ~PAGE_MASK)); 316 command->rw_params.ptrs[0] = (u64)(xaddr | (address & ~PAGE_MASK)); 317 command->rw_params.sizes[0] = size_on_page; 318 for (; i < pages_count; ++i) { 319 xaddr = page_to_phys(pages[i]); 320 size_on_page = (i == pages_count - 1) ? 321 iter_last_page_size : PAGE_SIZE; 322 if (xaddr == xaddr_prev + PAGE_SIZE) { 323 command->rw_params.sizes[buffer_idx] += size_on_page; 324 } else { 325 ++buffer_idx; 326 command->rw_params.ptrs[buffer_idx] = (u64)xaddr; 327 command->rw_params.sizes[buffer_idx] = size_on_page; 328 } 329 xaddr_prev = xaddr; 330 } 331 command->rw_params.buffers_count = buffer_idx + 1; 332 } 333 334 static int transfer_max_buffers(struct goldfish_pipe *pipe, 335 unsigned long address, 336 unsigned long address_end, 337 int is_write, 338 unsigned long last_page, 339 unsigned int last_page_size, 340 s32 *consumed_size, 341 int *status) 342 { 343 static struct page *pages[MAX_BUFFERS_PER_COMMAND]; 344 unsigned long first_page = address & PAGE_MASK; 345 unsigned int iter_last_page_size; 346 int pages_count = pin_user_pages(first_page, last_page, 347 last_page_size, is_write, 348 pages, &iter_last_page_size); 349 350 if (pages_count < 0) 351 return pages_count; 352 353 /* Serialize access to the pipe command buffers */ 354 if (mutex_lock_interruptible(&pipe->lock)) 355 return -ERESTARTSYS; 356 357 populate_rw_params(pages, pages_count, address, address_end, 358 first_page, last_page, iter_last_page_size, is_write, 359 pipe->command_buffer); 360 361 /* Transfer the data */ 362 *status = goldfish_pipe_cmd_locked(pipe, 363 is_write ? PIPE_CMD_WRITE : PIPE_CMD_READ); 364 365 *consumed_size = pipe->command_buffer->rw_params.consumed_size; 366 367 release_user_pages(pages, pages_count, is_write, *consumed_size); 368 369 mutex_unlock(&pipe->lock); 370 371 return 0; 372 } 373 374 static int wait_for_host_signal(struct goldfish_pipe *pipe, int is_write) 375 { 376 u32 wake_bit = is_write ? BIT_WAKE_ON_WRITE : BIT_WAKE_ON_READ; 377 378 set_bit(wake_bit, &pipe->flags); 379 380 /* Tell the emulator we're going to wait for a wake event */ 381 goldfish_pipe_cmd(pipe, 382 is_write ? PIPE_CMD_WAKE_ON_WRITE : PIPE_CMD_WAKE_ON_READ); 383 384 while (test_bit(wake_bit, &pipe->flags)) { 385 if (wait_event_interruptible(pipe->wake_queue, 386 !test_bit(wake_bit, &pipe->flags))) 387 return -ERESTARTSYS; 388 389 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)) 390 return -EIO; 391 } 392 393 return 0; 394 } 395 396 static ssize_t goldfish_pipe_read_write(struct file *filp, 397 char __user *buffer, 398 size_t bufflen, 399 int is_write) 400 { 401 struct goldfish_pipe *pipe = filp->private_data; 402 int count = 0, ret = -EINVAL; 403 unsigned long address, address_end, last_page; 404 unsigned int last_page_size; 405 406 /* If the emulator already closed the pipe, no need to go further */ 407 if (unlikely(test_bit(BIT_CLOSED_ON_HOST, &pipe->flags))) 408 return -EIO; 409 /* Null reads or writes succeeds */ 410 if (unlikely(bufflen == 0)) 411 return 0; 412 /* Check the buffer range for access */ 413 if (unlikely(!access_ok(is_write ? VERIFY_WRITE : VERIFY_READ, 414 buffer, bufflen))) 415 return -EFAULT; 416 417 address = (unsigned long)buffer; 418 address_end = address + bufflen; 419 last_page = (address_end - 1) & PAGE_MASK; 420 last_page_size = ((address_end - 1) & ~PAGE_MASK) + 1; 421 422 while (address < address_end) { 423 s32 consumed_size; 424 int status; 425 426 ret = transfer_max_buffers(pipe, address, address_end, is_write, 427 last_page, last_page_size, 428 &consumed_size, &status); 429 if (ret < 0) 430 break; 431 432 if (consumed_size > 0) { 433 /* No matter what's the status, we've transferred 434 * something. 435 */ 436 count += consumed_size; 437 address += consumed_size; 438 } 439 if (status > 0) 440 continue; 441 if (status == 0) { 442 /* EOF */ 443 ret = 0; 444 break; 445 } 446 if (count > 0) { 447 /* 448 * An error occurred, but we already transferred 449 * something on one of the previous iterations. 450 * Just return what we already copied and log this 451 * err. 452 */ 453 if (status != PIPE_ERROR_AGAIN) 454 dev_err_ratelimited(pipe->dev->pdev_dev, 455 "backend error %d on %s\n", 456 status, is_write ? "write" : "read"); 457 break; 458 } 459 460 /* 461 * If the error is not PIPE_ERROR_AGAIN, or if we are in 462 * non-blocking mode, just return the error code. 463 */ 464 if (status != PIPE_ERROR_AGAIN || 465 (filp->f_flags & O_NONBLOCK) != 0) { 466 ret = goldfish_pipe_error_convert(status); 467 break; 468 } 469 470 status = wait_for_host_signal(pipe, is_write); 471 if (status < 0) 472 return status; 473 } 474 475 if (count > 0) 476 return count; 477 return ret; 478 } 479 480 static ssize_t goldfish_pipe_read(struct file *filp, char __user *buffer, 481 size_t bufflen, loff_t *ppos) 482 { 483 return goldfish_pipe_read_write(filp, buffer, bufflen, 484 /* is_write */ 0); 485 } 486 487 static ssize_t goldfish_pipe_write(struct file *filp, 488 const char __user *buffer, size_t bufflen, 489 loff_t *ppos) 490 { 491 /* cast away the const */ 492 char __user *no_const_buffer = (char __user *)buffer; 493 494 return goldfish_pipe_read_write(filp, no_const_buffer, bufflen, 495 /* is_write */ 1); 496 } 497 498 static __poll_t goldfish_pipe_poll(struct file *filp, poll_table *wait) 499 { 500 struct goldfish_pipe *pipe = filp->private_data; 501 __poll_t mask = 0; 502 int status; 503 504 poll_wait(filp, &pipe->wake_queue, wait); 505 506 status = goldfish_pipe_cmd(pipe, PIPE_CMD_POLL); 507 if (status < 0) 508 return -ERESTARTSYS; 509 510 if (status & PIPE_POLL_IN) 511 mask |= EPOLLIN | EPOLLRDNORM; 512 if (status & PIPE_POLL_OUT) 513 mask |= EPOLLOUT | EPOLLWRNORM; 514 if (status & PIPE_POLL_HUP) 515 mask |= EPOLLHUP; 516 if (test_bit(BIT_CLOSED_ON_HOST, &pipe->flags)) 517 mask |= EPOLLERR; 518 519 return mask; 520 } 521 522 static void signalled_pipes_add_locked(struct goldfish_pipe_dev *dev, 523 u32 id, u32 flags) 524 { 525 struct goldfish_pipe *pipe; 526 527 if (WARN_ON(id >= dev->pipes_capacity)) 528 return; 529 530 pipe = dev->pipes[id]; 531 if (!pipe) 532 return; 533 pipe->signalled_flags |= flags; 534 535 if (pipe->prev_signalled || pipe->next_signalled || 536 dev->first_signalled_pipe == pipe) 537 return; /* already in the list */ 538 pipe->next_signalled = dev->first_signalled_pipe; 539 if (dev->first_signalled_pipe) 540 dev->first_signalled_pipe->prev_signalled = pipe; 541 dev->first_signalled_pipe = pipe; 542 } 543 544 static void signalled_pipes_remove_locked(struct goldfish_pipe_dev *dev, 545 struct goldfish_pipe *pipe) 546 { 547 if (pipe->prev_signalled) 548 pipe->prev_signalled->next_signalled = pipe->next_signalled; 549 if (pipe->next_signalled) 550 pipe->next_signalled->prev_signalled = pipe->prev_signalled; 551 if (pipe == dev->first_signalled_pipe) 552 dev->first_signalled_pipe = pipe->next_signalled; 553 pipe->prev_signalled = NULL; 554 pipe->next_signalled = NULL; 555 } 556 557 static struct goldfish_pipe *signalled_pipes_pop_front( 558 struct goldfish_pipe_dev *dev, int *wakes) 559 { 560 struct goldfish_pipe *pipe; 561 unsigned long flags; 562 563 spin_lock_irqsave(&dev->lock, flags); 564 565 pipe = dev->first_signalled_pipe; 566 if (pipe) { 567 *wakes = pipe->signalled_flags; 568 pipe->signalled_flags = 0; 569 /* 570 * This is an optimized version of 571 * signalled_pipes_remove_locked() 572 * - We want to make it as fast as possible to 573 * wake the sleeping pipe operations faster. 574 */ 575 dev->first_signalled_pipe = pipe->next_signalled; 576 if (dev->first_signalled_pipe) 577 dev->first_signalled_pipe->prev_signalled = NULL; 578 pipe->next_signalled = NULL; 579 } 580 581 spin_unlock_irqrestore(&dev->lock, flags); 582 return pipe; 583 } 584 585 static void goldfish_interrupt_task(unsigned long unused) 586 { 587 /* Iterate over the signalled pipes and wake them one by one */ 588 struct goldfish_pipe *pipe; 589 int wakes; 590 591 while ((pipe = signalled_pipes_pop_front(&goldfish_pipe_dev, &wakes)) != 592 NULL) { 593 if (wakes & PIPE_WAKE_CLOSED) { 594 pipe->flags = 1 << BIT_CLOSED_ON_HOST; 595 } else { 596 if (wakes & PIPE_WAKE_READ) 597 clear_bit(BIT_WAKE_ON_READ, &pipe->flags); 598 if (wakes & PIPE_WAKE_WRITE) 599 clear_bit(BIT_WAKE_ON_WRITE, &pipe->flags); 600 } 601 /* 602 * wake_up_interruptible() implies a write barrier, so don't 603 * explicitly add another one here. 604 */ 605 wake_up_interruptible(&pipe->wake_queue); 606 } 607 } 608 static DECLARE_TASKLET(goldfish_interrupt_tasklet, goldfish_interrupt_task, 0); 609 610 /* 611 * The general idea of the interrupt handling: 612 * 613 * 1. device raises an interrupt if there's at least one signalled pipe 614 * 2. IRQ handler reads the signalled pipes and their count from the device 615 * 3. device writes them into a shared buffer and returns the count 616 * it only resets the IRQ if it has returned all signalled pipes, 617 * otherwise it leaves it raised, so IRQ handler will be called 618 * again for the next chunk 619 * 4. IRQ handler adds all returned pipes to the device's signalled pipes list 620 * 5. IRQ handler launches a tasklet to process the signalled pipes from the 621 * list in a separate context 622 */ 623 static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id) 624 { 625 u32 count; 626 u32 i; 627 unsigned long flags; 628 struct goldfish_pipe_dev *dev = dev_id; 629 630 if (dev != &goldfish_pipe_dev) 631 return IRQ_NONE; 632 633 /* Request the signalled pipes from the device */ 634 spin_lock_irqsave(&dev->lock, flags); 635 636 count = readl(dev->base + PIPE_REG_GET_SIGNALLED); 637 if (count == 0) { 638 spin_unlock_irqrestore(&dev->lock, flags); 639 return IRQ_NONE; 640 } 641 if (count > MAX_SIGNALLED_PIPES) 642 count = MAX_SIGNALLED_PIPES; 643 644 for (i = 0; i < count; ++i) 645 signalled_pipes_add_locked(dev, 646 dev->buffers->signalled_pipe_buffers[i].id, 647 dev->buffers->signalled_pipe_buffers[i].flags); 648 649 spin_unlock_irqrestore(&dev->lock, flags); 650 651 tasklet_schedule(&goldfish_interrupt_tasklet); 652 return IRQ_HANDLED; 653 } 654 655 static int get_free_pipe_id_locked(struct goldfish_pipe_dev *dev) 656 { 657 int id; 658 659 for (id = 0; id < dev->pipes_capacity; ++id) 660 if (!dev->pipes[id]) 661 return id; 662 663 { 664 /* Reallocate the array. 665 * Since get_free_pipe_id_locked runs with interrupts disabled, 666 * we don't want to make calls that could lead to sleep. 667 */ 668 u32 new_capacity = 2 * dev->pipes_capacity; 669 struct goldfish_pipe **pipes = 670 kcalloc(new_capacity, sizeof(*pipes), GFP_ATOMIC); 671 if (!pipes) 672 return -ENOMEM; 673 memcpy(pipes, dev->pipes, sizeof(*pipes) * dev->pipes_capacity); 674 kfree(dev->pipes); 675 dev->pipes = pipes; 676 id = dev->pipes_capacity; 677 dev->pipes_capacity = new_capacity; 678 } 679 return id; 680 } 681 682 /** 683 * goldfish_pipe_open - open a channel to the AVD 684 * @inode: inode of device 685 * @file: file struct of opener 686 * 687 * Create a new pipe link between the emulator and the use application. 688 * Each new request produces a new pipe. 689 * 690 * Note: we use the pipe ID as a mux. All goldfish emulations are 32bit 691 * right now so this is fine. A move to 64bit will need this addressing 692 */ 693 static int goldfish_pipe_open(struct inode *inode, struct file *file) 694 { 695 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 696 unsigned long flags; 697 int id; 698 int status; 699 700 /* Allocate new pipe kernel object */ 701 struct goldfish_pipe *pipe = kzalloc(sizeof(*pipe), GFP_KERNEL); 702 if (!pipe) 703 return -ENOMEM; 704 705 pipe->dev = dev; 706 mutex_init(&pipe->lock); 707 init_waitqueue_head(&pipe->wake_queue); 708 709 /* 710 * Command buffer needs to be allocated on its own page to make sure 711 * it is physically contiguous in host's address space. 712 */ 713 BUILD_BUG_ON(sizeof(struct goldfish_pipe_command) > PAGE_SIZE); 714 pipe->command_buffer = 715 (struct goldfish_pipe_command *)__get_free_page(GFP_KERNEL); 716 if (!pipe->command_buffer) { 717 status = -ENOMEM; 718 goto err_pipe; 719 } 720 721 spin_lock_irqsave(&dev->lock, flags); 722 723 id = get_free_pipe_id_locked(dev); 724 if (id < 0) { 725 status = id; 726 goto err_id_locked; 727 } 728 729 dev->pipes[id] = pipe; 730 pipe->id = id; 731 pipe->command_buffer->id = id; 732 733 /* Now tell the emulator we're opening a new pipe. */ 734 dev->buffers->open_command_params.rw_params_max_count = 735 MAX_BUFFERS_PER_COMMAND; 736 dev->buffers->open_command_params.command_buffer_ptr = 737 (u64)(unsigned long)__pa(pipe->command_buffer); 738 status = goldfish_pipe_cmd_locked(pipe, PIPE_CMD_OPEN); 739 spin_unlock_irqrestore(&dev->lock, flags); 740 if (status < 0) 741 goto err_cmd; 742 /* All is done, save the pipe into the file's private data field */ 743 file->private_data = pipe; 744 return 0; 745 746 err_cmd: 747 spin_lock_irqsave(&dev->lock, flags); 748 dev->pipes[id] = NULL; 749 err_id_locked: 750 spin_unlock_irqrestore(&dev->lock, flags); 751 free_page((unsigned long)pipe->command_buffer); 752 err_pipe: 753 kfree(pipe); 754 return status; 755 } 756 757 static int goldfish_pipe_release(struct inode *inode, struct file *filp) 758 { 759 unsigned long flags; 760 struct goldfish_pipe *pipe = filp->private_data; 761 struct goldfish_pipe_dev *dev = pipe->dev; 762 763 /* The guest is closing the channel, so tell the emulator right now */ 764 goldfish_pipe_cmd(pipe, PIPE_CMD_CLOSE); 765 766 spin_lock_irqsave(&dev->lock, flags); 767 dev->pipes[pipe->id] = NULL; 768 signalled_pipes_remove_locked(dev, pipe); 769 spin_unlock_irqrestore(&dev->lock, flags); 770 771 filp->private_data = NULL; 772 free_page((unsigned long)pipe->command_buffer); 773 kfree(pipe); 774 return 0; 775 } 776 777 static const struct file_operations goldfish_pipe_fops = { 778 .owner = THIS_MODULE, 779 .read = goldfish_pipe_read, 780 .write = goldfish_pipe_write, 781 .poll = goldfish_pipe_poll, 782 .open = goldfish_pipe_open, 783 .release = goldfish_pipe_release, 784 }; 785 786 static struct miscdevice goldfish_pipe_miscdev = { 787 .minor = MISC_DYNAMIC_MINOR, 788 .name = "goldfish_pipe", 789 .fops = &goldfish_pipe_fops, 790 }; 791 792 static void write_pa_addr(void *addr, void __iomem *portl, void __iomem *porth) 793 { 794 const unsigned long paddr = __pa(addr); 795 796 writel(upper_32_bits(paddr), porth); 797 writel(lower_32_bits(paddr), portl); 798 } 799 800 static int goldfish_pipe_device_init(struct platform_device *pdev) 801 { 802 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 803 int err = devm_request_irq(&pdev->dev, dev->irq, 804 goldfish_pipe_interrupt, 805 IRQF_SHARED, "goldfish_pipe", dev); 806 if (err) { 807 dev_err(&pdev->dev, "unable to allocate IRQ for v2\n"); 808 return err; 809 } 810 811 err = misc_register(&goldfish_pipe_miscdev); 812 if (err) { 813 dev_err(&pdev->dev, "unable to register v2 device\n"); 814 return err; 815 } 816 817 dev->pdev_dev = &pdev->dev; 818 dev->first_signalled_pipe = NULL; 819 dev->pipes_capacity = INITIAL_PIPES_CAPACITY; 820 dev->pipes = kcalloc(dev->pipes_capacity, sizeof(*dev->pipes), 821 GFP_KERNEL); 822 if (!dev->pipes) 823 return -ENOMEM; 824 825 /* 826 * We're going to pass two buffers, open_command_params and 827 * signalled_pipe_buffers, to the host. This means each of those buffers 828 * needs to be contained in a single physical page. The easiest choice 829 * is to just allocate a page and place the buffers in it. 830 */ 831 BUILD_BUG_ON(sizeof(struct goldfish_pipe_dev_buffers) > PAGE_SIZE); 832 dev->buffers = (struct goldfish_pipe_dev_buffers *) 833 __get_free_page(GFP_KERNEL); 834 if (!dev->buffers) { 835 kfree(dev->pipes); 836 return -ENOMEM; 837 } 838 839 /* Send the buffer addresses to the host */ 840 write_pa_addr(&dev->buffers->signalled_pipe_buffers, 841 dev->base + PIPE_REG_SIGNAL_BUFFER, 842 dev->base + PIPE_REG_SIGNAL_BUFFER_HIGH); 843 844 writel(MAX_SIGNALLED_PIPES, 845 dev->base + PIPE_REG_SIGNAL_BUFFER_COUNT); 846 847 write_pa_addr(&dev->buffers->open_command_params, 848 dev->base + PIPE_REG_OPEN_BUFFER, 849 dev->base + PIPE_REG_OPEN_BUFFER_HIGH); 850 851 return 0; 852 } 853 854 static void goldfish_pipe_device_deinit(struct platform_device *pdev) 855 { 856 misc_deregister(&goldfish_pipe_miscdev); 857 kfree(goldfish_pipe_dev.pipes); 858 free_page((unsigned long)goldfish_pipe_dev.buffers); 859 } 860 861 static int goldfish_pipe_probe(struct platform_device *pdev) 862 { 863 int err; 864 struct resource *r; 865 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 866 867 /* not thread safe, but this should not happen */ 868 WARN_ON(dev->base); 869 870 spin_lock_init(&dev->lock); 871 872 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 873 if (!r || resource_size(r) < PAGE_SIZE) { 874 dev_err(&pdev->dev, "can't allocate i/o page\n"); 875 return -EINVAL; 876 } 877 dev->base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); 878 if (!dev->base) { 879 dev_err(&pdev->dev, "ioremap failed\n"); 880 return -EINVAL; 881 } 882 883 r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 884 if (!r) { 885 err = -EINVAL; 886 goto error; 887 } 888 dev->irq = r->start; 889 890 /* 891 * Exchange the versions with the host device 892 * 893 * Note: v1 driver used to not report its version, so we write it before 894 * reading device version back: this allows the host implementation to 895 * detect the old driver (if there was no version write before read). 896 */ 897 writel((u32)PIPE_DRIVER_VERSION, dev->base + PIPE_REG_VERSION); 898 dev->version = readl(dev->base + PIPE_REG_VERSION); 899 if (WARN_ON(dev->version < PIPE_CURRENT_DEVICE_VERSION)) 900 return -EINVAL; 901 902 err = goldfish_pipe_device_init(pdev); 903 if (!err) 904 return 0; 905 906 error: 907 dev->base = NULL; 908 return err; 909 } 910 911 static int goldfish_pipe_remove(struct platform_device *pdev) 912 { 913 struct goldfish_pipe_dev *dev = &goldfish_pipe_dev; 914 goldfish_pipe_device_deinit(pdev); 915 dev->base = NULL; 916 return 0; 917 } 918 919 static const struct acpi_device_id goldfish_pipe_acpi_match[] = { 920 { "GFSH0003", 0 }, 921 { }, 922 }; 923 MODULE_DEVICE_TABLE(acpi, goldfish_pipe_acpi_match); 924 925 static const struct of_device_id goldfish_pipe_of_match[] = { 926 { .compatible = "google,android-pipe", }, 927 {}, 928 }; 929 MODULE_DEVICE_TABLE(of, goldfish_pipe_of_match); 930 931 static struct platform_driver goldfish_pipe_driver = { 932 .probe = goldfish_pipe_probe, 933 .remove = goldfish_pipe_remove, 934 .driver = { 935 .name = "goldfish_pipe", 936 .of_match_table = goldfish_pipe_of_match, 937 .acpi_match_table = ACPI_PTR(goldfish_pipe_acpi_match), 938 } 939 }; 940 941 module_platform_driver(goldfish_pipe_driver); 942 MODULE_AUTHOR("David Turner <digit@google.com>"); 943 MODULE_LICENSE("GPL v2"); 944