1 // SPDX-License-Identifier: GPL-2.0 2 // SPI interface for ChromeOS Embedded Controller 3 // 4 // Copyright (C) 2012 Google, Inc 5 6 #include <linux/delay.h> 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/mfd/cros_ec.h> 10 #include <linux/mfd/cros_ec_commands.h> 11 #include <linux/of.h> 12 #include <linux/platform_device.h> 13 #include <linux/slab.h> 14 #include <linux/spi/spi.h> 15 16 17 /* The header byte, which follows the preamble */ 18 #define EC_MSG_HEADER 0xec 19 20 /* 21 * Number of EC preamble bytes we read at a time. Since it takes 22 * about 400-500us for the EC to respond there is not a lot of 23 * point in tuning this. If the EC could respond faster then 24 * we could increase this so that might expect the preamble and 25 * message to occur in a single transaction. However, the maximum 26 * SPI transfer size is 256 bytes, so at 5MHz we need a response 27 * time of perhaps <320us (200 bytes / 1600 bits). 28 */ 29 #define EC_MSG_PREAMBLE_COUNT 32 30 31 /* 32 * Allow for a long time for the EC to respond. We support i2c 33 * tunneling and support fairly long messages for the tunnel (249 34 * bytes long at the moment). If we're talking to a 100 kHz device 35 * on the other end and need to transfer ~256 bytes, then we need: 36 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms 37 * 38 * We'll wait 8 times that to handle clock stretching and other 39 * paranoia. Note that some battery gas gauge ICs claim to have a 40 * clock stretch of 144ms in rare situations. That's incentive for 41 * not directly passing i2c through, but it's too late for that for 42 * existing hardware. 43 * 44 * It's pretty unlikely that we'll really see a 249 byte tunnel in 45 * anything other than testing. If this was more common we might 46 * consider having slow commands like this require a GET_STATUS 47 * wait loop. The 'flash write' command would be another candidate 48 * for this, clocking in at 2-3ms. 49 */ 50 #define EC_MSG_DEADLINE_MS 200 51 52 /* 53 * Time between raising the SPI chip select (for the end of a 54 * transaction) and dropping it again (for the next transaction). 55 * If we go too fast, the EC will miss the transaction. We know that we 56 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be 57 * safe. 58 */ 59 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) 60 61 /** 62 * struct cros_ec_spi - information about a SPI-connected EC 63 * 64 * @spi: SPI device we are connected to 65 * @last_transfer_ns: time that we last finished a transfer. 66 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that 67 * is sent when we want to turn on CS at the start of a transaction. 68 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that 69 * is sent when we want to turn off CS at the end of a transaction. 70 */ 71 struct cros_ec_spi { 72 struct spi_device *spi; 73 s64 last_transfer_ns; 74 unsigned int start_of_msg_delay; 75 unsigned int end_of_msg_delay; 76 }; 77 78 static void debug_packet(struct device *dev, const char *name, u8 *ptr, 79 int len) 80 { 81 #ifdef DEBUG 82 int i; 83 84 dev_dbg(dev, "%s: ", name); 85 for (i = 0; i < len; i++) 86 pr_cont(" %02x", ptr[i]); 87 88 pr_cont("\n"); 89 #endif 90 } 91 92 static int terminate_request(struct cros_ec_device *ec_dev) 93 { 94 struct cros_ec_spi *ec_spi = ec_dev->priv; 95 struct spi_message msg; 96 struct spi_transfer trans; 97 int ret; 98 99 /* 100 * Turn off CS, possibly adding a delay to ensure the rising edge 101 * doesn't come too soon after the end of the data. 102 */ 103 spi_message_init(&msg); 104 memset(&trans, 0, sizeof(trans)); 105 trans.delay_usecs = ec_spi->end_of_msg_delay; 106 spi_message_add_tail(&trans, &msg); 107 108 ret = spi_sync_locked(ec_spi->spi, &msg); 109 110 /* Reset end-of-response timer */ 111 ec_spi->last_transfer_ns = ktime_get_ns(); 112 if (ret < 0) { 113 dev_err(ec_dev->dev, 114 "cs-deassert spi transfer failed: %d\n", 115 ret); 116 } 117 118 return ret; 119 } 120 121 /** 122 * receive_n_bytes - receive n bytes from the EC. 123 * 124 * Assumes buf is a pointer into the ec_dev->din buffer 125 */ 126 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) 127 { 128 struct cros_ec_spi *ec_spi = ec_dev->priv; 129 struct spi_transfer trans; 130 struct spi_message msg; 131 int ret; 132 133 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size); 134 135 memset(&trans, 0, sizeof(trans)); 136 trans.cs_change = 1; 137 trans.rx_buf = buf; 138 trans.len = n; 139 140 spi_message_init(&msg); 141 spi_message_add_tail(&trans, &msg); 142 ret = spi_sync_locked(ec_spi->spi, &msg); 143 if (ret < 0) 144 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 145 146 return ret; 147 } 148 149 /** 150 * cros_ec_spi_receive_packet - Receive a packet from the EC. 151 * 152 * This function has two phases: reading the preamble bytes (since if we read 153 * data from the EC before it is ready to send, we just get preamble) and 154 * reading the actual message. 155 * 156 * The received data is placed into ec_dev->din. 157 * 158 * @ec_dev: ChromeOS EC device 159 * @need_len: Number of message bytes we need to read 160 */ 161 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, 162 int need_len) 163 { 164 struct ec_host_response *response; 165 u8 *ptr, *end; 166 int ret; 167 unsigned long deadline; 168 int todo; 169 170 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); 171 172 /* Receive data until we see the header byte */ 173 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 174 while (true) { 175 unsigned long start_jiffies = jiffies; 176 177 ret = receive_n_bytes(ec_dev, 178 ec_dev->din, 179 EC_MSG_PREAMBLE_COUNT); 180 if (ret < 0) 181 return ret; 182 183 ptr = ec_dev->din; 184 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 185 if (*ptr == EC_SPI_FRAME_START) { 186 dev_dbg(ec_dev->dev, "msg found at %zd\n", 187 ptr - ec_dev->din); 188 break; 189 } 190 } 191 if (ptr != end) 192 break; 193 194 /* 195 * Use the time at the start of the loop as a timeout. This 196 * gives us one last shot at getting the transfer and is useful 197 * in case we got context switched out for a while. 198 */ 199 if (time_after(start_jiffies, deadline)) { 200 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 201 return -ETIMEDOUT; 202 } 203 } 204 205 /* 206 * ptr now points to the header byte. Copy any valid data to the 207 * start of our buffer 208 */ 209 todo = end - ++ptr; 210 BUG_ON(todo < 0 || todo > ec_dev->din_size); 211 todo = min(todo, need_len); 212 memmove(ec_dev->din, ptr, todo); 213 ptr = ec_dev->din + todo; 214 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 215 need_len, todo); 216 need_len -= todo; 217 218 /* If the entire response struct wasn't read, get the rest of it. */ 219 if (todo < sizeof(*response)) { 220 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); 221 if (ret < 0) 222 return -EBADMSG; 223 ptr += (sizeof(*response) - todo); 224 todo = sizeof(*response); 225 } 226 227 response = (struct ec_host_response *)ec_dev->din; 228 229 /* Abort if data_len is too large. */ 230 if (response->data_len > ec_dev->din_size) 231 return -EMSGSIZE; 232 233 /* Receive data until we have it all */ 234 while (need_len > 0) { 235 /* 236 * We can't support transfers larger than the SPI FIFO size 237 * unless we have DMA. We don't have DMA on the ISP SPI ports 238 * for Exynos. We need a way of asking SPI driver for 239 * maximum-supported transfer size. 240 */ 241 todo = min(need_len, 256); 242 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 243 todo, need_len, ptr - ec_dev->din); 244 245 ret = receive_n_bytes(ec_dev, ptr, todo); 246 if (ret < 0) 247 return ret; 248 249 ptr += todo; 250 need_len -= todo; 251 } 252 253 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 254 255 return 0; 256 } 257 258 /** 259 * cros_ec_spi_receive_response - Receive a response from the EC. 260 * 261 * This function has two phases: reading the preamble bytes (since if we read 262 * data from the EC before it is ready to send, we just get preamble) and 263 * reading the actual message. 264 * 265 * The received data is placed into ec_dev->din. 266 * 267 * @ec_dev: ChromeOS EC device 268 * @need_len: Number of message bytes we need to read 269 */ 270 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, 271 int need_len) 272 { 273 u8 *ptr, *end; 274 int ret; 275 unsigned long deadline; 276 int todo; 277 278 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); 279 280 /* Receive data until we see the header byte */ 281 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 282 while (true) { 283 unsigned long start_jiffies = jiffies; 284 285 ret = receive_n_bytes(ec_dev, 286 ec_dev->din, 287 EC_MSG_PREAMBLE_COUNT); 288 if (ret < 0) 289 return ret; 290 291 ptr = ec_dev->din; 292 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 293 if (*ptr == EC_SPI_FRAME_START) { 294 dev_dbg(ec_dev->dev, "msg found at %zd\n", 295 ptr - ec_dev->din); 296 break; 297 } 298 } 299 if (ptr != end) 300 break; 301 302 /* 303 * Use the time at the start of the loop as a timeout. This 304 * gives us one last shot at getting the transfer and is useful 305 * in case we got context switched out for a while. 306 */ 307 if (time_after(start_jiffies, deadline)) { 308 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 309 return -ETIMEDOUT; 310 } 311 } 312 313 /* 314 * ptr now points to the header byte. Copy any valid data to the 315 * start of our buffer 316 */ 317 todo = end - ++ptr; 318 BUG_ON(todo < 0 || todo > ec_dev->din_size); 319 todo = min(todo, need_len); 320 memmove(ec_dev->din, ptr, todo); 321 ptr = ec_dev->din + todo; 322 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 323 need_len, todo); 324 need_len -= todo; 325 326 /* Receive data until we have it all */ 327 while (need_len > 0) { 328 /* 329 * We can't support transfers larger than the SPI FIFO size 330 * unless we have DMA. We don't have DMA on the ISP SPI ports 331 * for Exynos. We need a way of asking SPI driver for 332 * maximum-supported transfer size. 333 */ 334 todo = min(need_len, 256); 335 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 336 todo, need_len, ptr - ec_dev->din); 337 338 ret = receive_n_bytes(ec_dev, ptr, todo); 339 if (ret < 0) 340 return ret; 341 342 debug_packet(ec_dev->dev, "interim", ptr, todo); 343 ptr += todo; 344 need_len -= todo; 345 } 346 347 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 348 349 return 0; 350 } 351 352 /** 353 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply 354 * 355 * @ec_dev: ChromeOS EC device 356 * @ec_msg: Message to transfer 357 */ 358 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, 359 struct cros_ec_command *ec_msg) 360 { 361 struct ec_host_response *response; 362 struct cros_ec_spi *ec_spi = ec_dev->priv; 363 struct spi_transfer trans, trans_delay; 364 struct spi_message msg; 365 int i, len; 366 u8 *ptr; 367 u8 *rx_buf; 368 u8 sum; 369 u8 rx_byte; 370 int ret = 0, final_ret; 371 unsigned long delay; 372 373 len = cros_ec_prepare_tx(ec_dev, ec_msg); 374 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 375 376 /* If it's too soon to do another transaction, wait */ 377 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 378 if (delay < EC_SPI_RECOVERY_TIME_NS) 379 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 380 381 rx_buf = kzalloc(len, GFP_KERNEL); 382 if (!rx_buf) 383 return -ENOMEM; 384 385 spi_bus_lock(ec_spi->spi->master); 386 387 /* 388 * Leave a gap between CS assertion and clocking of data to allow the 389 * EC time to wakeup. 390 */ 391 spi_message_init(&msg); 392 if (ec_spi->start_of_msg_delay) { 393 memset(&trans_delay, 0, sizeof(trans_delay)); 394 trans_delay.delay_usecs = ec_spi->start_of_msg_delay; 395 spi_message_add_tail(&trans_delay, &msg); 396 } 397 398 /* Transmit phase - send our message */ 399 memset(&trans, 0, sizeof(trans)); 400 trans.tx_buf = ec_dev->dout; 401 trans.rx_buf = rx_buf; 402 trans.len = len; 403 trans.cs_change = 1; 404 spi_message_add_tail(&trans, &msg); 405 ret = spi_sync_locked(ec_spi->spi, &msg); 406 407 /* Get the response */ 408 if (!ret) { 409 /* Verify that EC can process command */ 410 for (i = 0; i < len; i++) { 411 rx_byte = rx_buf[i]; 412 /* 413 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY 414 * markers are all signs that the EC didn't fully 415 * receive our command. e.g., if the EC is flashing 416 * itself, it can't respond to any commands and instead 417 * clocks out EC_SPI_PAST_END from its SPI hardware 418 * buffer. Similar occurrences can happen if the AP is 419 * too slow to clock out data after asserting CS -- the 420 * EC will abort and fill its buffer with 421 * EC_SPI_RX_BAD_DATA. 422 * 423 * In all cases, these errors should be safe to retry. 424 * Report -EAGAIN and let the caller decide what to do 425 * about that. 426 */ 427 if (rx_byte == EC_SPI_PAST_END || 428 rx_byte == EC_SPI_RX_BAD_DATA || 429 rx_byte == EC_SPI_NOT_READY) { 430 ret = -EAGAIN; 431 break; 432 } 433 } 434 } 435 436 if (!ret) 437 ret = cros_ec_spi_receive_packet(ec_dev, 438 ec_msg->insize + sizeof(*response)); 439 else if (ret != -EAGAIN) 440 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 441 442 final_ret = terminate_request(ec_dev); 443 444 spi_bus_unlock(ec_spi->spi->master); 445 446 if (!ret) 447 ret = final_ret; 448 if (ret < 0) 449 goto exit; 450 451 ptr = ec_dev->din; 452 453 /* check response error code */ 454 response = (struct ec_host_response *)ptr; 455 ec_msg->result = response->result; 456 457 ret = cros_ec_check_result(ec_dev, ec_msg); 458 if (ret) 459 goto exit; 460 461 len = response->data_len; 462 sum = 0; 463 if (len > ec_msg->insize) { 464 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 465 len, ec_msg->insize); 466 ret = -EMSGSIZE; 467 goto exit; 468 } 469 470 for (i = 0; i < sizeof(*response); i++) 471 sum += ptr[i]; 472 473 /* copy response packet payload and compute checksum */ 474 memcpy(ec_msg->data, ptr + sizeof(*response), len); 475 for (i = 0; i < len; i++) 476 sum += ec_msg->data[i]; 477 478 if (sum) { 479 dev_err(ec_dev->dev, 480 "bad packet checksum, calculated %x\n", 481 sum); 482 ret = -EBADMSG; 483 goto exit; 484 } 485 486 ret = len; 487 exit: 488 kfree(rx_buf); 489 if (ec_msg->command == EC_CMD_REBOOT_EC) 490 msleep(EC_REBOOT_DELAY_MS); 491 492 return ret; 493 } 494 495 /** 496 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply 497 * 498 * @ec_dev: ChromeOS EC device 499 * @ec_msg: Message to transfer 500 */ 501 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, 502 struct cros_ec_command *ec_msg) 503 { 504 struct cros_ec_spi *ec_spi = ec_dev->priv; 505 struct spi_transfer trans; 506 struct spi_message msg; 507 int i, len; 508 u8 *ptr; 509 u8 *rx_buf; 510 u8 rx_byte; 511 int sum; 512 int ret = 0, final_ret; 513 unsigned long delay; 514 515 len = cros_ec_prepare_tx(ec_dev, ec_msg); 516 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 517 518 /* If it's too soon to do another transaction, wait */ 519 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 520 if (delay < EC_SPI_RECOVERY_TIME_NS) 521 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 522 523 rx_buf = kzalloc(len, GFP_KERNEL); 524 if (!rx_buf) 525 return -ENOMEM; 526 527 spi_bus_lock(ec_spi->spi->master); 528 529 /* Transmit phase - send our message */ 530 debug_packet(ec_dev->dev, "out", ec_dev->dout, len); 531 memset(&trans, 0, sizeof(trans)); 532 trans.tx_buf = ec_dev->dout; 533 trans.rx_buf = rx_buf; 534 trans.len = len; 535 trans.cs_change = 1; 536 spi_message_init(&msg); 537 spi_message_add_tail(&trans, &msg); 538 ret = spi_sync_locked(ec_spi->spi, &msg); 539 540 /* Get the response */ 541 if (!ret) { 542 /* Verify that EC can process command */ 543 for (i = 0; i < len; i++) { 544 rx_byte = rx_buf[i]; 545 /* See comments in cros_ec_pkt_xfer_spi() */ 546 if (rx_byte == EC_SPI_PAST_END || 547 rx_byte == EC_SPI_RX_BAD_DATA || 548 rx_byte == EC_SPI_NOT_READY) { 549 ret = -EAGAIN; 550 break; 551 } 552 } 553 } 554 555 if (!ret) 556 ret = cros_ec_spi_receive_response(ec_dev, 557 ec_msg->insize + EC_MSG_TX_PROTO_BYTES); 558 else if (ret != -EAGAIN) 559 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 560 561 final_ret = terminate_request(ec_dev); 562 563 spi_bus_unlock(ec_spi->spi->master); 564 565 if (!ret) 566 ret = final_ret; 567 if (ret < 0) 568 goto exit; 569 570 ptr = ec_dev->din; 571 572 /* check response error code */ 573 ec_msg->result = ptr[0]; 574 ret = cros_ec_check_result(ec_dev, ec_msg); 575 if (ret) 576 goto exit; 577 578 len = ptr[1]; 579 sum = ptr[0] + ptr[1]; 580 if (len > ec_msg->insize) { 581 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 582 len, ec_msg->insize); 583 ret = -ENOSPC; 584 goto exit; 585 } 586 587 /* copy response packet payload and compute checksum */ 588 for (i = 0; i < len; i++) { 589 sum += ptr[i + 2]; 590 if (ec_msg->insize) 591 ec_msg->data[i] = ptr[i + 2]; 592 } 593 sum &= 0xff; 594 595 debug_packet(ec_dev->dev, "in", ptr, len + 3); 596 597 if (sum != ptr[len + 2]) { 598 dev_err(ec_dev->dev, 599 "bad packet checksum, expected %02x, got %02x\n", 600 sum, ptr[len + 2]); 601 ret = -EBADMSG; 602 goto exit; 603 } 604 605 ret = len; 606 exit: 607 kfree(rx_buf); 608 if (ec_msg->command == EC_CMD_REBOOT_EC) 609 msleep(EC_REBOOT_DELAY_MS); 610 611 return ret; 612 } 613 614 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) 615 { 616 struct device_node *np = dev->of_node; 617 u32 val; 618 int ret; 619 620 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); 621 if (!ret) 622 ec_spi->start_of_msg_delay = val; 623 624 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); 625 if (!ret) 626 ec_spi->end_of_msg_delay = val; 627 } 628 629 static int cros_ec_spi_probe(struct spi_device *spi) 630 { 631 struct device *dev = &spi->dev; 632 struct cros_ec_device *ec_dev; 633 struct cros_ec_spi *ec_spi; 634 int err; 635 636 spi->bits_per_word = 8; 637 spi->mode = SPI_MODE_0; 638 err = spi_setup(spi); 639 if (err < 0) 640 return err; 641 642 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); 643 if (ec_spi == NULL) 644 return -ENOMEM; 645 ec_spi->spi = spi; 646 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); 647 if (!ec_dev) 648 return -ENOMEM; 649 650 /* Check for any DT properties */ 651 cros_ec_spi_dt_probe(ec_spi, dev); 652 653 spi_set_drvdata(spi, ec_dev); 654 ec_dev->dev = dev; 655 ec_dev->priv = ec_spi; 656 ec_dev->irq = spi->irq; 657 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; 658 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; 659 ec_dev->phys_name = dev_name(&ec_spi->spi->dev); 660 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + 661 sizeof(struct ec_host_response) + 662 sizeof(struct ec_response_get_protocol_info); 663 ec_dev->dout_size = sizeof(struct ec_host_request); 664 665 ec_spi->last_transfer_ns = ktime_get_ns(); 666 667 err = cros_ec_register(ec_dev); 668 if (err) { 669 dev_err(dev, "cannot register EC\n"); 670 return err; 671 } 672 673 device_init_wakeup(&spi->dev, true); 674 675 return 0; 676 } 677 678 #ifdef CONFIG_PM_SLEEP 679 static int cros_ec_spi_suspend(struct device *dev) 680 { 681 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 682 683 return cros_ec_suspend(ec_dev); 684 } 685 686 static int cros_ec_spi_resume(struct device *dev) 687 { 688 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 689 690 return cros_ec_resume(ec_dev); 691 } 692 #endif 693 694 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, 695 cros_ec_spi_resume); 696 697 static const struct of_device_id cros_ec_spi_of_match[] = { 698 { .compatible = "google,cros-ec-spi", }, 699 { /* sentinel */ }, 700 }; 701 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); 702 703 static const struct spi_device_id cros_ec_spi_id[] = { 704 { "cros-ec-spi", 0 }, 705 { } 706 }; 707 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); 708 709 static struct spi_driver cros_ec_driver_spi = { 710 .driver = { 711 .name = "cros-ec-spi", 712 .of_match_table = of_match_ptr(cros_ec_spi_of_match), 713 .pm = &cros_ec_spi_pm_ops, 714 }, 715 .probe = cros_ec_spi_probe, 716 .id_table = cros_ec_spi_id, 717 }; 718 719 module_spi_driver(cros_ec_driver_spi); 720 721 MODULE_LICENSE("GPL v2"); 722 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller"); 723