1 // SPDX-License-Identifier: GPL-2.0 2 // SPI interface for ChromeOS Embedded Controller 3 // 4 // Copyright (C) 2012 Google, Inc 5 6 #include <linux/delay.h> 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/of.h> 10 #include <linux/platform_data/cros_ec_commands.h> 11 #include <linux/platform_data/cros_ec_proto.h> 12 #include <linux/platform_device.h> 13 #include <linux/slab.h> 14 #include <linux/spi/spi.h> 15 #include <uapi/linux/sched/types.h> 16 17 #include "cros_ec.h" 18 19 /* The header byte, which follows the preamble */ 20 #define EC_MSG_HEADER 0xec 21 22 /* 23 * Number of EC preamble bytes we read at a time. Since it takes 24 * about 400-500us for the EC to respond there is not a lot of 25 * point in tuning this. If the EC could respond faster then 26 * we could increase this so that might expect the preamble and 27 * message to occur in a single transaction. However, the maximum 28 * SPI transfer size is 256 bytes, so at 5MHz we need a response 29 * time of perhaps <320us (200 bytes / 1600 bits). 30 */ 31 #define EC_MSG_PREAMBLE_COUNT 32 32 33 /* 34 * Allow for a long time for the EC to respond. We support i2c 35 * tunneling and support fairly long messages for the tunnel (249 36 * bytes long at the moment). If we're talking to a 100 kHz device 37 * on the other end and need to transfer ~256 bytes, then we need: 38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms 39 * 40 * We'll wait 8 times that to handle clock stretching and other 41 * paranoia. Note that some battery gas gauge ICs claim to have a 42 * clock stretch of 144ms in rare situations. That's incentive for 43 * not directly passing i2c through, but it's too late for that for 44 * existing hardware. 45 * 46 * It's pretty unlikely that we'll really see a 249 byte tunnel in 47 * anything other than testing. If this was more common we might 48 * consider having slow commands like this require a GET_STATUS 49 * wait loop. The 'flash write' command would be another candidate 50 * for this, clocking in at 2-3ms. 51 */ 52 #define EC_MSG_DEADLINE_MS 200 53 54 /* 55 * Time between raising the SPI chip select (for the end of a 56 * transaction) and dropping it again (for the next transaction). 57 * If we go too fast, the EC will miss the transaction. We know that we 58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be 59 * safe. 60 */ 61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000) 62 63 /** 64 * struct cros_ec_spi - information about a SPI-connected EC 65 * 66 * @spi: SPI device we are connected to 67 * @last_transfer_ns: time that we last finished a transfer. 68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that 69 * is sent when we want to turn on CS at the start of a transaction. 70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that 71 * is sent when we want to turn off CS at the end of a transaction. 72 * @high_pri_worker: Used to schedule high priority work. 73 */ 74 struct cros_ec_spi { 75 struct spi_device *spi; 76 s64 last_transfer_ns; 77 unsigned int start_of_msg_delay; 78 unsigned int end_of_msg_delay; 79 struct kthread_worker *high_pri_worker; 80 }; 81 82 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev, 83 struct cros_ec_command *ec_msg); 84 85 /** 86 * struct cros_ec_xfer_work_params - params for our high priority workers 87 * 88 * @work: The work_struct needed to queue work 89 * @fn: The function to use to transfer 90 * @ec_dev: ChromeOS EC device 91 * @ec_msg: Message to transfer 92 * @ret: The return value of the function 93 */ 94 95 struct cros_ec_xfer_work_params { 96 struct kthread_work work; 97 cros_ec_xfer_fn_t fn; 98 struct cros_ec_device *ec_dev; 99 struct cros_ec_command *ec_msg; 100 int ret; 101 }; 102 103 static void debug_packet(struct device *dev, const char *name, u8 *ptr, 104 int len) 105 { 106 #ifdef DEBUG 107 int i; 108 109 dev_dbg(dev, "%s: ", name); 110 for (i = 0; i < len; i++) 111 pr_cont(" %02x", ptr[i]); 112 113 pr_cont("\n"); 114 #endif 115 } 116 117 static int terminate_request(struct cros_ec_device *ec_dev) 118 { 119 struct cros_ec_spi *ec_spi = ec_dev->priv; 120 struct spi_message msg; 121 struct spi_transfer trans; 122 int ret; 123 124 /* 125 * Turn off CS, possibly adding a delay to ensure the rising edge 126 * doesn't come too soon after the end of the data. 127 */ 128 spi_message_init(&msg); 129 memset(&trans, 0, sizeof(trans)); 130 trans.delay.value = ec_spi->end_of_msg_delay; 131 trans.delay.unit = SPI_DELAY_UNIT_USECS; 132 spi_message_add_tail(&trans, &msg); 133 134 ret = spi_sync_locked(ec_spi->spi, &msg); 135 136 /* Reset end-of-response timer */ 137 ec_spi->last_transfer_ns = ktime_get_ns(); 138 if (ret < 0) { 139 dev_err(ec_dev->dev, 140 "cs-deassert spi transfer failed: %d\n", 141 ret); 142 } 143 144 return ret; 145 } 146 147 /** 148 * receive_n_bytes - receive n bytes from the EC. 149 * 150 * Assumes buf is a pointer into the ec_dev->din buffer 151 */ 152 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) 153 { 154 struct cros_ec_spi *ec_spi = ec_dev->priv; 155 struct spi_transfer trans; 156 struct spi_message msg; 157 int ret; 158 159 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size); 160 161 memset(&trans, 0, sizeof(trans)); 162 trans.cs_change = 1; 163 trans.rx_buf = buf; 164 trans.len = n; 165 166 spi_message_init(&msg); 167 spi_message_add_tail(&trans, &msg); 168 ret = spi_sync_locked(ec_spi->spi, &msg); 169 if (ret < 0) 170 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 171 172 return ret; 173 } 174 175 /** 176 * cros_ec_spi_receive_packet - Receive a packet from the EC. 177 * 178 * This function has two phases: reading the preamble bytes (since if we read 179 * data from the EC before it is ready to send, we just get preamble) and 180 * reading the actual message. 181 * 182 * The received data is placed into ec_dev->din. 183 * 184 * @ec_dev: ChromeOS EC device 185 * @need_len: Number of message bytes we need to read 186 */ 187 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, 188 int need_len) 189 { 190 struct ec_host_response *response; 191 u8 *ptr, *end; 192 int ret; 193 unsigned long deadline; 194 int todo; 195 196 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); 197 198 /* Receive data until we see the header byte */ 199 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 200 while (true) { 201 unsigned long start_jiffies = jiffies; 202 203 ret = receive_n_bytes(ec_dev, 204 ec_dev->din, 205 EC_MSG_PREAMBLE_COUNT); 206 if (ret < 0) 207 return ret; 208 209 ptr = ec_dev->din; 210 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 211 if (*ptr == EC_SPI_FRAME_START) { 212 dev_dbg(ec_dev->dev, "msg found at %zd\n", 213 ptr - ec_dev->din); 214 break; 215 } 216 } 217 if (ptr != end) 218 break; 219 220 /* 221 * Use the time at the start of the loop as a timeout. This 222 * gives us one last shot at getting the transfer and is useful 223 * in case we got context switched out for a while. 224 */ 225 if (time_after(start_jiffies, deadline)) { 226 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 227 return -ETIMEDOUT; 228 } 229 } 230 231 /* 232 * ptr now points to the header byte. Copy any valid data to the 233 * start of our buffer 234 */ 235 todo = end - ++ptr; 236 BUG_ON(todo < 0 || todo > ec_dev->din_size); 237 todo = min(todo, need_len); 238 memmove(ec_dev->din, ptr, todo); 239 ptr = ec_dev->din + todo; 240 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 241 need_len, todo); 242 need_len -= todo; 243 244 /* If the entire response struct wasn't read, get the rest of it. */ 245 if (todo < sizeof(*response)) { 246 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); 247 if (ret < 0) 248 return -EBADMSG; 249 ptr += (sizeof(*response) - todo); 250 todo = sizeof(*response); 251 } 252 253 response = (struct ec_host_response *)ec_dev->din; 254 255 /* Abort if data_len is too large. */ 256 if (response->data_len > ec_dev->din_size) 257 return -EMSGSIZE; 258 259 /* Receive data until we have it all */ 260 while (need_len > 0) { 261 /* 262 * We can't support transfers larger than the SPI FIFO size 263 * unless we have DMA. We don't have DMA on the ISP SPI ports 264 * for Exynos. We need a way of asking SPI driver for 265 * maximum-supported transfer size. 266 */ 267 todo = min(need_len, 256); 268 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 269 todo, need_len, ptr - ec_dev->din); 270 271 ret = receive_n_bytes(ec_dev, ptr, todo); 272 if (ret < 0) 273 return ret; 274 275 ptr += todo; 276 need_len -= todo; 277 } 278 279 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 280 281 return 0; 282 } 283 284 /** 285 * cros_ec_spi_receive_response - Receive a response from the EC. 286 * 287 * This function has two phases: reading the preamble bytes (since if we read 288 * data from the EC before it is ready to send, we just get preamble) and 289 * reading the actual message. 290 * 291 * The received data is placed into ec_dev->din. 292 * 293 * @ec_dev: ChromeOS EC device 294 * @need_len: Number of message bytes we need to read 295 */ 296 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, 297 int need_len) 298 { 299 u8 *ptr, *end; 300 int ret; 301 unsigned long deadline; 302 int todo; 303 304 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); 305 306 /* Receive data until we see the header byte */ 307 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); 308 while (true) { 309 unsigned long start_jiffies = jiffies; 310 311 ret = receive_n_bytes(ec_dev, 312 ec_dev->din, 313 EC_MSG_PREAMBLE_COUNT); 314 if (ret < 0) 315 return ret; 316 317 ptr = ec_dev->din; 318 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { 319 if (*ptr == EC_SPI_FRAME_START) { 320 dev_dbg(ec_dev->dev, "msg found at %zd\n", 321 ptr - ec_dev->din); 322 break; 323 } 324 } 325 if (ptr != end) 326 break; 327 328 /* 329 * Use the time at the start of the loop as a timeout. This 330 * gives us one last shot at getting the transfer and is useful 331 * in case we got context switched out for a while. 332 */ 333 if (time_after(start_jiffies, deadline)) { 334 dev_warn(ec_dev->dev, "EC failed to respond in time\n"); 335 return -ETIMEDOUT; 336 } 337 } 338 339 /* 340 * ptr now points to the header byte. Copy any valid data to the 341 * start of our buffer 342 */ 343 todo = end - ++ptr; 344 BUG_ON(todo < 0 || todo > ec_dev->din_size); 345 todo = min(todo, need_len); 346 memmove(ec_dev->din, ptr, todo); 347 ptr = ec_dev->din + todo; 348 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", 349 need_len, todo); 350 need_len -= todo; 351 352 /* Receive data until we have it all */ 353 while (need_len > 0) { 354 /* 355 * We can't support transfers larger than the SPI FIFO size 356 * unless we have DMA. We don't have DMA on the ISP SPI ports 357 * for Exynos. We need a way of asking SPI driver for 358 * maximum-supported transfer size. 359 */ 360 todo = min(need_len, 256); 361 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", 362 todo, need_len, ptr - ec_dev->din); 363 364 ret = receive_n_bytes(ec_dev, ptr, todo); 365 if (ret < 0) 366 return ret; 367 368 debug_packet(ec_dev->dev, "interim", ptr, todo); 369 ptr += todo; 370 need_len -= todo; 371 } 372 373 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); 374 375 return 0; 376 } 377 378 /** 379 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply 380 * 381 * @ec_dev: ChromeOS EC device 382 * @ec_msg: Message to transfer 383 */ 384 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, 385 struct cros_ec_command *ec_msg) 386 { 387 struct ec_host_response *response; 388 struct cros_ec_spi *ec_spi = ec_dev->priv; 389 struct spi_transfer trans, trans_delay; 390 struct spi_message msg; 391 int i, len; 392 u8 *ptr; 393 u8 *rx_buf; 394 u8 sum; 395 u8 rx_byte; 396 int ret = 0, final_ret; 397 unsigned long delay; 398 399 len = cros_ec_prepare_tx(ec_dev, ec_msg); 400 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 401 402 /* If it's too soon to do another transaction, wait */ 403 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 404 if (delay < EC_SPI_RECOVERY_TIME_NS) 405 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 406 407 rx_buf = kzalloc(len, GFP_KERNEL); 408 if (!rx_buf) 409 return -ENOMEM; 410 411 spi_bus_lock(ec_spi->spi->master); 412 413 /* 414 * Leave a gap between CS assertion and clocking of data to allow the 415 * EC time to wakeup. 416 */ 417 spi_message_init(&msg); 418 if (ec_spi->start_of_msg_delay) { 419 memset(&trans_delay, 0, sizeof(trans_delay)); 420 trans_delay.delay.value = ec_spi->start_of_msg_delay; 421 trans_delay.delay.unit = SPI_DELAY_UNIT_USECS; 422 spi_message_add_tail(&trans_delay, &msg); 423 } 424 425 /* Transmit phase - send our message */ 426 memset(&trans, 0, sizeof(trans)); 427 trans.tx_buf = ec_dev->dout; 428 trans.rx_buf = rx_buf; 429 trans.len = len; 430 trans.cs_change = 1; 431 spi_message_add_tail(&trans, &msg); 432 ret = spi_sync_locked(ec_spi->spi, &msg); 433 434 /* Get the response */ 435 if (!ret) { 436 /* Verify that EC can process command */ 437 for (i = 0; i < len; i++) { 438 rx_byte = rx_buf[i]; 439 /* 440 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY 441 * markers are all signs that the EC didn't fully 442 * receive our command. e.g., if the EC is flashing 443 * itself, it can't respond to any commands and instead 444 * clocks out EC_SPI_PAST_END from its SPI hardware 445 * buffer. Similar occurrences can happen if the AP is 446 * too slow to clock out data after asserting CS -- the 447 * EC will abort and fill its buffer with 448 * EC_SPI_RX_BAD_DATA. 449 * 450 * In all cases, these errors should be safe to retry. 451 * Report -EAGAIN and let the caller decide what to do 452 * about that. 453 */ 454 if (rx_byte == EC_SPI_PAST_END || 455 rx_byte == EC_SPI_RX_BAD_DATA || 456 rx_byte == EC_SPI_NOT_READY) { 457 ret = -EAGAIN; 458 break; 459 } 460 } 461 } 462 463 if (!ret) 464 ret = cros_ec_spi_receive_packet(ec_dev, 465 ec_msg->insize + sizeof(*response)); 466 else if (ret != -EAGAIN) 467 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 468 469 final_ret = terminate_request(ec_dev); 470 471 spi_bus_unlock(ec_spi->spi->master); 472 473 if (!ret) 474 ret = final_ret; 475 if (ret < 0) 476 goto exit; 477 478 ptr = ec_dev->din; 479 480 /* check response error code */ 481 response = (struct ec_host_response *)ptr; 482 ec_msg->result = response->result; 483 484 ret = cros_ec_check_result(ec_dev, ec_msg); 485 if (ret) 486 goto exit; 487 488 len = response->data_len; 489 sum = 0; 490 if (len > ec_msg->insize) { 491 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 492 len, ec_msg->insize); 493 ret = -EMSGSIZE; 494 goto exit; 495 } 496 497 for (i = 0; i < sizeof(*response); i++) 498 sum += ptr[i]; 499 500 /* copy response packet payload and compute checksum */ 501 memcpy(ec_msg->data, ptr + sizeof(*response), len); 502 for (i = 0; i < len; i++) 503 sum += ec_msg->data[i]; 504 505 if (sum) { 506 dev_err(ec_dev->dev, 507 "bad packet checksum, calculated %x\n", 508 sum); 509 ret = -EBADMSG; 510 goto exit; 511 } 512 513 ret = len; 514 exit: 515 kfree(rx_buf); 516 if (ec_msg->command == EC_CMD_REBOOT_EC) 517 msleep(EC_REBOOT_DELAY_MS); 518 519 return ret; 520 } 521 522 /** 523 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply 524 * 525 * @ec_dev: ChromeOS EC device 526 * @ec_msg: Message to transfer 527 */ 528 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, 529 struct cros_ec_command *ec_msg) 530 { 531 struct cros_ec_spi *ec_spi = ec_dev->priv; 532 struct spi_transfer trans; 533 struct spi_message msg; 534 int i, len; 535 u8 *ptr; 536 u8 *rx_buf; 537 u8 rx_byte; 538 int sum; 539 int ret = 0, final_ret; 540 unsigned long delay; 541 542 len = cros_ec_prepare_tx(ec_dev, ec_msg); 543 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); 544 545 /* If it's too soon to do another transaction, wait */ 546 delay = ktime_get_ns() - ec_spi->last_transfer_ns; 547 if (delay < EC_SPI_RECOVERY_TIME_NS) 548 ndelay(EC_SPI_RECOVERY_TIME_NS - delay); 549 550 rx_buf = kzalloc(len, GFP_KERNEL); 551 if (!rx_buf) 552 return -ENOMEM; 553 554 spi_bus_lock(ec_spi->spi->master); 555 556 /* Transmit phase - send our message */ 557 debug_packet(ec_dev->dev, "out", ec_dev->dout, len); 558 memset(&trans, 0, sizeof(trans)); 559 trans.tx_buf = ec_dev->dout; 560 trans.rx_buf = rx_buf; 561 trans.len = len; 562 trans.cs_change = 1; 563 spi_message_init(&msg); 564 spi_message_add_tail(&trans, &msg); 565 ret = spi_sync_locked(ec_spi->spi, &msg); 566 567 /* Get the response */ 568 if (!ret) { 569 /* Verify that EC can process command */ 570 for (i = 0; i < len; i++) { 571 rx_byte = rx_buf[i]; 572 /* See comments in cros_ec_pkt_xfer_spi() */ 573 if (rx_byte == EC_SPI_PAST_END || 574 rx_byte == EC_SPI_RX_BAD_DATA || 575 rx_byte == EC_SPI_NOT_READY) { 576 ret = -EAGAIN; 577 break; 578 } 579 } 580 } 581 582 if (!ret) 583 ret = cros_ec_spi_receive_response(ec_dev, 584 ec_msg->insize + EC_MSG_TX_PROTO_BYTES); 585 else if (ret != -EAGAIN) 586 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); 587 588 final_ret = terminate_request(ec_dev); 589 590 spi_bus_unlock(ec_spi->spi->master); 591 592 if (!ret) 593 ret = final_ret; 594 if (ret < 0) 595 goto exit; 596 597 ptr = ec_dev->din; 598 599 /* check response error code */ 600 ec_msg->result = ptr[0]; 601 ret = cros_ec_check_result(ec_dev, ec_msg); 602 if (ret) 603 goto exit; 604 605 len = ptr[1]; 606 sum = ptr[0] + ptr[1]; 607 if (len > ec_msg->insize) { 608 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", 609 len, ec_msg->insize); 610 ret = -ENOSPC; 611 goto exit; 612 } 613 614 /* copy response packet payload and compute checksum */ 615 for (i = 0; i < len; i++) { 616 sum += ptr[i + 2]; 617 if (ec_msg->insize) 618 ec_msg->data[i] = ptr[i + 2]; 619 } 620 sum &= 0xff; 621 622 debug_packet(ec_dev->dev, "in", ptr, len + 3); 623 624 if (sum != ptr[len + 2]) { 625 dev_err(ec_dev->dev, 626 "bad packet checksum, expected %02x, got %02x\n", 627 sum, ptr[len + 2]); 628 ret = -EBADMSG; 629 goto exit; 630 } 631 632 ret = len; 633 exit: 634 kfree(rx_buf); 635 if (ec_msg->command == EC_CMD_REBOOT_EC) 636 msleep(EC_REBOOT_DELAY_MS); 637 638 return ret; 639 } 640 641 static void cros_ec_xfer_high_pri_work(struct kthread_work *work) 642 { 643 struct cros_ec_xfer_work_params *params; 644 645 params = container_of(work, struct cros_ec_xfer_work_params, work); 646 params->ret = params->fn(params->ec_dev, params->ec_msg); 647 } 648 649 static int cros_ec_xfer_high_pri(struct cros_ec_device *ec_dev, 650 struct cros_ec_command *ec_msg, 651 cros_ec_xfer_fn_t fn) 652 { 653 struct cros_ec_spi *ec_spi = ec_dev->priv; 654 struct cros_ec_xfer_work_params params = { 655 .work = KTHREAD_WORK_INIT(params.work, 656 cros_ec_xfer_high_pri_work), 657 .ec_dev = ec_dev, 658 .ec_msg = ec_msg, 659 .fn = fn, 660 }; 661 662 /* 663 * This looks a bit ridiculous. Why do the work on a 664 * different thread if we're just going to block waiting for 665 * the thread to finish? The key here is that the thread is 666 * running at high priority but the calling context might not 667 * be. We need to be at high priority to avoid getting 668 * context switched out for too long and the EC giving up on 669 * the transfer. 670 */ 671 kthread_queue_work(ec_spi->high_pri_worker, ¶ms.work); 672 kthread_flush_work(¶ms.work); 673 674 return params.ret; 675 } 676 677 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, 678 struct cros_ec_command *ec_msg) 679 { 680 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_pkt_xfer_spi); 681 } 682 683 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, 684 struct cros_ec_command *ec_msg) 685 { 686 return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi); 687 } 688 689 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) 690 { 691 struct device_node *np = dev->of_node; 692 u32 val; 693 int ret; 694 695 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); 696 if (!ret) 697 ec_spi->start_of_msg_delay = val; 698 699 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); 700 if (!ret) 701 ec_spi->end_of_msg_delay = val; 702 } 703 704 static void cros_ec_spi_high_pri_release(void *worker) 705 { 706 kthread_destroy_worker(worker); 707 } 708 709 static int cros_ec_spi_devm_high_pri_alloc(struct device *dev, 710 struct cros_ec_spi *ec_spi) 711 { 712 struct sched_param sched_priority = { 713 .sched_priority = MAX_RT_PRIO / 2, 714 }; 715 int err; 716 717 ec_spi->high_pri_worker = 718 kthread_create_worker(0, "cros_ec_spi_high_pri"); 719 720 if (IS_ERR(ec_spi->high_pri_worker)) { 721 err = PTR_ERR(ec_spi->high_pri_worker); 722 dev_err(dev, "Can't create cros_ec high pri worker: %d\n", err); 723 return err; 724 } 725 726 err = devm_add_action_or_reset(dev, cros_ec_spi_high_pri_release, 727 ec_spi->high_pri_worker); 728 if (err) 729 return err; 730 731 err = sched_setscheduler_nocheck(ec_spi->high_pri_worker->task, 732 SCHED_FIFO, &sched_priority); 733 if (err) 734 dev_err(dev, "Can't set cros_ec high pri priority: %d\n", err); 735 return err; 736 } 737 738 static int cros_ec_spi_probe(struct spi_device *spi) 739 { 740 struct device *dev = &spi->dev; 741 struct cros_ec_device *ec_dev; 742 struct cros_ec_spi *ec_spi; 743 int err; 744 745 spi->bits_per_word = 8; 746 spi->mode = SPI_MODE_0; 747 spi->rt = true; 748 err = spi_setup(spi); 749 if (err < 0) 750 return err; 751 752 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); 753 if (ec_spi == NULL) 754 return -ENOMEM; 755 ec_spi->spi = spi; 756 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); 757 if (!ec_dev) 758 return -ENOMEM; 759 760 /* Check for any DT properties */ 761 cros_ec_spi_dt_probe(ec_spi, dev); 762 763 spi_set_drvdata(spi, ec_dev); 764 ec_dev->dev = dev; 765 ec_dev->priv = ec_spi; 766 ec_dev->irq = spi->irq; 767 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; 768 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; 769 ec_dev->phys_name = dev_name(&ec_spi->spi->dev); 770 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + 771 sizeof(struct ec_host_response) + 772 sizeof(struct ec_response_get_protocol_info); 773 ec_dev->dout_size = sizeof(struct ec_host_request); 774 775 ec_spi->last_transfer_ns = ktime_get_ns(); 776 777 err = cros_ec_spi_devm_high_pri_alloc(dev, ec_spi); 778 if (err) 779 return err; 780 781 err = cros_ec_register(ec_dev); 782 if (err) { 783 dev_err(dev, "cannot register EC\n"); 784 return err; 785 } 786 787 device_init_wakeup(&spi->dev, true); 788 789 return 0; 790 } 791 792 static int cros_ec_spi_remove(struct spi_device *spi) 793 { 794 struct cros_ec_device *ec_dev = spi_get_drvdata(spi); 795 796 return cros_ec_unregister(ec_dev); 797 } 798 799 #ifdef CONFIG_PM_SLEEP 800 static int cros_ec_spi_suspend(struct device *dev) 801 { 802 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 803 804 return cros_ec_suspend(ec_dev); 805 } 806 807 static int cros_ec_spi_resume(struct device *dev) 808 { 809 struct cros_ec_device *ec_dev = dev_get_drvdata(dev); 810 811 return cros_ec_resume(ec_dev); 812 } 813 #endif 814 815 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, 816 cros_ec_spi_resume); 817 818 static const struct of_device_id cros_ec_spi_of_match[] = { 819 { .compatible = "google,cros-ec-spi", }, 820 { /* sentinel */ }, 821 }; 822 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); 823 824 static const struct spi_device_id cros_ec_spi_id[] = { 825 { "cros-ec-spi", 0 }, 826 { } 827 }; 828 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); 829 830 static struct spi_driver cros_ec_driver_spi = { 831 .driver = { 832 .name = "cros-ec-spi", 833 .of_match_table = cros_ec_spi_of_match, 834 .pm = &cros_ec_spi_pm_ops, 835 }, 836 .probe = cros_ec_spi_probe, 837 .remove = cros_ec_spi_remove, 838 .id_table = cros_ec_spi_id, 839 }; 840 841 module_spi_driver(cros_ec_driver_spi); 842 843 MODULE_LICENSE("GPL v2"); 844 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller"); 845