1 /* 2 * Copyright (C) 2015-2017 Socionext Inc. 3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #ifndef __PINCTRL_UNIPHIER_H__ 17 #define __PINCTRL_UNIPHIER_H__ 18 19 #include <linux/bits.h> 20 #include <linux/build_bug.h> 21 #include <linux/kernel.h> 22 #include <linux/types.h> 23 24 struct platform_device; 25 26 /* input enable control register bit */ 27 #define UNIPHIER_PIN_IECTRL_SHIFT 0 28 #define UNIPHIER_PIN_IECTRL_BITS 3 29 #define UNIPHIER_PIN_IECTRL_MASK ((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \ 30 - 1) 31 32 /* drive strength control register number */ 33 #define UNIPHIER_PIN_DRVCTRL_SHIFT ((UNIPHIER_PIN_IECTRL_SHIFT) + \ 34 (UNIPHIER_PIN_IECTRL_BITS)) 35 #define UNIPHIER_PIN_DRVCTRL_BITS 9 36 #define UNIPHIER_PIN_DRVCTRL_MASK ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \ 37 - 1) 38 39 /* drive control type */ 40 #define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \ 41 (UNIPHIER_PIN_DRVCTRL_BITS)) 42 #define UNIPHIER_PIN_DRV_TYPE_BITS 3 43 #define UNIPHIER_PIN_DRV_TYPE_MASK ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \ 44 - 1) 45 46 /* pull-up / pull-down register number */ 47 #define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \ 48 (UNIPHIER_PIN_DRV_TYPE_BITS)) 49 #define UNIPHIER_PIN_PUPDCTRL_BITS 9 50 #define UNIPHIER_PIN_PUPDCTRL_MASK ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\ 51 - 1) 52 53 /* direction of pull register */ 54 #define UNIPHIER_PIN_PULL_DIR_SHIFT ((UNIPHIER_PIN_PUPDCTRL_SHIFT) + \ 55 (UNIPHIER_PIN_PUPDCTRL_BITS)) 56 #define UNIPHIER_PIN_PULL_DIR_BITS 3 57 #define UNIPHIER_PIN_PULL_DIR_MASK ((1UL << (UNIPHIER_PIN_PULL_DIR_BITS))\ 58 - 1) 59 60 #if UNIPHIER_PIN_PULL_DIR_SHIFT + UNIPHIER_PIN_PULL_DIR_BITS > BITS_PER_LONG 61 #error "unable to pack pin attributes." 62 #endif 63 64 #define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK) 65 #define UNIPHIER_PIN_IECTRL_EXIST 0 66 67 /* drive control type */ 68 enum uniphier_pin_drv_type { 69 UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */ 70 UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */ 71 UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */ 72 UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */ 73 UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */ 74 UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */ 75 UNIPHIER_PIN_DRV_NONE, /* no support (input only pin) */ 76 }; 77 78 /* direction of pull register (no pin supports bi-directional pull biasing) */ 79 enum uniphier_pin_pull_dir { 80 UNIPHIER_PIN_PULL_UP, /* pull-up or disabled */ 81 UNIPHIER_PIN_PULL_DOWN, /* pull-down or disabled */ 82 UNIPHIER_PIN_PULL_UP_FIXED, /* always pull-up */ 83 UNIPHIER_PIN_PULL_DOWN_FIXED, /* always pull-down */ 84 UNIPHIER_PIN_PULL_NONE, /* no pull register */ 85 }; 86 87 #define UNIPHIER_PIN_IECTRL(x) \ 88 (((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT)) 89 #define UNIPHIER_PIN_DRVCTRL(x) \ 90 (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT)) 91 #define UNIPHIER_PIN_DRV_TYPE(x) \ 92 (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT)) 93 #define UNIPHIER_PIN_PUPDCTRL(x) \ 94 (((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT)) 95 #define UNIPHIER_PIN_PULL_DIR(x) \ 96 (((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT)) 97 98 #define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\ 99 (UNIPHIER_PIN_IECTRL(iectrl) | \ 100 UNIPHIER_PIN_DRVCTRL(drvctrl) | \ 101 UNIPHIER_PIN_DRV_TYPE(drv_type) | \ 102 UNIPHIER_PIN_PUPDCTRL(pupdctrl) | \ 103 UNIPHIER_PIN_PULL_DIR(pull_dir)) 104 105 static inline unsigned int uniphier_pin_get_iectrl(void *drv_data) 106 { 107 return ((unsigned long)drv_data >> UNIPHIER_PIN_IECTRL_SHIFT) & 108 UNIPHIER_PIN_IECTRL_MASK; 109 } 110 111 static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data) 112 { 113 return ((unsigned long)drv_data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & 114 UNIPHIER_PIN_DRVCTRL_MASK; 115 } 116 117 static inline unsigned int uniphier_pin_get_drv_type(void *drv_data) 118 { 119 return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) & 120 UNIPHIER_PIN_DRV_TYPE_MASK; 121 } 122 123 static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data) 124 { 125 return ((unsigned long)drv_data >> UNIPHIER_PIN_PUPDCTRL_SHIFT) & 126 UNIPHIER_PIN_PUPDCTRL_MASK; 127 } 128 129 static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data) 130 { 131 return ((unsigned long)drv_data >> UNIPHIER_PIN_PULL_DIR_SHIFT) & 132 UNIPHIER_PIN_PULL_DIR_MASK; 133 } 134 135 struct uniphier_pinctrl_group { 136 const char *name; 137 const unsigned *pins; 138 unsigned num_pins; 139 const int *muxvals; 140 }; 141 142 struct uniphier_pinmux_function { 143 const char *name; 144 const char * const *groups; 145 unsigned num_groups; 146 }; 147 148 struct uniphier_pinctrl_socdata { 149 const struct pinctrl_pin_desc *pins; 150 unsigned int npins; 151 const struct uniphier_pinctrl_group *groups; 152 int groups_count; 153 const struct uniphier_pinmux_function *functions; 154 int functions_count; 155 int (*get_gpio_muxval)(unsigned int pin, unsigned int gpio_offset); 156 unsigned int caps; 157 #define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1) 158 #define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0) 159 }; 160 161 #define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g) \ 162 { \ 163 .number = a, \ 164 .name = b, \ 165 .drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g), \ 166 } 167 168 #define __UNIPHIER_PINCTRL_GROUP(grp, mux) \ 169 { \ 170 .name = #grp, \ 171 .pins = grp##_pins, \ 172 .num_pins = ARRAY_SIZE(grp##_pins), \ 173 .muxvals = mux, \ 174 } 175 176 #define UNIPHIER_PINCTRL_GROUP(grp) \ 177 __UNIPHIER_PINCTRL_GROUP(grp, \ 178 grp##_muxvals + \ 179 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \ 180 ARRAY_SIZE(grp##_muxvals))) 181 182 #define UNIPHIER_PINCTRL_GROUP_GPIO(grp) \ 183 __UNIPHIER_PINCTRL_GROUP(grp, NULL) 184 185 #define UNIPHIER_PINMUX_FUNCTION(func) \ 186 { \ 187 .name = #func, \ 188 .groups = func##_groups, \ 189 .num_groups = ARRAY_SIZE(func##_groups), \ 190 } 191 192 int uniphier_pinctrl_probe(struct platform_device *pdev, 193 struct uniphier_pinctrl_socdata *socdata); 194 195 extern const struct dev_pm_ops uniphier_pinctrl_pm_ops; 196 197 #endif /* __PINCTRL_UNIPHIER_H__ */ 198