15f910777SMaxime Ripard /* 25f910777SMaxime Ripard * Allwinner A1X SoCs pinctrl driver. 35f910777SMaxime Ripard * 45f910777SMaxime Ripard * Copyright (C) 2012 Maxime Ripard 55f910777SMaxime Ripard * 65f910777SMaxime Ripard * Maxime Ripard <maxime.ripard@free-electrons.com> 75f910777SMaxime Ripard * 85f910777SMaxime Ripard * This file is licensed under the terms of the GNU General Public 95f910777SMaxime Ripard * License version 2. This program is licensed "as is" without any 105f910777SMaxime Ripard * warranty of any kind, whether express or implied. 115f910777SMaxime Ripard */ 125f910777SMaxime Ripard 135f910777SMaxime Ripard #ifndef __PINCTRL_SUNXI_H 145f910777SMaxime Ripard #define __PINCTRL_SUNXI_H 155f910777SMaxime Ripard 165f910777SMaxime Ripard #include <linux/kernel.h> 175f910777SMaxime Ripard #include <linux/spinlock.h> 185f910777SMaxime Ripard 195f910777SMaxime Ripard #define PA_BASE 0 205f910777SMaxime Ripard #define PB_BASE 32 215f910777SMaxime Ripard #define PC_BASE 64 225f910777SMaxime Ripard #define PD_BASE 96 235f910777SMaxime Ripard #define PE_BASE 128 245f910777SMaxime Ripard #define PF_BASE 160 255f910777SMaxime Ripard #define PG_BASE 192 265f910777SMaxime Ripard #define PH_BASE 224 275f910777SMaxime Ripard #define PI_BASE 256 285f910777SMaxime Ripard #define PL_BASE 352 295f910777SMaxime Ripard #define PM_BASE 384 305f910777SMaxime Ripard 315f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA0 PINCTRL_PIN(PA_BASE + 0, "PA0") 325f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA1 PINCTRL_PIN(PA_BASE + 1, "PA1") 335f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA2 PINCTRL_PIN(PA_BASE + 2, "PA2") 345f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA3 PINCTRL_PIN(PA_BASE + 3, "PA3") 355f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA4 PINCTRL_PIN(PA_BASE + 4, "PA4") 365f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA5 PINCTRL_PIN(PA_BASE + 5, "PA5") 375f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA6 PINCTRL_PIN(PA_BASE + 6, "PA6") 385f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA7 PINCTRL_PIN(PA_BASE + 7, "PA7") 395f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA8 PINCTRL_PIN(PA_BASE + 8, "PA8") 405f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA9 PINCTRL_PIN(PA_BASE + 9, "PA9") 415f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA10 PINCTRL_PIN(PA_BASE + 10, "PA10") 425f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA11 PINCTRL_PIN(PA_BASE + 11, "PA11") 435f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA12 PINCTRL_PIN(PA_BASE + 12, "PA12") 445f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA13 PINCTRL_PIN(PA_BASE + 13, "PA13") 455f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA14 PINCTRL_PIN(PA_BASE + 14, "PA14") 465f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA15 PINCTRL_PIN(PA_BASE + 15, "PA15") 475f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA16 PINCTRL_PIN(PA_BASE + 16, "PA16") 485f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA17 PINCTRL_PIN(PA_BASE + 17, "PA17") 495f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA18 PINCTRL_PIN(PA_BASE + 18, "PA18") 505f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA19 PINCTRL_PIN(PA_BASE + 19, "PA19") 515f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA20 PINCTRL_PIN(PA_BASE + 20, "PA20") 525f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA21 PINCTRL_PIN(PA_BASE + 21, "PA21") 535f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA22 PINCTRL_PIN(PA_BASE + 22, "PA22") 545f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA23 PINCTRL_PIN(PA_BASE + 23, "PA23") 555f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA24 PINCTRL_PIN(PA_BASE + 24, "PA24") 565f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA25 PINCTRL_PIN(PA_BASE + 25, "PA25") 575f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA26 PINCTRL_PIN(PA_BASE + 26, "PA26") 585f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA27 PINCTRL_PIN(PA_BASE + 27, "PA27") 595f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA28 PINCTRL_PIN(PA_BASE + 28, "PA28") 605f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA29 PINCTRL_PIN(PA_BASE + 29, "PA29") 615f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA30 PINCTRL_PIN(PA_BASE + 30, "PA30") 625f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PA31 PINCTRL_PIN(PA_BASE + 31, "PA31") 635f910777SMaxime Ripard 645f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB0 PINCTRL_PIN(PB_BASE + 0, "PB0") 655f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB1 PINCTRL_PIN(PB_BASE + 1, "PB1") 665f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB2 PINCTRL_PIN(PB_BASE + 2, "PB2") 675f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB3 PINCTRL_PIN(PB_BASE + 3, "PB3") 685f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB4 PINCTRL_PIN(PB_BASE + 4, "PB4") 695f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB5 PINCTRL_PIN(PB_BASE + 5, "PB5") 705f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB6 PINCTRL_PIN(PB_BASE + 6, "PB6") 715f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB7 PINCTRL_PIN(PB_BASE + 7, "PB7") 725f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB8 PINCTRL_PIN(PB_BASE + 8, "PB8") 735f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB9 PINCTRL_PIN(PB_BASE + 9, "PB9") 745f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB10 PINCTRL_PIN(PB_BASE + 10, "PB10") 755f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB11 PINCTRL_PIN(PB_BASE + 11, "PB11") 765f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB12 PINCTRL_PIN(PB_BASE + 12, "PB12") 775f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB13 PINCTRL_PIN(PB_BASE + 13, "PB13") 785f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB14 PINCTRL_PIN(PB_BASE + 14, "PB14") 795f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB15 PINCTRL_PIN(PB_BASE + 15, "PB15") 805f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB16 PINCTRL_PIN(PB_BASE + 16, "PB16") 815f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB17 PINCTRL_PIN(PB_BASE + 17, "PB17") 825f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB18 PINCTRL_PIN(PB_BASE + 18, "PB18") 835f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB19 PINCTRL_PIN(PB_BASE + 19, "PB19") 845f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB20 PINCTRL_PIN(PB_BASE + 20, "PB20") 855f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB21 PINCTRL_PIN(PB_BASE + 21, "PB21") 865f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB22 PINCTRL_PIN(PB_BASE + 22, "PB22") 875f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB23 PINCTRL_PIN(PB_BASE + 23, "PB23") 885f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB24 PINCTRL_PIN(PB_BASE + 24, "PB24") 895f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB25 PINCTRL_PIN(PB_BASE + 25, "PB25") 905f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB26 PINCTRL_PIN(PB_BASE + 26, "PB26") 915f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB27 PINCTRL_PIN(PB_BASE + 27, "PB27") 925f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB28 PINCTRL_PIN(PB_BASE + 28, "PB28") 935f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB29 PINCTRL_PIN(PB_BASE + 29, "PB29") 945f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB30 PINCTRL_PIN(PB_BASE + 30, "PB30") 955f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PB31 PINCTRL_PIN(PB_BASE + 31, "PB31") 965f910777SMaxime Ripard 975f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC0 PINCTRL_PIN(PC_BASE + 0, "PC0") 985f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC1 PINCTRL_PIN(PC_BASE + 1, "PC1") 995f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC2 PINCTRL_PIN(PC_BASE + 2, "PC2") 1005f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC3 PINCTRL_PIN(PC_BASE + 3, "PC3") 1015f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC4 PINCTRL_PIN(PC_BASE + 4, "PC4") 1025f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC5 PINCTRL_PIN(PC_BASE + 5, "PC5") 1035f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC6 PINCTRL_PIN(PC_BASE + 6, "PC6") 1045f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC7 PINCTRL_PIN(PC_BASE + 7, "PC7") 1055f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC8 PINCTRL_PIN(PC_BASE + 8, "PC8") 1065f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC9 PINCTRL_PIN(PC_BASE + 9, "PC9") 1075f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC10 PINCTRL_PIN(PC_BASE + 10, "PC10") 1085f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC11 PINCTRL_PIN(PC_BASE + 11, "PC11") 1095f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC12 PINCTRL_PIN(PC_BASE + 12, "PC12") 1105f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC13 PINCTRL_PIN(PC_BASE + 13, "PC13") 1115f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC14 PINCTRL_PIN(PC_BASE + 14, "PC14") 1125f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC15 PINCTRL_PIN(PC_BASE + 15, "PC15") 1135f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC16 PINCTRL_PIN(PC_BASE + 16, "PC16") 1145f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC17 PINCTRL_PIN(PC_BASE + 17, "PC17") 1155f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC18 PINCTRL_PIN(PC_BASE + 18, "PC18") 1165f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC19 PINCTRL_PIN(PC_BASE + 19, "PC19") 1175f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC20 PINCTRL_PIN(PC_BASE + 20, "PC20") 1185f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC21 PINCTRL_PIN(PC_BASE + 21, "PC21") 1195f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC22 PINCTRL_PIN(PC_BASE + 22, "PC22") 1205f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC23 PINCTRL_PIN(PC_BASE + 23, "PC23") 1215f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC24 PINCTRL_PIN(PC_BASE + 24, "PC24") 1225f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC25 PINCTRL_PIN(PC_BASE + 25, "PC25") 1235f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC26 PINCTRL_PIN(PC_BASE + 26, "PC26") 1245f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC27 PINCTRL_PIN(PC_BASE + 27, "PC27") 1255f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC28 PINCTRL_PIN(PC_BASE + 28, "PC28") 1265f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC29 PINCTRL_PIN(PC_BASE + 29, "PC29") 1275f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC30 PINCTRL_PIN(PC_BASE + 30, "PC30") 1285f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PC31 PINCTRL_PIN(PC_BASE + 31, "PC31") 1295f910777SMaxime Ripard 1305f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD0 PINCTRL_PIN(PD_BASE + 0, "PD0") 1315f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD1 PINCTRL_PIN(PD_BASE + 1, "PD1") 1325f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD2 PINCTRL_PIN(PD_BASE + 2, "PD2") 1335f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD3 PINCTRL_PIN(PD_BASE + 3, "PD3") 1345f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD4 PINCTRL_PIN(PD_BASE + 4, "PD4") 1355f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD5 PINCTRL_PIN(PD_BASE + 5, "PD5") 1365f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD6 PINCTRL_PIN(PD_BASE + 6, "PD6") 1375f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD7 PINCTRL_PIN(PD_BASE + 7, "PD7") 1385f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD8 PINCTRL_PIN(PD_BASE + 8, "PD8") 1395f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD9 PINCTRL_PIN(PD_BASE + 9, "PD9") 1405f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD10 PINCTRL_PIN(PD_BASE + 10, "PD10") 1415f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD11 PINCTRL_PIN(PD_BASE + 11, "PD11") 1425f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD12 PINCTRL_PIN(PD_BASE + 12, "PD12") 1435f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD13 PINCTRL_PIN(PD_BASE + 13, "PD13") 1445f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD14 PINCTRL_PIN(PD_BASE + 14, "PD14") 1455f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD15 PINCTRL_PIN(PD_BASE + 15, "PD15") 1465f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD16 PINCTRL_PIN(PD_BASE + 16, "PD16") 1475f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD17 PINCTRL_PIN(PD_BASE + 17, "PD17") 1485f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD18 PINCTRL_PIN(PD_BASE + 18, "PD18") 1495f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD19 PINCTRL_PIN(PD_BASE + 19, "PD19") 1505f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD20 PINCTRL_PIN(PD_BASE + 20, "PD20") 1515f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD21 PINCTRL_PIN(PD_BASE + 21, "PD21") 1525f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD22 PINCTRL_PIN(PD_BASE + 22, "PD22") 1535f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD23 PINCTRL_PIN(PD_BASE + 23, "PD23") 1545f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD24 PINCTRL_PIN(PD_BASE + 24, "PD24") 1555f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD25 PINCTRL_PIN(PD_BASE + 25, "PD25") 1565f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD26 PINCTRL_PIN(PD_BASE + 26, "PD26") 1575f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD27 PINCTRL_PIN(PD_BASE + 27, "PD27") 1585f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD28 PINCTRL_PIN(PD_BASE + 28, "PD28") 1595f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD29 PINCTRL_PIN(PD_BASE + 29, "PD29") 1605f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD30 PINCTRL_PIN(PD_BASE + 30, "PD30") 1615f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PD31 PINCTRL_PIN(PD_BASE + 31, "PD31") 1625f910777SMaxime Ripard 1635f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE0 PINCTRL_PIN(PE_BASE + 0, "PE0") 1645f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE1 PINCTRL_PIN(PE_BASE + 1, "PE1") 1655f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE2 PINCTRL_PIN(PE_BASE + 2, "PE2") 1665f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE3 PINCTRL_PIN(PE_BASE + 3, "PE3") 1675f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE4 PINCTRL_PIN(PE_BASE + 4, "PE4") 1685f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE5 PINCTRL_PIN(PE_BASE + 5, "PE5") 1695f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE6 PINCTRL_PIN(PE_BASE + 6, "PE6") 1705f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE7 PINCTRL_PIN(PE_BASE + 7, "PE7") 1715f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE8 PINCTRL_PIN(PE_BASE + 8, "PE8") 1725f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE9 PINCTRL_PIN(PE_BASE + 9, "PE9") 1735f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE10 PINCTRL_PIN(PE_BASE + 10, "PE10") 1745f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE11 PINCTRL_PIN(PE_BASE + 11, "PE11") 1755f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE12 PINCTRL_PIN(PE_BASE + 12, "PE12") 1765f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE13 PINCTRL_PIN(PE_BASE + 13, "PE13") 1775f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE14 PINCTRL_PIN(PE_BASE + 14, "PE14") 1785f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE15 PINCTRL_PIN(PE_BASE + 15, "PE15") 1795f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE16 PINCTRL_PIN(PE_BASE + 16, "PE16") 1805f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE17 PINCTRL_PIN(PE_BASE + 17, "PE17") 1815f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE18 PINCTRL_PIN(PE_BASE + 18, "PE18") 1825f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE19 PINCTRL_PIN(PE_BASE + 19, "PE19") 1835f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE20 PINCTRL_PIN(PE_BASE + 20, "PE20") 1845f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE21 PINCTRL_PIN(PE_BASE + 21, "PE21") 1855f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE22 PINCTRL_PIN(PE_BASE + 22, "PE22") 1865f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE23 PINCTRL_PIN(PE_BASE + 23, "PE23") 1875f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE24 PINCTRL_PIN(PE_BASE + 24, "PE24") 1885f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE25 PINCTRL_PIN(PE_BASE + 25, "PE25") 1895f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE26 PINCTRL_PIN(PE_BASE + 26, "PE26") 1905f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE27 PINCTRL_PIN(PE_BASE + 27, "PE27") 1915f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE28 PINCTRL_PIN(PE_BASE + 28, "PE28") 1925f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE29 PINCTRL_PIN(PE_BASE + 29, "PE29") 1935f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE30 PINCTRL_PIN(PE_BASE + 30, "PE30") 1945f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PE31 PINCTRL_PIN(PE_BASE + 31, "PE31") 1955f910777SMaxime Ripard 1965f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF0 PINCTRL_PIN(PF_BASE + 0, "PF0") 1975f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF1 PINCTRL_PIN(PF_BASE + 1, "PF1") 1985f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF2 PINCTRL_PIN(PF_BASE + 2, "PF2") 1995f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF3 PINCTRL_PIN(PF_BASE + 3, "PF3") 2005f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF4 PINCTRL_PIN(PF_BASE + 4, "PF4") 2015f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF5 PINCTRL_PIN(PF_BASE + 5, "PF5") 2025f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF6 PINCTRL_PIN(PF_BASE + 6, "PF6") 2035f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF7 PINCTRL_PIN(PF_BASE + 7, "PF7") 2045f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF8 PINCTRL_PIN(PF_BASE + 8, "PF8") 2055f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF9 PINCTRL_PIN(PF_BASE + 9, "PF9") 2065f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF10 PINCTRL_PIN(PF_BASE + 10, "PF10") 2075f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF11 PINCTRL_PIN(PF_BASE + 11, "PF11") 2085f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF12 PINCTRL_PIN(PF_BASE + 12, "PF12") 2095f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF13 PINCTRL_PIN(PF_BASE + 13, "PF13") 2105f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF14 PINCTRL_PIN(PF_BASE + 14, "PF14") 2115f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF15 PINCTRL_PIN(PF_BASE + 15, "PF15") 2125f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF16 PINCTRL_PIN(PF_BASE + 16, "PF16") 2135f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF17 PINCTRL_PIN(PF_BASE + 17, "PF17") 2145f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF18 PINCTRL_PIN(PF_BASE + 18, "PF18") 2155f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF19 PINCTRL_PIN(PF_BASE + 19, "PF19") 2165f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF20 PINCTRL_PIN(PF_BASE + 20, "PF20") 2175f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF21 PINCTRL_PIN(PF_BASE + 21, "PF21") 2185f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF22 PINCTRL_PIN(PF_BASE + 22, "PF22") 2195f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF23 PINCTRL_PIN(PF_BASE + 23, "PF23") 2205f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF24 PINCTRL_PIN(PF_BASE + 24, "PF24") 2215f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF25 PINCTRL_PIN(PF_BASE + 25, "PF25") 2225f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF26 PINCTRL_PIN(PF_BASE + 26, "PF26") 2235f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF27 PINCTRL_PIN(PF_BASE + 27, "PF27") 2245f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF28 PINCTRL_PIN(PF_BASE + 28, "PF28") 2255f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF29 PINCTRL_PIN(PF_BASE + 29, "PF29") 2265f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF30 PINCTRL_PIN(PF_BASE + 30, "PF30") 2275f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PF31 PINCTRL_PIN(PF_BASE + 31, "PF31") 2285f910777SMaxime Ripard 2295f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG0 PINCTRL_PIN(PG_BASE + 0, "PG0") 2305f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG1 PINCTRL_PIN(PG_BASE + 1, "PG1") 2315f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG2 PINCTRL_PIN(PG_BASE + 2, "PG2") 2325f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG3 PINCTRL_PIN(PG_BASE + 3, "PG3") 2335f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG4 PINCTRL_PIN(PG_BASE + 4, "PG4") 2345f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG5 PINCTRL_PIN(PG_BASE + 5, "PG5") 2355f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG6 PINCTRL_PIN(PG_BASE + 6, "PG6") 2365f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG7 PINCTRL_PIN(PG_BASE + 7, "PG7") 2375f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG8 PINCTRL_PIN(PG_BASE + 8, "PG8") 2385f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG9 PINCTRL_PIN(PG_BASE + 9, "PG9") 2395f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG10 PINCTRL_PIN(PG_BASE + 10, "PG10") 2405f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG11 PINCTRL_PIN(PG_BASE + 11, "PG11") 2415f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG12 PINCTRL_PIN(PG_BASE + 12, "PG12") 2425f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG13 PINCTRL_PIN(PG_BASE + 13, "PG13") 2435f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG14 PINCTRL_PIN(PG_BASE + 14, "PG14") 2445f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG15 PINCTRL_PIN(PG_BASE + 15, "PG15") 2455f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG16 PINCTRL_PIN(PG_BASE + 16, "PG16") 2465f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG17 PINCTRL_PIN(PG_BASE + 17, "PG17") 2475f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG18 PINCTRL_PIN(PG_BASE + 18, "PG18") 2485f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG19 PINCTRL_PIN(PG_BASE + 19, "PG19") 2495f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG20 PINCTRL_PIN(PG_BASE + 20, "PG20") 2505f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG21 PINCTRL_PIN(PG_BASE + 21, "PG21") 2515f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG22 PINCTRL_PIN(PG_BASE + 22, "PG22") 2525f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG23 PINCTRL_PIN(PG_BASE + 23, "PG23") 2535f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG24 PINCTRL_PIN(PG_BASE + 24, "PG24") 2545f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG25 PINCTRL_PIN(PG_BASE + 25, "PG25") 2555f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG26 PINCTRL_PIN(PG_BASE + 26, "PG26") 2565f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG27 PINCTRL_PIN(PG_BASE + 27, "PG27") 2575f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG28 PINCTRL_PIN(PG_BASE + 28, "PG28") 2585f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG29 PINCTRL_PIN(PG_BASE + 29, "PG29") 2595f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG30 PINCTRL_PIN(PG_BASE + 30, "PG30") 2605f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PG31 PINCTRL_PIN(PG_BASE + 31, "PG31") 2615f910777SMaxime Ripard 2625f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH0 PINCTRL_PIN(PH_BASE + 0, "PH0") 2635f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH1 PINCTRL_PIN(PH_BASE + 1, "PH1") 2645f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH2 PINCTRL_PIN(PH_BASE + 2, "PH2") 2655f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH3 PINCTRL_PIN(PH_BASE + 3, "PH3") 2665f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH4 PINCTRL_PIN(PH_BASE + 4, "PH4") 2675f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH5 PINCTRL_PIN(PH_BASE + 5, "PH5") 2685f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH6 PINCTRL_PIN(PH_BASE + 6, "PH6") 2695f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH7 PINCTRL_PIN(PH_BASE + 7, "PH7") 2705f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH8 PINCTRL_PIN(PH_BASE + 8, "PH8") 2715f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH9 PINCTRL_PIN(PH_BASE + 9, "PH9") 2725f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH10 PINCTRL_PIN(PH_BASE + 10, "PH10") 2735f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH11 PINCTRL_PIN(PH_BASE + 11, "PH11") 2745f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH12 PINCTRL_PIN(PH_BASE + 12, "PH12") 2755f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH13 PINCTRL_PIN(PH_BASE + 13, "PH13") 2765f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH14 PINCTRL_PIN(PH_BASE + 14, "PH14") 2775f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH15 PINCTRL_PIN(PH_BASE + 15, "PH15") 2785f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH16 PINCTRL_PIN(PH_BASE + 16, "PH16") 2795f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH17 PINCTRL_PIN(PH_BASE + 17, "PH17") 2805f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH18 PINCTRL_PIN(PH_BASE + 18, "PH18") 2815f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH19 PINCTRL_PIN(PH_BASE + 19, "PH19") 2825f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH20 PINCTRL_PIN(PH_BASE + 20, "PH20") 2835f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH21 PINCTRL_PIN(PH_BASE + 21, "PH21") 2845f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH22 PINCTRL_PIN(PH_BASE + 22, "PH22") 2855f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH23 PINCTRL_PIN(PH_BASE + 23, "PH23") 2865f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH24 PINCTRL_PIN(PH_BASE + 24, "PH24") 2875f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH25 PINCTRL_PIN(PH_BASE + 25, "PH25") 2885f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH26 PINCTRL_PIN(PH_BASE + 26, "PH26") 2895f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH27 PINCTRL_PIN(PH_BASE + 27, "PH27") 2905f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH28 PINCTRL_PIN(PH_BASE + 28, "PH28") 2915f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH29 PINCTRL_PIN(PH_BASE + 29, "PH29") 2925f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH30 PINCTRL_PIN(PH_BASE + 30, "PH30") 2935f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PH31 PINCTRL_PIN(PH_BASE + 31, "PH31") 2945f910777SMaxime Ripard 2955f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI0 PINCTRL_PIN(PI_BASE + 0, "PI0") 2965f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI1 PINCTRL_PIN(PI_BASE + 1, "PI1") 2975f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI2 PINCTRL_PIN(PI_BASE + 2, "PI2") 2985f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI3 PINCTRL_PIN(PI_BASE + 3, "PI3") 2995f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI4 PINCTRL_PIN(PI_BASE + 4, "PI4") 3005f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI5 PINCTRL_PIN(PI_BASE + 5, "PI5") 3015f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI6 PINCTRL_PIN(PI_BASE + 6, "PI6") 3025f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI7 PINCTRL_PIN(PI_BASE + 7, "PI7") 3035f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI8 PINCTRL_PIN(PI_BASE + 8, "PI8") 3045f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI9 PINCTRL_PIN(PI_BASE + 9, "PI9") 3055f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI10 PINCTRL_PIN(PI_BASE + 10, "PI10") 3065f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI11 PINCTRL_PIN(PI_BASE + 11, "PI11") 3075f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI12 PINCTRL_PIN(PI_BASE + 12, "PI12") 3085f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI13 PINCTRL_PIN(PI_BASE + 13, "PI13") 3095f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI14 PINCTRL_PIN(PI_BASE + 14, "PI14") 3105f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI15 PINCTRL_PIN(PI_BASE + 15, "PI15") 3115f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI16 PINCTRL_PIN(PI_BASE + 16, "PI16") 3125f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI17 PINCTRL_PIN(PI_BASE + 17, "PI17") 3135f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI18 PINCTRL_PIN(PI_BASE + 18, "PI18") 3145f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI19 PINCTRL_PIN(PI_BASE + 19, "PI19") 3155f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI20 PINCTRL_PIN(PI_BASE + 20, "PI20") 3165f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI21 PINCTRL_PIN(PI_BASE + 21, "PI21") 3175f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI22 PINCTRL_PIN(PI_BASE + 22, "PI22") 3185f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI23 PINCTRL_PIN(PI_BASE + 23, "PI23") 3195f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI24 PINCTRL_PIN(PI_BASE + 24, "PI24") 3205f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI25 PINCTRL_PIN(PI_BASE + 25, "PI25") 3215f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI26 PINCTRL_PIN(PI_BASE + 26, "PI26") 3225f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI27 PINCTRL_PIN(PI_BASE + 27, "PI27") 3235f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI28 PINCTRL_PIN(PI_BASE + 28, "PI28") 3245f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI29 PINCTRL_PIN(PI_BASE + 29, "PI29") 3255f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI30 PINCTRL_PIN(PI_BASE + 30, "PI30") 3265f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PI31 PINCTRL_PIN(PI_BASE + 31, "PI31") 3275f910777SMaxime Ripard 3285f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL0 PINCTRL_PIN(PL_BASE + 0, "PL0") 3295f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL1 PINCTRL_PIN(PL_BASE + 1, "PL1") 3305f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL2 PINCTRL_PIN(PL_BASE + 2, "PL2") 3315f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL3 PINCTRL_PIN(PL_BASE + 3, "PL3") 3325f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL4 PINCTRL_PIN(PL_BASE + 4, "PL4") 3335f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL5 PINCTRL_PIN(PL_BASE + 5, "PL5") 3345f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL6 PINCTRL_PIN(PL_BASE + 6, "PL6") 3355f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL7 PINCTRL_PIN(PL_BASE + 7, "PL7") 3365f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL8 PINCTRL_PIN(PL_BASE + 8, "PL8") 3375f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL9 PINCTRL_PIN(PL_BASE + 9, "PL9") 3385f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL10 PINCTRL_PIN(PL_BASE + 10, "PL10") 3395f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL11 PINCTRL_PIN(PL_BASE + 11, "PL11") 3405f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL12 PINCTRL_PIN(PL_BASE + 12, "PL12") 3415f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL13 PINCTRL_PIN(PL_BASE + 13, "PL13") 3425f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL14 PINCTRL_PIN(PL_BASE + 14, "PL14") 3435f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL15 PINCTRL_PIN(PL_BASE + 15, "PL15") 3445f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL16 PINCTRL_PIN(PL_BASE + 16, "PL16") 3455f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL17 PINCTRL_PIN(PL_BASE + 17, "PL17") 3465f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL18 PINCTRL_PIN(PL_BASE + 18, "PL18") 3475f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL19 PINCTRL_PIN(PL_BASE + 19, "PL19") 3485f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL20 PINCTRL_PIN(PL_BASE + 20, "PL20") 3495f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL21 PINCTRL_PIN(PL_BASE + 21, "PL21") 3505f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL22 PINCTRL_PIN(PL_BASE + 22, "PL22") 3515f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL23 PINCTRL_PIN(PL_BASE + 23, "PL23") 3525f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL24 PINCTRL_PIN(PL_BASE + 24, "PL24") 3535f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL25 PINCTRL_PIN(PL_BASE + 25, "PL25") 3545f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL26 PINCTRL_PIN(PL_BASE + 26, "PL26") 3555f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL27 PINCTRL_PIN(PL_BASE + 27, "PL27") 3565f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL28 PINCTRL_PIN(PL_BASE + 28, "PL28") 3575f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL29 PINCTRL_PIN(PL_BASE + 29, "PL29") 3585f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL30 PINCTRL_PIN(PL_BASE + 30, "PL30") 3595f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PL31 PINCTRL_PIN(PL_BASE + 31, "PL31") 3605f910777SMaxime Ripard 3615f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM0 PINCTRL_PIN(PM_BASE + 0, "PM0") 3625f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM1 PINCTRL_PIN(PM_BASE + 1, "PM1") 3635f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM2 PINCTRL_PIN(PM_BASE + 2, "PM2") 3645f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM3 PINCTRL_PIN(PM_BASE + 3, "PM3") 3655f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM4 PINCTRL_PIN(PM_BASE + 4, "PM4") 3665f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM5 PINCTRL_PIN(PM_BASE + 5, "PM5") 3675f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM6 PINCTRL_PIN(PM_BASE + 6, "PM6") 3685f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM7 PINCTRL_PIN(PM_BASE + 7, "PM7") 3695f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM8 PINCTRL_PIN(PM_BASE + 8, "PM8") 3705f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM9 PINCTRL_PIN(PM_BASE + 9, "PM9") 3715f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM10 PINCTRL_PIN(PM_BASE + 10, "PM10") 3725f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM11 PINCTRL_PIN(PM_BASE + 11, "PM11") 3735f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM12 PINCTRL_PIN(PM_BASE + 12, "PM12") 3745f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM13 PINCTRL_PIN(PM_BASE + 13, "PM13") 3755f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM14 PINCTRL_PIN(PM_BASE + 14, "PM14") 3765f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM15 PINCTRL_PIN(PM_BASE + 15, "PM15") 3775f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM16 PINCTRL_PIN(PM_BASE + 16, "PM16") 3785f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM17 PINCTRL_PIN(PM_BASE + 17, "PM17") 3795f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM18 PINCTRL_PIN(PM_BASE + 18, "PM18") 3805f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM19 PINCTRL_PIN(PM_BASE + 19, "PM19") 3815f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM20 PINCTRL_PIN(PM_BASE + 20, "PM20") 3825f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM21 PINCTRL_PIN(PM_BASE + 21, "PM21") 3835f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM22 PINCTRL_PIN(PM_BASE + 22, "PM22") 3845f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM23 PINCTRL_PIN(PM_BASE + 23, "PM23") 3855f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM24 PINCTRL_PIN(PM_BASE + 24, "PM24") 3865f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM25 PINCTRL_PIN(PM_BASE + 25, "PM25") 3875f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM26 PINCTRL_PIN(PM_BASE + 26, "PM26") 3885f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM27 PINCTRL_PIN(PM_BASE + 27, "PM27") 3895f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM28 PINCTRL_PIN(PM_BASE + 28, "PM28") 3905f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM29 PINCTRL_PIN(PM_BASE + 29, "PM29") 3915f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM30 PINCTRL_PIN(PM_BASE + 30, "PM30") 3925f910777SMaxime Ripard #define SUNXI_PINCTRL_PIN_PM31 PINCTRL_PIN(PM_BASE + 31, "PM31") 3935f910777SMaxime Ripard 3945f910777SMaxime Ripard #define SUNXI_PIN_NAME_MAX_LEN 5 3955f910777SMaxime Ripard 3965f910777SMaxime Ripard #define BANK_MEM_SIZE 0x24 3975f910777SMaxime Ripard #define MUX_REGS_OFFSET 0x0 3985f910777SMaxime Ripard #define DATA_REGS_OFFSET 0x10 3995f910777SMaxime Ripard #define DLEVEL_REGS_OFFSET 0x14 4005f910777SMaxime Ripard #define PULL_REGS_OFFSET 0x1c 4015f910777SMaxime Ripard 4025f910777SMaxime Ripard #define PINS_PER_BANK 32 4035f910777SMaxime Ripard #define MUX_PINS_PER_REG 8 4045f910777SMaxime Ripard #define MUX_PINS_BITS 4 4055f910777SMaxime Ripard #define MUX_PINS_MASK 0x0f 4065f910777SMaxime Ripard #define DATA_PINS_PER_REG 32 4075f910777SMaxime Ripard #define DATA_PINS_BITS 1 4085f910777SMaxime Ripard #define DATA_PINS_MASK 0x01 4095f910777SMaxime Ripard #define DLEVEL_PINS_PER_REG 16 4105f910777SMaxime Ripard #define DLEVEL_PINS_BITS 2 4115f910777SMaxime Ripard #define DLEVEL_PINS_MASK 0x03 4125f910777SMaxime Ripard #define PULL_PINS_PER_REG 16 4135f910777SMaxime Ripard #define PULL_PINS_BITS 2 4145f910777SMaxime Ripard #define PULL_PINS_MASK 0x03 4155f910777SMaxime Ripard 4165f910777SMaxime Ripard #define SUNXI_IRQ_NUMBER 32 4175f910777SMaxime Ripard 4185f910777SMaxime Ripard #define IRQ_CFG_REG 0x200 4195f910777SMaxime Ripard #define IRQ_CFG_IRQ_PER_REG 8 4205f910777SMaxime Ripard #define IRQ_CFG_IRQ_BITS 4 4215f910777SMaxime Ripard #define IRQ_CFG_IRQ_MASK ((1 << IRQ_CFG_IRQ_BITS) - 1) 4225f910777SMaxime Ripard #define IRQ_CTRL_REG 0x210 4235f910777SMaxime Ripard #define IRQ_CTRL_IRQ_PER_REG 32 4245f910777SMaxime Ripard #define IRQ_CTRL_IRQ_BITS 1 4255f910777SMaxime Ripard #define IRQ_CTRL_IRQ_MASK ((1 << IRQ_CTRL_IRQ_BITS) - 1) 4265f910777SMaxime Ripard #define IRQ_STATUS_REG 0x214 4275f910777SMaxime Ripard #define IRQ_STATUS_IRQ_PER_REG 32 4285f910777SMaxime Ripard #define IRQ_STATUS_IRQ_BITS 1 4295f910777SMaxime Ripard #define IRQ_STATUS_IRQ_MASK ((1 << IRQ_STATUS_IRQ_BITS) - 1) 4305f910777SMaxime Ripard 4315f910777SMaxime Ripard #define IRQ_EDGE_RISING 0x00 4325f910777SMaxime Ripard #define IRQ_EDGE_FALLING 0x01 4335f910777SMaxime Ripard #define IRQ_LEVEL_HIGH 0x02 4345f910777SMaxime Ripard #define IRQ_LEVEL_LOW 0x03 4355f910777SMaxime Ripard #define IRQ_EDGE_BOTH 0x04 4365f910777SMaxime Ripard 4375f910777SMaxime Ripard struct sunxi_desc_function { 4385f910777SMaxime Ripard const char *name; 4395f910777SMaxime Ripard u8 muxval; 4405f910777SMaxime Ripard u8 irqnum; 4415f910777SMaxime Ripard }; 4425f910777SMaxime Ripard 4435f910777SMaxime Ripard struct sunxi_desc_pin { 4445f910777SMaxime Ripard struct pinctrl_pin_desc pin; 4455f910777SMaxime Ripard struct sunxi_desc_function *functions; 4465f910777SMaxime Ripard }; 4475f910777SMaxime Ripard 4485f910777SMaxime Ripard struct sunxi_pinctrl_desc { 4495f910777SMaxime Ripard const struct sunxi_desc_pin *pins; 4505f910777SMaxime Ripard int npins; 4515f910777SMaxime Ripard unsigned pin_base; 4525f910777SMaxime Ripard }; 4535f910777SMaxime Ripard 4545f910777SMaxime Ripard struct sunxi_pinctrl_function { 4555f910777SMaxime Ripard const char *name; 4565f910777SMaxime Ripard const char **groups; 4575f910777SMaxime Ripard unsigned ngroups; 4585f910777SMaxime Ripard }; 4595f910777SMaxime Ripard 4605f910777SMaxime Ripard struct sunxi_pinctrl_group { 4615f910777SMaxime Ripard const char *name; 4625f910777SMaxime Ripard unsigned long config; 4635f910777SMaxime Ripard unsigned pin; 4645f910777SMaxime Ripard }; 4655f910777SMaxime Ripard 4665f910777SMaxime Ripard struct sunxi_pinctrl { 4675f910777SMaxime Ripard void __iomem *membase; 4685f910777SMaxime Ripard struct gpio_chip *chip; 4695f910777SMaxime Ripard const struct sunxi_pinctrl_desc *desc; 4705f910777SMaxime Ripard struct device *dev; 4715f910777SMaxime Ripard struct irq_domain *domain; 4725f910777SMaxime Ripard struct sunxi_pinctrl_function *functions; 4735f910777SMaxime Ripard unsigned nfunctions; 4745f910777SMaxime Ripard struct sunxi_pinctrl_group *groups; 4755f910777SMaxime Ripard unsigned ngroups; 4765f910777SMaxime Ripard int irq; 4775f910777SMaxime Ripard int irq_array[SUNXI_IRQ_NUMBER]; 4785f910777SMaxime Ripard spinlock_t lock; 4795f910777SMaxime Ripard struct pinctrl_dev *pctl_dev; 4805f910777SMaxime Ripard }; 4815f910777SMaxime Ripard 4825f910777SMaxime Ripard #define SUNXI_PIN(_pin, ...) \ 4835f910777SMaxime Ripard { \ 4845f910777SMaxime Ripard .pin = _pin, \ 4855f910777SMaxime Ripard .functions = (struct sunxi_desc_function[]){ \ 4865f910777SMaxime Ripard __VA_ARGS__, { } }, \ 4875f910777SMaxime Ripard } 4885f910777SMaxime Ripard 4895f910777SMaxime Ripard #define SUNXI_FUNCTION(_val, _name) \ 4905f910777SMaxime Ripard { \ 4915f910777SMaxime Ripard .name = _name, \ 4925f910777SMaxime Ripard .muxval = _val, \ 4935f910777SMaxime Ripard } 4945f910777SMaxime Ripard 4955f910777SMaxime Ripard #define SUNXI_FUNCTION_IRQ(_val, _irq) \ 4965f910777SMaxime Ripard { \ 4975f910777SMaxime Ripard .name = "irq", \ 4985f910777SMaxime Ripard .muxval = _val, \ 4995f910777SMaxime Ripard .irqnum = _irq, \ 5005f910777SMaxime Ripard } 5015f910777SMaxime Ripard 5025f910777SMaxime Ripard /* 5035f910777SMaxime Ripard * The sunXi PIO registers are organized as is: 5045f910777SMaxime Ripard * 0x00 - 0x0c Muxing values. 5055f910777SMaxime Ripard * 8 pins per register, each pin having a 4bits value 5065f910777SMaxime Ripard * 0x10 Pin values 5075f910777SMaxime Ripard * 32 bits per register, each pin corresponding to one bit 5085f910777SMaxime Ripard * 0x14 - 0x18 Drive level 5095f910777SMaxime Ripard * 16 pins per register, each pin having a 2bits value 5105f910777SMaxime Ripard * 0x1c - 0x20 Pull-Up values 5115f910777SMaxime Ripard * 16 pins per register, each pin having a 2bits value 5125f910777SMaxime Ripard * 5135f910777SMaxime Ripard * This is for the first bank. Each bank will have the same layout, 5145f910777SMaxime Ripard * with an offset being a multiple of 0x24. 5155f910777SMaxime Ripard * 5165f910777SMaxime Ripard * The following functions calculate from the pin number the register 5175f910777SMaxime Ripard * and the bit offset that we should access. 5185f910777SMaxime Ripard */ 5195f910777SMaxime Ripard static inline u32 sunxi_mux_reg(u16 pin) 5205f910777SMaxime Ripard { 5215f910777SMaxime Ripard u8 bank = pin / PINS_PER_BANK; 5225f910777SMaxime Ripard u32 offset = bank * BANK_MEM_SIZE; 5235f910777SMaxime Ripard offset += MUX_REGS_OFFSET; 5245f910777SMaxime Ripard offset += pin % PINS_PER_BANK / MUX_PINS_PER_REG * 0x04; 5255f910777SMaxime Ripard return round_down(offset, 4); 5265f910777SMaxime Ripard } 5275f910777SMaxime Ripard 5285f910777SMaxime Ripard static inline u32 sunxi_mux_offset(u16 pin) 5295f910777SMaxime Ripard { 5305f910777SMaxime Ripard u32 pin_num = pin % MUX_PINS_PER_REG; 5315f910777SMaxime Ripard return pin_num * MUX_PINS_BITS; 5325f910777SMaxime Ripard } 5335f910777SMaxime Ripard 5345f910777SMaxime Ripard static inline u32 sunxi_data_reg(u16 pin) 5355f910777SMaxime Ripard { 5365f910777SMaxime Ripard u8 bank = pin / PINS_PER_BANK; 5375f910777SMaxime Ripard u32 offset = bank * BANK_MEM_SIZE; 5385f910777SMaxime Ripard offset += DATA_REGS_OFFSET; 5395f910777SMaxime Ripard offset += pin % PINS_PER_BANK / DATA_PINS_PER_REG * 0x04; 5405f910777SMaxime Ripard return round_down(offset, 4); 5415f910777SMaxime Ripard } 5425f910777SMaxime Ripard 5435f910777SMaxime Ripard static inline u32 sunxi_data_offset(u16 pin) 5445f910777SMaxime Ripard { 5455f910777SMaxime Ripard u32 pin_num = pin % DATA_PINS_PER_REG; 5465f910777SMaxime Ripard return pin_num * DATA_PINS_BITS; 5475f910777SMaxime Ripard } 5485f910777SMaxime Ripard 5495f910777SMaxime Ripard static inline u32 sunxi_dlevel_reg(u16 pin) 5505f910777SMaxime Ripard { 5515f910777SMaxime Ripard u8 bank = pin / PINS_PER_BANK; 5525f910777SMaxime Ripard u32 offset = bank * BANK_MEM_SIZE; 5535f910777SMaxime Ripard offset += DLEVEL_REGS_OFFSET; 5545f910777SMaxime Ripard offset += pin % PINS_PER_BANK / DLEVEL_PINS_PER_REG * 0x04; 5555f910777SMaxime Ripard return round_down(offset, 4); 5565f910777SMaxime Ripard } 5575f910777SMaxime Ripard 5585f910777SMaxime Ripard static inline u32 sunxi_dlevel_offset(u16 pin) 5595f910777SMaxime Ripard { 5605f910777SMaxime Ripard u32 pin_num = pin % DLEVEL_PINS_PER_REG; 5615f910777SMaxime Ripard return pin_num * DLEVEL_PINS_BITS; 5625f910777SMaxime Ripard } 5635f910777SMaxime Ripard 5645f910777SMaxime Ripard static inline u32 sunxi_pull_reg(u16 pin) 5655f910777SMaxime Ripard { 5665f910777SMaxime Ripard u8 bank = pin / PINS_PER_BANK; 5675f910777SMaxime Ripard u32 offset = bank * BANK_MEM_SIZE; 5685f910777SMaxime Ripard offset += PULL_REGS_OFFSET; 5695f910777SMaxime Ripard offset += pin % PINS_PER_BANK / PULL_PINS_PER_REG * 0x04; 5705f910777SMaxime Ripard return round_down(offset, 4); 5715f910777SMaxime Ripard } 5725f910777SMaxime Ripard 5735f910777SMaxime Ripard static inline u32 sunxi_pull_offset(u16 pin) 5745f910777SMaxime Ripard { 5755f910777SMaxime Ripard u32 pin_num = pin % PULL_PINS_PER_REG; 5765f910777SMaxime Ripard return pin_num * PULL_PINS_BITS; 5775f910777SMaxime Ripard } 5785f910777SMaxime Ripard 5795f910777SMaxime Ripard static inline u32 sunxi_irq_cfg_reg(u16 irq) 5805f910777SMaxime Ripard { 5815f910777SMaxime Ripard u8 reg = irq / IRQ_CFG_IRQ_PER_REG * 0x04; 5825f910777SMaxime Ripard return reg + IRQ_CFG_REG; 5835f910777SMaxime Ripard } 5845f910777SMaxime Ripard 5855f910777SMaxime Ripard static inline u32 sunxi_irq_cfg_offset(u16 irq) 5865f910777SMaxime Ripard { 5875f910777SMaxime Ripard u32 irq_num = irq % IRQ_CFG_IRQ_PER_REG; 5885f910777SMaxime Ripard return irq_num * IRQ_CFG_IRQ_BITS; 5895f910777SMaxime Ripard } 5905f910777SMaxime Ripard 5915f910777SMaxime Ripard static inline u32 sunxi_irq_ctrl_reg(u16 irq) 5925f910777SMaxime Ripard { 5935f910777SMaxime Ripard u8 reg = irq / IRQ_CTRL_IRQ_PER_REG * 0x04; 5945f910777SMaxime Ripard return reg + IRQ_CTRL_REG; 5955f910777SMaxime Ripard } 5965f910777SMaxime Ripard 5975f910777SMaxime Ripard static inline u32 sunxi_irq_ctrl_offset(u16 irq) 5985f910777SMaxime Ripard { 5995f910777SMaxime Ripard u32 irq_num = irq % IRQ_CTRL_IRQ_PER_REG; 6005f910777SMaxime Ripard return irq_num * IRQ_CTRL_IRQ_BITS; 6015f910777SMaxime Ripard } 6025f910777SMaxime Ripard 6035f910777SMaxime Ripard static inline u32 sunxi_irq_status_reg(u16 irq) 6045f910777SMaxime Ripard { 6055f910777SMaxime Ripard u8 reg = irq / IRQ_STATUS_IRQ_PER_REG * 0x04; 6065f910777SMaxime Ripard return reg + IRQ_STATUS_REG; 6075f910777SMaxime Ripard } 6085f910777SMaxime Ripard 6095f910777SMaxime Ripard static inline u32 sunxi_irq_status_offset(u16 irq) 6105f910777SMaxime Ripard { 6115f910777SMaxime Ripard u32 irq_num = irq % IRQ_STATUS_IRQ_PER_REG; 6125f910777SMaxime Ripard return irq_num * IRQ_STATUS_IRQ_BITS; 6135f910777SMaxime Ripard } 6145f910777SMaxime Ripard 6155f910777SMaxime Ripard #endif /* __PINCTRL_SUNXI_H */ 616