1 /* 2 * Allwinner A80 SoCs special pins pinctrl driver. 3 * 4 * Copyright (C) 2014 Maxime Ripard 5 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * 7 * This file is licensed under the terms of the GNU General Public 8 * License version 2. This program is licensed "as is" without any 9 * warranty of any kind, whether express or implied. 10 */ 11 12 #include <linux/init.h> 13 #include <linux/platform_device.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include <linux/pinctrl/pinctrl.h> 17 18 #include "pinctrl-sunxi.h" 19 20 static const struct sunxi_desc_pin sun9i_a80_r_pins[] = { 21 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), 22 SUNXI_FUNCTION(0x0, "gpio_in"), 23 SUNXI_FUNCTION(0x1, "gpio_out"), 24 SUNXI_FUNCTION(0x3, "s_uart"), /* TX */ 25 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ 26 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), 27 SUNXI_FUNCTION(0x0, "gpio_in"), 28 SUNXI_FUNCTION(0x1, "gpio_out"), 29 SUNXI_FUNCTION(0x3, "s_uart"), /* RX */ 30 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ 31 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), 32 SUNXI_FUNCTION(0x0, "gpio_in"), 33 SUNXI_FUNCTION(0x1, "gpio_out"), 34 SUNXI_FUNCTION(0x3, "s_jtag"), /* TMS */ 35 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */ 36 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), 37 SUNXI_FUNCTION(0x0, "gpio_in"), 38 SUNXI_FUNCTION(0x1, "gpio_out"), 39 SUNXI_FUNCTION(0x3, "s_jtag"), /* TCK */ 40 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */ 41 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), 42 SUNXI_FUNCTION(0x0, "gpio_in"), 43 SUNXI_FUNCTION(0x1, "gpio_out"), 44 SUNXI_FUNCTION(0x3, "s_jtag"), /* TDO */ 45 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */ 46 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), 47 SUNXI_FUNCTION(0x0, "gpio_in"), 48 SUNXI_FUNCTION(0x1, "gpio_out"), 49 SUNXI_FUNCTION(0x3, "s_jtag"), /* TDI */ 50 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */ 51 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), 52 SUNXI_FUNCTION(0x0, "gpio_in"), 53 SUNXI_FUNCTION(0x1, "gpio_out"), 54 SUNXI_FUNCTION(0x3, "s_cir_rx"), 55 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */ 56 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), 57 SUNXI_FUNCTION(0x0, "gpio_in"), 58 SUNXI_FUNCTION(0x1, "gpio_out"), 59 SUNXI_FUNCTION(0x3, "1wire"), 60 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */ 61 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), 62 SUNXI_FUNCTION(0x0, "gpio_in"), 63 SUNXI_FUNCTION(0x1, "gpio_out"), 64 SUNXI_FUNCTION(0x2, "s_ps2"), /* SCK1 */ 65 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */ 66 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9), 67 SUNXI_FUNCTION(0x0, "gpio_in"), 68 SUNXI_FUNCTION(0x1, "gpio_out"), 69 SUNXI_FUNCTION(0x2, "s_ps2"), /* SDA1 */ 70 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */ 71 72 /* Hole */ 73 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), 74 SUNXI_FUNCTION(0x0, "gpio_in"), 75 SUNXI_FUNCTION(0x1, "gpio_out"), 76 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */ 77 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), 78 SUNXI_FUNCTION(0x0, "gpio_in"), 79 SUNXI_FUNCTION(0x1, "gpio_out"), 80 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */ 81 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), 82 SUNXI_FUNCTION(0x0, "gpio_in"), 83 SUNXI_FUNCTION(0x1, "gpio_out"), 84 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PM_EINT2 */ 85 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), 86 SUNXI_FUNCTION(0x0, "gpio_in"), 87 SUNXI_FUNCTION(0x1, "gpio_out"), 88 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */ 89 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), 90 SUNXI_FUNCTION(0x0, "gpio_in"), 91 SUNXI_FUNCTION(0x1, "gpio_out"), 92 SUNXI_FUNCTION(0x3, "s_i2s1"), /* LRCKR */ 93 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */ 94 95 /* Hole */ 96 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 8), 97 SUNXI_FUNCTION(0x0, "gpio_in"), 98 SUNXI_FUNCTION(0x1, "gpio_out"), 99 SUNXI_FUNCTION(0x3, "s_i2c1"), /* SCK */ 100 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PM_EINT8 */ 101 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 9), 102 SUNXI_FUNCTION(0x0, "gpio_in"), 103 SUNXI_FUNCTION(0x1, "gpio_out"), 104 SUNXI_FUNCTION(0x3, "s_i2c1"), /* SDA */ 105 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PM_EINT9 */ 106 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 10), 107 SUNXI_FUNCTION(0x0, "gpio_in"), 108 SUNXI_FUNCTION(0x1, "gpio_out"), 109 SUNXI_FUNCTION(0x2, "s_i2s0"), /* MCLK */ 110 SUNXI_FUNCTION(0x3, "s_i2s1")), /* MCLK */ 111 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 11), 112 SUNXI_FUNCTION(0x0, "gpio_in"), 113 SUNXI_FUNCTION(0x1, "gpio_out"), 114 SUNXI_FUNCTION(0x2, "s_i2s0"), /* BCLK */ 115 SUNXI_FUNCTION(0x3, "s_i2s1")), /* BCLK */ 116 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 12), 117 SUNXI_FUNCTION(0x0, "gpio_in"), 118 SUNXI_FUNCTION(0x1, "gpio_out"), 119 SUNXI_FUNCTION(0x2, "s_i2s0"), /* LRCK */ 120 SUNXI_FUNCTION(0x3, "s_i2s1")), /* LRCK */ 121 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 13), 122 SUNXI_FUNCTION(0x0, "gpio_in"), 123 SUNXI_FUNCTION(0x1, "gpio_out"), 124 SUNXI_FUNCTION(0x2, "s_i2s0"), /* DIN */ 125 SUNXI_FUNCTION(0x3, "s_i2s1")), /* DIN */ 126 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 14), 127 SUNXI_FUNCTION(0x0, "gpio_in"), 128 SUNXI_FUNCTION(0x1, "gpio_out"), 129 SUNXI_FUNCTION(0x2, "s_i2s0"), /* DOUT */ 130 SUNXI_FUNCTION(0x3, "s_i2s1")), /* DOUT */ 131 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 15), 132 SUNXI_FUNCTION(0x0, "gpio_in"), 133 SUNXI_FUNCTION(0x1, "gpio_out"), 134 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)), /* PM_EINT15 */ 135 136 /* Hole */ 137 SUNXI_PIN(SUNXI_PINCTRL_PIN(N, 0), 138 SUNXI_FUNCTION(0x0, "gpio_in"), 139 SUNXI_FUNCTION(0x1, "gpio_out"), 140 SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */ 141 SUNXI_FUNCTION(0x3, "s_rsb")), /* SCK */ 142 SUNXI_PIN(SUNXI_PINCTRL_PIN(N, 1), 143 SUNXI_FUNCTION(0x0, "gpio_in"), 144 SUNXI_FUNCTION(0x1, "gpio_out"), 145 SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */ 146 SUNXI_FUNCTION(0x3, "s_rsb")), /* SDA */ 147 }; 148 149 static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_data = { 150 .pins = sun9i_a80_r_pins, 151 .npins = ARRAY_SIZE(sun9i_a80_r_pins), 152 .pin_base = PL_BASE, 153 .irq_banks = 2, 154 .disable_strict_mode = true, 155 .io_bias_cfg_variant = BIAS_VOLTAGE_GRP_CONFIG, 156 }; 157 158 static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev) 159 { 160 return sunxi_pinctrl_init(pdev, 161 &sun9i_a80_r_pinctrl_data); 162 } 163 164 static const struct of_device_id sun9i_a80_r_pinctrl_match[] = { 165 { .compatible = "allwinner,sun9i-a80-r-pinctrl", }, 166 {} 167 }; 168 169 static struct platform_driver sun9i_a80_r_pinctrl_driver = { 170 .probe = sun9i_a80_r_pinctrl_probe, 171 .driver = { 172 .name = "sun9i-a80-r-pinctrl", 173 .owner = THIS_MODULE, 174 .of_match_table = sun9i_a80_r_pinctrl_match, 175 }, 176 }; 177 builtin_platform_driver(sun9i_a80_r_pinctrl_driver); 178