14730f33fSVishnu Patekar /* 24730f33fSVishnu Patekar * Allwinner a83t SoCs pinctrl driver. 34730f33fSVishnu Patekar * 44730f33fSVishnu Patekar * Copyright (C) 2015 Vishnu Patekar <vishnupatekar0510@gmail.com> 54730f33fSVishnu Patekar * 64730f33fSVishnu Patekar * Based on pinctrl-sun8i-a23.c, which is: 74730f33fSVishnu Patekar * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org> 84730f33fSVishnu Patekar * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com> 94730f33fSVishnu Patekar * 104730f33fSVishnu Patekar * This file is licensed under the terms of the GNU General Public 114730f33fSVishnu Patekar * License version 2. This program is licensed "as is" without any 124730f33fSVishnu Patekar * warranty of any kind, whether express or implied. 134730f33fSVishnu Patekar */ 144730f33fSVishnu Patekar 150c8c6ba0SPaul Gortmaker #include <linux/init.h> 164730f33fSVishnu Patekar #include <linux/platform_device.h> 174730f33fSVishnu Patekar #include <linux/of.h> 184730f33fSVishnu Patekar #include <linux/of_device.h> 194730f33fSVishnu Patekar #include <linux/pinctrl/pinctrl.h> 204730f33fSVishnu Patekar 214730f33fSVishnu Patekar #include "pinctrl-sunxi.h" 224730f33fSVishnu Patekar 234730f33fSVishnu Patekar static const struct sunxi_desc_pin sun8i_a83t_pins[] = { 244730f33fSVishnu Patekar /* Hole */ 254730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), 264730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 274730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 284730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* TX */ 294730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */ 304730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */ 314730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), 324730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 334730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 344730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* RX */ 354730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */ 364730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PB_EINT1 */ 374730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), 384730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 394730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 404730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ 414730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */ 424730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PB_EINT2 */ 434730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), 444730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 454730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 464730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ 474730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */ 484730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PB_EINT3 */ 494730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), 504730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 514730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 524730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */ 534730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* LRCK */ 544730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PB_EINT4 */ 554730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), 564730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 574730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 584730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */ 594730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* BCLK */ 604730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PB_EINT5 */ 614730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), 624730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 634730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 644730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */ 654730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* DOUT */ 664730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PB_EINT6 */ 674730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), 684730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 694730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 704730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */ 714730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* DIN */ 724730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PB_EINT7 */ 734730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), 744730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 754730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 764730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */ 774730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* MCLK */ 784730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PB_EINT8 */ 794730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), 804730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 814730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 824730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart0"), /* TX */ 834730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PB_EINT9 */ 844730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), 854730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 864730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 874730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart0"), /* RX */ 884730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PB_EINT10 */ 894730f33fSVishnu Patekar /* Hole */ 904730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), 914730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 924730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 934730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* WE */ 944730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ 954730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), 964730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 974730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 984730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* ALE */ 994730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ 1004730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), 1014730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1024730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1034730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* CLE */ 1044730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ 1054730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), 1064730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1074730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1084730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */ 1094730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* CS */ 1104730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), 1114730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1124730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1134730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */ 1144730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), 1154730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1164730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1174730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* RE */ 1184730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ 1194730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), 1204730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1214730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1224730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */ 1234730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ 1244730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), 1254730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1264730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1274730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */ 1284730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), 1294730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1304730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1314730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */ 1324730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ 1334730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), 1344730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1354730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1364730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */ 1374730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ 1384730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), 1394730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1404730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1414730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */ 1424730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ 1434730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), 1444730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1454730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1464730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */ 1474730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ 1484730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), 1494730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1504730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1514730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */ 1524730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ 1534730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), 1544730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1554730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1564730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */ 1574730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ 1584730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), 1594730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1604730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1614730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand"), /* DQ6 */ 1624730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ 1634730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), 1644730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1654730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1664730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand"), /* DQ7 */ 1674730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ 1684730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), 1694730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1704730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1714730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand"), /* DQS */ 1724730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ 1734730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17), 1744730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1754730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1764730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand")), /* CE2 */ 1774730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18), 1784730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1794730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1804730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand")), /* CE3 */ 1814730f33fSVishnu Patekar /* Hole */ 1824730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), 1834730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1844730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1854730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ 1864730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD3 */ 1874730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), 1884730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1894730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1904730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ 1914730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD2 */ 1924730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), 1934730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1944730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 1954730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ 1964730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD1 */ 1974730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), 1984730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 1994730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2004730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ 2014730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD0 */ 2024730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), 2034730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2044730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2054730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ 2064730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXCK */ 2074730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), 2084730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2094730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2104730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ 2114730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXDV */ 2124730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), 2134730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2144730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2154730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ 2164730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXERR */ 2174730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), 2184730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2194730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2204730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ 2214730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD3 */ 2224730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), 2234730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2244730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2254730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ 2264730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD2 */ 2274730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), 2284730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2294730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2304730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ 2314730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD1 */ 2324730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), 2334730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2344730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2354730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ 2364730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD0 */ 2374730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), 2384730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2394730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2404730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ 2414730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII-NULL / MII-CRS */ 2424730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), 2434730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2444730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2454730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ 2464730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */ 2474730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GTXCK / ETXCK */ 2484730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), 2494730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2504730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2514730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ 2524730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */ 2534730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GTXCTL / ETXEL */ 2544730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), 2554730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2564730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2574730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ 2584730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */ 2594730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GNULL / ETXERR */ 2604730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), 2614730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2624730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2634730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ 2644730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */ 2654730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GCLKIN / ECOL */ 2664730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), 2674730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2684730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2694730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ 2704730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */ 2714730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GMDC */ 2724730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), 2734730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2744730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2754730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ 2764730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */ 2774730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GMDIO */ 2784730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), 2794730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2804730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2814730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ 2824730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ 2834730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), 2844730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2854730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2864730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ 2874730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ 2884730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), 2894730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2904730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2914730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ 2924730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ 2934730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), 2944730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 2954730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 2964730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ 2974730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */ 2984730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28), 2994730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3004730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3014730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "pwm")), /* PWM */ 3024730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 29), 3034730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3044730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")), 3054730f33fSVishnu Patekar /* Hole */ 3064730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), 3074730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3084730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3094730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* PCLK */ 3104730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* CLK */ 3114730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), 3124730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3134730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3144730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* MCLK */ 3154730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* DE */ 3164730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), 3174730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3184730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3194730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */ 3204730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* HSYNC */ 3214730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), 3224730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3234730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3244730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */ 3254730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* VSYNC */ 3264730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), 3274730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3284730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3294730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi")), /* D0 */ 3304730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), 3314730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3324730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3334730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi")), /* D1 */ 3344730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), 3354730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3364730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3374730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D2 */ 3384730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D0 */ 3394730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), 3404730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3414730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3424730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D3 */ 3434730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D1 */ 3444730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), 3454730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3464730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3474730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D4 */ 3484730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D2 */ 3494730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), 3504730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3514730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3524730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D5 */ 3534730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D3 */ 3544730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), 3554730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3564730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3574730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D6 */ 3584730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* TX */ 3594730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D4 */ 3604730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), 3614730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3624730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3634730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D7 */ 3644730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* RX */ 3654730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D5 */ 3664730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), 3674730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3684730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3694730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D8 */ 3704730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* RTS */ 3714730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D6 */ 3724730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), 3734730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3744730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3754730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D9 */ 3764730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* CTS */ 3774730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D7 */ 3784730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), 3794730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3804730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3814730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* SCK */ 3824730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */ 3834730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), 3844730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3854730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3864730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* SDA */ 3874730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */ 3884730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), 3894730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3904730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")), 3914730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), 3924730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3934730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")), 3944730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18), 3954730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 3964730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 3974730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "owa")), /* DOUT */ 3984730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19), 3994730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4004730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")), 4014730f33fSVishnu Patekar /* Hole */ 4024730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), 4034730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4044730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4054730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ 4064730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* MS1 */ 4074730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), 4084730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4094730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4104730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ 4114730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */ 4124730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), 4134730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4144730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4154730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ 4164730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart0")), /* TX */ 4174730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), 4184730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4194730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4204730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ 4214730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */ 4224730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), 4234730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4244730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4254730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ 4264730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart0")), /* RX */ 4274730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), 4284730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4294730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4304730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ 4314730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */ 4324730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), 4334730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4344730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")), 4354730f33fSVishnu Patekar /* Hole */ 4364730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), 4374730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4384730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4394730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ 4404730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PG_EINT0 */ 4414730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), 4424730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4434730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4444730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ 4454730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PG_EINT1 */ 4464730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), 4474730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4484730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4494730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ 4504730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PG_EINT2 */ 4514730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), 4524730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4534730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4544730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ 4554730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PG_EINT3 */ 4564730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), 4574730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4584730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4594730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ 4604730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PG_EINT4 */ 4614730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), 4624730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4634730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4644730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ 4654730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PG_EINT5 */ 4664730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), 4674730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4684730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4694730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* TX */ 4704730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* CS */ 4714730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PG_EINT6 */ 4724730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), 4734730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4744730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4754730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* RX */ 4764730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ 4774730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PG_EINT7 */ 4784730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), 4794730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4804730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4814730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ 4824730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ 4834730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PG_EINT8 */ 4844730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), 4854730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4864730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4874730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ 4884730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ 4894730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PG_EINT9 */ 4904730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), 4914730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4924730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4934730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* BCLK */ 4944730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* TX */ 4954730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */ 4964730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), 4974730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 4984730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 4994730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* LRCK */ 5004730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* RX */ 5014730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */ 5024730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), 5034730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5044730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5054730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */ 5064730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* RTS */ 5074730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */ 5084730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), 5094730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5104730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5114730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */ 5124730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* CTS */ 5134730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */ 5144730f33fSVishnu Patekar /* Hole */ 5154730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), 5164730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5174730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5184730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ 5194730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PH_EINT0 */ 5204730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), 5214730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5224730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5234730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ 5244730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT1 */ 5254730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), 5264730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5274730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5284730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ 5294730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PH_EINT2 */ 5304730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), 5314730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5324730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5334730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ 5344730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PH_EINT3 */ 5354730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), 5364730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5374730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5384730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */ 5394730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PH_EINT4 */ 5404730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), 5414730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5424730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5434730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */ 5444730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PH_EINT5 */ 5454730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), 5464730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5474730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5484730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HSCL */ 5494730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PH_EINT6 */ 5504730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), 5514730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5524730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5534730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HSDA */ 5544730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PH_EINT7 */ 5554730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), 5564730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5574730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5584730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HCEC */ 5594730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PH_EINT8 */ 5604730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), 5614730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5624730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5634730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PH_EINT9 */ 5644730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), 5654730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5664730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5674730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PH_EINT10 */ 5684730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), 5694730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"), 5704730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"), 5714730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT11 */ 5724730f33fSVishnu Patekar }; 5734730f33fSVishnu Patekar 5744730f33fSVishnu Patekar static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = { 5754730f33fSVishnu Patekar .pins = sun8i_a83t_pins, 5764730f33fSVishnu Patekar .npins = ARRAY_SIZE(sun8i_a83t_pins), 5774730f33fSVishnu Patekar .irq_banks = 3, 5784730f33fSVishnu Patekar }; 5794730f33fSVishnu Patekar 5804730f33fSVishnu Patekar static int sun8i_a83t_pinctrl_probe(struct platform_device *pdev) 5814730f33fSVishnu Patekar { 5824730f33fSVishnu Patekar return sunxi_pinctrl_init(pdev, 5834730f33fSVishnu Patekar &sun8i_a83t_pinctrl_data); 5844730f33fSVishnu Patekar } 5854730f33fSVishnu Patekar 5864730f33fSVishnu Patekar static const struct of_device_id sun8i_a83t_pinctrl_match[] = { 5874730f33fSVishnu Patekar { .compatible = "allwinner,sun8i-a83t-pinctrl", }, 5884730f33fSVishnu Patekar {} 5894730f33fSVishnu Patekar }; 5904730f33fSVishnu Patekar 5914730f33fSVishnu Patekar static struct platform_driver sun8i_a83t_pinctrl_driver = { 5924730f33fSVishnu Patekar .probe = sun8i_a83t_pinctrl_probe, 5934730f33fSVishnu Patekar .driver = { 5944730f33fSVishnu Patekar .name = "sun8i-a83t-pinctrl", 5954730f33fSVishnu Patekar .of_match_table = sun8i_a83t_pinctrl_match, 5964730f33fSVishnu Patekar }, 5974730f33fSVishnu Patekar }; 5980c8c6ba0SPaul Gortmaker builtin_platform_driver(sun8i_a83t_pinctrl_driver); 599