14730f33fSVishnu Patekar /*
24730f33fSVishnu Patekar * Allwinner a83t SoCs pinctrl driver.
34730f33fSVishnu Patekar *
44730f33fSVishnu Patekar * Copyright (C) 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
54730f33fSVishnu Patekar *
64730f33fSVishnu Patekar * Based on pinctrl-sun8i-a23.c, which is:
74730f33fSVishnu Patekar * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
84730f33fSVishnu Patekar * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
94730f33fSVishnu Patekar *
104730f33fSVishnu Patekar * This file is licensed under the terms of the GNU General Public
114730f33fSVishnu Patekar * License version 2. This program is licensed "as is" without any
124730f33fSVishnu Patekar * warranty of any kind, whether express or implied.
134730f33fSVishnu Patekar */
144730f33fSVishnu Patekar
150c8c6ba0SPaul Gortmaker #include <linux/init.h>
164730f33fSVishnu Patekar #include <linux/platform_device.h>
174730f33fSVishnu Patekar #include <linux/of.h>
184730f33fSVishnu Patekar #include <linux/pinctrl/pinctrl.h>
194730f33fSVishnu Patekar
204730f33fSVishnu Patekar #include "pinctrl-sunxi.h"
214730f33fSVishnu Patekar
224730f33fSVishnu Patekar static const struct sunxi_desc_pin sun8i_a83t_pins[] = {
234730f33fSVishnu Patekar /* Hole */
244730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
254730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
264730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
274730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* TX */
284730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
294730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PB_EINT0 */
304730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
314730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
324730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
334730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* RX */
344730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
354730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PB_EINT1 */
364730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
374730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
384730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
394730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
404730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
414730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PB_EINT2 */
424730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
434730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
444730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
454730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
464730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
474730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PB_EINT3 */
484730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
494730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
504730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
514730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
524730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* LRCK */
534730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PB_EINT4 */
544730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
554730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
564730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
574730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
584730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* BCLK */
594730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PB_EINT5 */
604730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
614730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
624730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
634730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
644730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* DOUT */
654730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PB_EINT6 */
664730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
674730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
684730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
694730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
704730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* DIN */
714730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PB_EINT7 */
724730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
734730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
744730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
754730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
764730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "tdm"), /* MCLK */
774730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PB_EINT8 */
784730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
794730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
804730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
814730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart0"), /* TX */
824730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PB_EINT9 */
834730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
844730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
854730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
864730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart0"), /* RX */
874730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PB_EINT10 */
884730f33fSVishnu Patekar /* Hole */
894730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
904730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
914730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
924730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* WE */
934730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
944730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
954730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
964730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
974730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
984730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
994730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
1004730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1014730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1024730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
1034730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
1044730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
1054730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1064730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1074730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
1084730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi0")), /* CS */
1094730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
1104730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1114730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1124730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
1134730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
1144730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1154730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1164730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* RE */
1174730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
1184730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
1194730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1204730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1214730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
1224730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
1234730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
1244730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1254730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1264730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */
1274730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
1284730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1294730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1304730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
1314730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
1324730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
1334730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1344730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1354730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
1364730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
1374730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
1384730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1394730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1404730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
1414730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
1424730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
1434730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1444730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1454730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
1464730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
1474730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
1484730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1494730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1504730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
1514730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
1524730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
1534730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1544730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1554730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
1564730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
1574730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
1584730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1594730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
160*aaefa292SSamuel Holland SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
1614730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
1624730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
1634730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1644730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
165*aaefa292SSamuel Holland SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
1664730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
1674730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
1684730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1694730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
170*aaefa292SSamuel Holland SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
1714730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
1724730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
1734730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1744730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
175*aaefa292SSamuel Holland SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
1764730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
1774730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1784730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
179*aaefa292SSamuel Holland SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
1804730f33fSVishnu Patekar /* Hole */
1814730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
1824730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1834730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1844730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
1854730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD3 */
1864730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
1874730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1884730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1894730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
1904730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD2 */
1914730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
1924730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1934730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1944730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
1954730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD1 */
1964730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
1974730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
1984730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
1994730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
2004730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD0 */
2014730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
2024730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2034730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2044730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
2054730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXCK */
2064730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
2074730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2084730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2094730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
2104730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXDV */
2114730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
2124730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2134730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2144730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
2154730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXERR */
2164730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
2174730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2184730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2194730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
2204730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD3 */
2214730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
2224730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2234730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2244730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
2254730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD2 */
2264730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
2274730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2284730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2294730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
2304730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD1 */
2314730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
2324730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2334730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2344730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
2354730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD0 */
2364730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
2374730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2384730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2394730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
2404730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* RGMII-NULL / MII-CRS */
2414730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
2424730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2434730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2444730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
2454730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */
2464730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GTXCK / ETXCK */
2474730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
2484730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2494730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2504730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
2514730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */
2524730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GTXCTL / ETXEL */
2534730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
2544730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2554730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2564730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
2574730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */
2584730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GNULL / ETXERR */
2594730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
2604730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2614730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2624730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
2634730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */
2644730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GCLKIN / ECOL */
2654730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
2664730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2674730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2684730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
2694730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */
2704730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GMDC */
2714730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
2724730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2734730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2744730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
2754730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */
2764730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "gmac")), /* GMDIO */
2774730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
2784730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2794730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2804730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
2814730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
2824730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
2834730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2844730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2854730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
2864730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
2874730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
2884730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2894730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2904730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
2914730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
2924730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
2934730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2944730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
2954730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
2964730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
2974730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 28),
2984730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
2994730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3004730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "pwm")), /* PWM */
3014730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 29),
3024730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3034730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")),
3044730f33fSVishnu Patekar /* Hole */
3054730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
3064730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3074730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3084730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
3094730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* CLK */
3104730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
3114730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3124730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3134730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
3144730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* DE */
3154730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
3164730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3174730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3184730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
3194730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* HSYNC */
3204730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
3214730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3224730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3234730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
3244730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* VSYNC */
3254730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
3264730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3274730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3284730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi")), /* D0 */
3294730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
3304730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3314730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3324730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi")), /* D1 */
3334730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
3344730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3354730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3364730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D2 */
3374730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D0 */
3384730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
3394730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3404730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3414730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D3 */
3424730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D1 */
3434730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
3444730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3454730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3464730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D4 */
3474730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D2 */
3484730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
3494730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3504730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3514730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D5 */
3524730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D3 */
3534730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
3544730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3554730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3564730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D6 */
3574730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* TX */
3584730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D4 */
3594730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
3604730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3614730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3624730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D7 */
3634730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* RX */
3644730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D5 */
3654730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
3664730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3674730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3684730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D8 */
3694730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* RTS */
3704730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D6 */
3714730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
3724730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3734730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3744730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* D9 */
3754730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart4"), /* CTS */
3764730f33fSVishnu Patekar SUNXI_FUNCTION(0x4, "ccir")), /* D7 */
3774730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
3784730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3794730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3804730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* SCK */
3814730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */
3824730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
3834730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3844730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3854730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "csi"), /* SDA */
3864730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */
3874730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
3884730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3894730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")),
3904730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17),
3914730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3924730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")),
3934730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 18),
3944730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3954730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
3967903d4f5SChen-Yu Tsai SUNXI_FUNCTION(0x3, "spdif")), /* DOUT */
3974730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 19),
3984730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
3994730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")),
4004730f33fSVishnu Patekar /* Hole */
4014730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
4024730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4034730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4044730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
4054730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* MS1 */
4064730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
4074730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4084730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4094730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
4104730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */
4114730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
4124730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4134730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4144730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
4154730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart0")), /* TX */
4164730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
4174730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4184730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4194730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
4204730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */
4214730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
4224730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4234730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4244730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
4254730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart0")), /* RX */
4264730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
4274730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4284730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4294730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
4304730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */
4314730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
4324730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4334730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out")),
4344730f33fSVishnu Patekar /* Hole */
4354730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
4364730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4374730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4384730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
4394730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PG_EINT0 */
4404730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
4414730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4424730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4434730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
4444730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PG_EINT1 */
4454730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
4464730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4474730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4484730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
4494730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PG_EINT2 */
4504730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
4514730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4524730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4534730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
4544730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PG_EINT3 */
4554730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
4564730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4574730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4584730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
4594730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PG_EINT4 */
4604730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
4614730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4624730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4634730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
4644730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PG_EINT5 */
4654730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
4664730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4674730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4684730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* TX */
4694730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* CS */
4704730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PG_EINT6 */
4714730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
4724730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4734730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4744730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* RX */
4754730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
4764730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PG_EINT7 */
4774730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
4784730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4794730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4804730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
4814730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
4824730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PG_EINT8 */
4834730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
4844730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4854730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4864730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
4874730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
4884730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PG_EINT9 */
4894730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
4904730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4914730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4924730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* BCLK */
4934730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* TX */
4944730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */
4954730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
4964730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
4974730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
4984730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* LRCK */
4994730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* RX */
5004730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */
5014730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
5024730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5034730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5044730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */
5054730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
5064730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */
5074730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
5084730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5094730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5104730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */
5114730f33fSVishnu Patekar SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
5124730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */
5134730f33fSVishnu Patekar /* Hole */
5144730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
5154730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5164730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5174730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
5184730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* PH_EINT0 */
5194730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
5204730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5214730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5224730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
5234730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* PH_EINT1 */
5244730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
5254730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5264730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5274730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
5284730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* PH_EINT2 */
5294730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
5304730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5314730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5324730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
5334730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* PH_EINT3 */
5344730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
5354730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5364730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5374730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
5384730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* PH_EINT4 */
5394730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
5404730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5414730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5424730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
5434730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* PH_EINT5 */
5444730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
5454730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5464730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5474730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HSCL */
5484730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* PH_EINT6 */
5494730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
5504730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5514730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5524730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HSDA */
5534730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* PH_EINT7 */
5544730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
5554730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5564730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5574730f33fSVishnu Patekar SUNXI_FUNCTION(0x2, "hdmi"), /* HCEC */
5584730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* PH_EINT8 */
5594730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
5604730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5614730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5624730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* PH_EINT9 */
5634730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
5644730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5654730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
5664730f33fSVishnu Patekar SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* PH_EINT10 */
5674730f33fSVishnu Patekar SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
5684730f33fSVishnu Patekar SUNXI_FUNCTION(0x0, "gpio_in"),
5694730f33fSVishnu Patekar SUNXI_FUNCTION(0x1, "gpio_out"),
570478b6767SChen-Yu Tsai SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* PH_EINT11 */
5714730f33fSVishnu Patekar };
5724730f33fSVishnu Patekar
5734730f33fSVishnu Patekar static const struct sunxi_pinctrl_desc sun8i_a83t_pinctrl_data = {
5744730f33fSVishnu Patekar .pins = sun8i_a83t_pins,
5754730f33fSVishnu Patekar .npins = ARRAY_SIZE(sun8i_a83t_pins),
5764730f33fSVishnu Patekar .irq_banks = 3,
5774730f33fSVishnu Patekar };
5784730f33fSVishnu Patekar
sun8i_a83t_pinctrl_probe(struct platform_device * pdev)5794730f33fSVishnu Patekar static int sun8i_a83t_pinctrl_probe(struct platform_device *pdev)
5804730f33fSVishnu Patekar {
5814730f33fSVishnu Patekar return sunxi_pinctrl_init(pdev,
5824730f33fSVishnu Patekar &sun8i_a83t_pinctrl_data);
5834730f33fSVishnu Patekar }
5844730f33fSVishnu Patekar
5854730f33fSVishnu Patekar static const struct of_device_id sun8i_a83t_pinctrl_match[] = {
5864730f33fSVishnu Patekar { .compatible = "allwinner,sun8i-a83t-pinctrl", },
5874730f33fSVishnu Patekar {}
5884730f33fSVishnu Patekar };
5894730f33fSVishnu Patekar
5904730f33fSVishnu Patekar static struct platform_driver sun8i_a83t_pinctrl_driver = {
5914730f33fSVishnu Patekar .probe = sun8i_a83t_pinctrl_probe,
5924730f33fSVishnu Patekar .driver = {
5934730f33fSVishnu Patekar .name = "sun8i-a83t-pinctrl",
5944730f33fSVishnu Patekar .of_match_table = sun8i_a83t_pinctrl_match,
5954730f33fSVishnu Patekar },
5964730f33fSVishnu Patekar };
5970c8c6ba0SPaul Gortmaker builtin_platform_driver(sun8i_a83t_pinctrl_driver);
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