1 /* 2 * Allwinner A31 SoCs special pins pinctrl driver. 3 * 4 * Copyright (C) 2014 Boris Brezillon 5 * Boris Brezillon <boris.brezillon@free-electrons.com> 6 * 7 * Copyright (C) 2014 Maxime Ripard 8 * Maxime Ripard <maxime.ripard@free-electrons.com> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without any 12 * warranty of any kind, whether express or implied. 13 */ 14 15 #include <linux/init.h> 16 #include <linux/platform_device.h> 17 #include <linux/of.h> 18 #include <linux/of_device.h> 19 #include <linux/pinctrl/pinctrl.h> 20 21 #include "pinctrl-sunxi.h" 22 23 static const struct sunxi_desc_pin sun6i_a31_r_pins[] = { 24 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), 25 SUNXI_FUNCTION(0x0, "gpio_in"), 26 SUNXI_FUNCTION(0x1, "gpio_out"), 27 SUNXI_FUNCTION(0x2, "s_i2c"), /* SCK */ 28 SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */ 29 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), 30 SUNXI_FUNCTION(0x0, "gpio_in"), 31 SUNXI_FUNCTION(0x1, "gpio_out"), 32 SUNXI_FUNCTION(0x2, "s_i2c"), /* SDA */ 33 SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */ 34 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), 35 SUNXI_FUNCTION(0x0, "gpio_in"), 36 SUNXI_FUNCTION(0x1, "gpio_out"), 37 SUNXI_FUNCTION(0x2, "s_uart")), /* TX */ 38 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3), 39 SUNXI_FUNCTION(0x0, "gpio_in"), 40 SUNXI_FUNCTION(0x1, "gpio_out"), 41 SUNXI_FUNCTION(0x2, "s_uart")), /* RX */ 42 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4), 43 SUNXI_FUNCTION(0x0, "gpio_in"), 44 SUNXI_FUNCTION(0x1, "gpio_out"), 45 SUNXI_FUNCTION(0x2, "s_ir")), /* RX */ 46 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5), 47 SUNXI_FUNCTION(0x0, "gpio_in"), 48 SUNXI_FUNCTION(0x1, "gpio_out"), 49 SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0), /* PL_EINT0 */ 50 SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */ 51 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6), 52 SUNXI_FUNCTION(0x0, "gpio_in"), 53 SUNXI_FUNCTION(0x1, "gpio_out"), 54 SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1), /* PL_EINT1 */ 55 SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */ 56 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7), 57 SUNXI_FUNCTION(0x0, "gpio_in"), 58 SUNXI_FUNCTION(0x1, "gpio_out"), 59 SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2), /* PL_EINT2 */ 60 SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */ 61 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8), 62 SUNXI_FUNCTION(0x0, "gpio_in"), 63 SUNXI_FUNCTION(0x1, "gpio_out"), 64 SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3), /* PL_EINT3 */ 65 SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */ 66 /* Hole */ 67 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0), 68 SUNXI_FUNCTION(0x0, "gpio_in"), 69 SUNXI_FUNCTION(0x1, "gpio_out"), 70 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)), /* PM_EINT0 */ 71 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1), 72 SUNXI_FUNCTION(0x0, "gpio_in"), 73 SUNXI_FUNCTION(0x1, "gpio_out"), 74 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)), /* PM_EINT1 */ 75 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2), 76 SUNXI_FUNCTION(0x0, "gpio_in"), 77 SUNXI_FUNCTION(0x1, "gpio_out"), 78 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2), /* PM_EINT2 */ 79 SUNXI_FUNCTION(0x3, "1wire")), 80 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3), 81 SUNXI_FUNCTION(0x0, "gpio_in"), 82 SUNXI_FUNCTION(0x1, "gpio_out"), 83 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)), /* PM_EINT3 */ 84 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4), 85 SUNXI_FUNCTION(0x0, "gpio_in"), 86 SUNXI_FUNCTION(0x1, "gpio_out"), 87 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)), /* PM_EINT4 */ 88 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5), 89 SUNXI_FUNCTION(0x0, "gpio_in"), 90 SUNXI_FUNCTION(0x1, "gpio_out"), 91 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)), /* PM_EINT5 */ 92 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6), 93 SUNXI_FUNCTION(0x0, "gpio_in"), 94 SUNXI_FUNCTION(0x1, "gpio_out"), 95 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)), /* PM_EINT6 */ 96 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7), 97 SUNXI_FUNCTION(0x0, "gpio_in"), 98 SUNXI_FUNCTION(0x1, "gpio_out"), 99 SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7), /* PM_EINT7 */ 100 SUNXI_FUNCTION(0x3, "rtc")), /* CLKO */ 101 }; 102 103 static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = { 104 .pins = sun6i_a31_r_pins, 105 .npins = ARRAY_SIZE(sun6i_a31_r_pins), 106 .pin_base = PL_BASE, 107 .irq_banks = 2, 108 .disable_strict_mode = true, 109 }; 110 111 static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev) 112 { 113 return sunxi_pinctrl_init(pdev, &sun6i_a31_r_pinctrl_data); 114 } 115 116 static const struct of_device_id sun6i_a31_r_pinctrl_match[] = { 117 { .compatible = "allwinner,sun6i-a31-r-pinctrl", }, 118 {} 119 }; 120 121 static struct platform_driver sun6i_a31_r_pinctrl_driver = { 122 .probe = sun6i_a31_r_pinctrl_probe, 123 .driver = { 124 .name = "sun6i-a31-r-pinctrl", 125 .of_match_table = sun6i_a31_r_pinctrl_match, 126 }, 127 }; 128 builtin_platform_driver(sun6i_a31_r_pinctrl_driver); 129