196851d39SAndre Przywara /* 296851d39SAndre Przywara * Allwinner A64 SoCs pinctrl driver. 396851d39SAndre Przywara * 496851d39SAndre Przywara * Copyright (C) 2016 - ARM Ltd. 596851d39SAndre Przywara * Author: Andre Przywara <andre.przywara@arm.com> 696851d39SAndre Przywara * 796851d39SAndre Przywara * Based on pinctrl-sun7i-a20.c, which is: 896851d39SAndre Przywara * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com> 996851d39SAndre Przywara * 1096851d39SAndre Przywara * This file is licensed under the terms of the GNU General Public 1196851d39SAndre Przywara * License version 2. This program is licensed "as is" without any 1296851d39SAndre Przywara * warranty of any kind, whether express or implied. 1396851d39SAndre Przywara */ 1496851d39SAndre Przywara 1596851d39SAndre Przywara #include <linux/module.h> 1696851d39SAndre Przywara #include <linux/platform_device.h> 1796851d39SAndre Przywara #include <linux/of.h> 1896851d39SAndre Przywara #include <linux/of_device.h> 1996851d39SAndre Przywara #include <linux/pinctrl/pinctrl.h> 2096851d39SAndre Przywara 2196851d39SAndre Przywara #include "pinctrl-sunxi.h" 2296851d39SAndre Przywara 2396851d39SAndre Przywara static const struct sunxi_desc_pin a64_pins[] = { 2496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), 2596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 2696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 2796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* TX */ 2896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* MS0 */ 2996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* EINT0 */ 3096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), 3196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 3296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 3396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* RX */ 3496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* CK0 */ 3596851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */ 3696851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* EINT1 */ 3796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), 3896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 3996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 4096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* RTS */ 4196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* DO0 */ 4296851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */ 4396851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* EINT2 */ 4496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), 4596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 4696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 4796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart2"), /* CTS */ 4896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */ 4996851d39SAndre Przywara SUNXI_FUNCTION(0x4, "jtag"), /* DI0 */ 5096851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */ 5196851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* EINT3 */ 5296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), 5396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 5496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 5596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* SYNC */ 5696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* SYNC */ 5796851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* CLK */ 5896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* EINT4 */ 5996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5), 6096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 6196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 6296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* BCLK */ 6396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */ 6496851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* DATA */ 6596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* EINT5 */ 6696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6), 6796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 6896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 6996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* DOUT */ 7096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* DOUT */ 7196851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* RST */ 7296851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* EINT6 */ 7396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7), 7496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 7596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 7696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif2"), /* DIN */ 7796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s0"), /* DIN */ 7896851d39SAndre Przywara SUNXI_FUNCTION(0x5, "sim"), /* DET */ 7996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* EINT7 */ 8096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8), 8196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 8296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 8396851d39SAndre Przywara SUNXI_FUNCTION(0x4, "uart0"), /* TX */ 8496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* EINT8 */ 8596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9), 8696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 8796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 8896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "uart0"), /* RX */ 8996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* EINT9 */ 9096851d39SAndre Przywara /* Hole */ 9196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), 9296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 9396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 9496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ 9596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* MOSI */ 9696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), 9796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 9896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 9996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ 10096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2"), /* DS */ 10196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* MISO */ 10296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), 10396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 10496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 10596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ 10696851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* SCK */ 10796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), 10896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 10996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 11096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */ 11196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi0")), /* CS */ 11296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), 11396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 11496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 11596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ 11696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), 11796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 11896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 11996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NRE# */ 12096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ 12196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), 12296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 12396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 12496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ 12596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ 12696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), 12796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 12896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 12996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0")), /* NRB1 */ 13096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), 13196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 13296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 13396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ 13496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ 13596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), 13696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 13796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 13896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ 13996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ 14096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), 14196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 14296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 14396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ 14496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ 14596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), 14696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 14796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 14896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ 14996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ 15096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), 15196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 15296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 15396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ 15496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ 15596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), 15696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 15796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 15896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ 15996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ 16096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), 16196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 16296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 16396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ 16496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ 16596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), 16696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 16796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 16896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ 16996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ 17096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16), 17196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 17296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 17396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ 17496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "mmc2")), /* RST */ 17596851d39SAndre Przywara /* Hole */ 17696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0), 17796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 17896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 17996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ 18096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart3"), /* TX */ 18196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* CS */ 18296851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* CLK */ 18396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1), 18496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 18596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 18696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ 18796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart3"), /* RX */ 18896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* CLK */ 18996851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* DE */ 19096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), 19196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 19296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 19396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ 19496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* TX */ 19596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */ 19696851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* HSYNC */ 19796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), 19896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 19996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 20096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ 20196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* RX */ 20296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "spi1"), /* MISO */ 20396851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* VSYNC */ 20496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), 20596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 20696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 20796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ 20896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* RTS */ 20996851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D0 */ 21096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), 21196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 21296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 21396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ 21496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart4"), /* CTS */ 21596851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D1 */ 21696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), 21796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 21896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 21996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ 22096851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D2 */ 22196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), 22296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 22396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 22496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ 22596851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D3 */ 22696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8), 22796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 22896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 22996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ 23096851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ERXD3 */ 23196851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D4 */ 23296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9), 23396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 23496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 23596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ 23696851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ERXD2 */ 23796851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D5 */ 23896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), 23996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 24096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 24196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ 24296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXD1 */ 24396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), 24496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 24596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 24696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ 24796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXD0 */ 24896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), 24996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 25096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 25196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ 25296851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */ 25396851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXCK */ 25496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), 25596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 25696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 25796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ 25896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */ 25996851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ERXCTL */ 26096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), 26196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 26296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 26396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ 26496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */ 26596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ENULL */ 26696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), 26796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 26896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 26996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ 27096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */ 27196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ETXD3 */ 27296851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D6 */ 27396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16), 27496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 27596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 27696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ 27796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */ 27896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac"), /* ETXD2 */ 27996851d39SAndre Przywara SUNXI_FUNCTION(0x5, "ccir")), /* D7 */ 28096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17), 28196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 28296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 28396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ 28496851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */ 28596851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXD1 */ 28696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), 28796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 28896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 28996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ 29096851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VPC */ 29196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXD0 */ 29296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), 29396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 29496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 29596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ 29696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VNC */ 29796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXCK */ 29896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), 29996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 30096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 30196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ 30296851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VP3 */ 30396851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ETXCTL */ 30496851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), 30596851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 30696851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 30796851d39SAndre Przywara SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ 30896851d39SAndre Przywara SUNXI_FUNCTION(0x3, "lvds0"), /* VN3 */ 30996851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* ECLKIN */ 31096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), 31196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 31296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 31396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */ 31496851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* EMDC */ 31596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), 31696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 31796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 31896851d39SAndre Przywara SUNXI_FUNCTION(0x4, "emac")), /* EMDIO */ 31996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), 32096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 32196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")), 32296851d39SAndre Przywara /* Hole */ 32396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), 32496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 32596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 32696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* PCK */ 32796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* CLK */ 32896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), 32996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 33096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 33196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* CK */ 33296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* ERR */ 33396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), 33496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 33596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 33696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* HSYNC */ 33796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* SYNC */ 33896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), 33996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 34096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 34196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* VSYNC */ 34296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* DVLD */ 34396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), 34496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 34596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 34696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D0 */ 34796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D0 */ 34896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), 34996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 35096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 35196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D1 */ 35296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D1 */ 35396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), 35496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 35596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 35696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D2 */ 35796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D2 */ 35896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), 35996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 36096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 36196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D3 */ 36296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D3 */ 36396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), 36496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 36596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 36696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D4 */ 36796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D4 */ 36896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), 36996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 37096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 37196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D5 */ 37296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D5 */ 37396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), 37496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 37596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 37696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D6 */ 37796851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D6 */ 37896851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), 37996851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 38096851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 38196851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0"), /* D7 */ 38296851d39SAndre Przywara SUNXI_FUNCTION(0x4, "ts0")), /* D7 */ 38396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12), 38496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 38596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 38696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0")), /* SCK */ 38796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13), 38896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 38996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 39096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "csi0")), /* SDA */ 39196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14), 39296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 39396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 39496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "pll"), /* LOCK_DBG */ 39596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */ 39696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15), 39796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 39896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 39996851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */ 40096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16), 40196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 40296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")), 40396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 17), 40496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 40596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")), 40696851d39SAndre Przywara /* Hole */ 40796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), 40896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 40996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 41096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ 41196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* MSI */ 41296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), 41396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 41496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 41596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ 41696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */ 41796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), 41896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 41996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 42096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ 42196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "uart0")), /* TX */ 42296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), 42396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 42496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 42596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ 42696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */ 42796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), 42896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 42996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 43096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ 43196851d39SAndre Przywara SUNXI_FUNCTION(0x4, "uart0")), /* RX */ 43296851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), 43396851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 43496851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 43596851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ 43696851d39SAndre Przywara SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */ 43796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6), 43896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 43996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out")), 44096851d39SAndre Przywara /* Hole */ 44196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), 44296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 44396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 44496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ 44596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* EINT0 */ 44696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), 44796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 44896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 44996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ 45096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* EINT1 */ 45196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), 45296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 45396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 45496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */ 45596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* EINT2 */ 45696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), 45796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 45896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 45996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */ 46096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* EINT3 */ 46196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), 46296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 46396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 46496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */ 46596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* EINT4 */ 46696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5), 46796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 46896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 46996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */ 47096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* EINT5 */ 47196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6), 47296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 47396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 47496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* TX */ 47596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* EINT6 */ 47696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7), 47796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 47896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 47996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* RX */ 48096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* EINT7 */ 48196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8), 48296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 48396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 48496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* RTS */ 48596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* EINT8 */ 48696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), 48796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 48896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 48996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart1"), /* CTS */ 49096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* EINT9 */ 49196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), 49296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 49396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 49496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* SYNC */ 49596851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* SYNC */ 49696851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* EINT10 */ 49796851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), 49896851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 49996851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 50096851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* BCLK */ 50196851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */ 50296851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* EINT11 */ 50396851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), 50496851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 50596851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 50696851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* DOUT */ 50796851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* DOUT */ 50896851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* EINT12 */ 50996851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13), 51096851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 51196851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 51296851d39SAndre Przywara SUNXI_FUNCTION(0x2, "aif3"), /* DIN */ 51396851d39SAndre Przywara SUNXI_FUNCTION(0x3, "i2s1"), /* DIN */ 51496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* EINT13 */ 51596851d39SAndre Przywara /* Hole */ 51696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0), 51796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 51896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 51996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */ 52096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 0)), /* EINT0 */ 52196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1), 52296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 52396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 52496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */ 52596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 1)), /* EINT1 */ 52696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2), 52796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 52896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 52996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */ 53096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 2)), /* EINT2 */ 53196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3), 53296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 53396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 53496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */ 53596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 3)), /* EINT3 */ 53696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4), 53796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 53896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 53996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* TX */ 54096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 4)), /* EINT4 */ 54196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5), 54296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 54396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 54496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* RX */ 54596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 5)), /* EINT5 */ 54696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6), 54796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 54896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 54996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* RTS */ 55096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 6)), /* EINT6 */ 55196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7), 55296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 55396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 55496851d39SAndre Przywara SUNXI_FUNCTION(0x2, "uart3"), /* CTS */ 55596851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 7)), /* EINT7 */ 55696851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8), 55796851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 55896851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 55996851d39SAndre Przywara SUNXI_FUNCTION(0x2, "spdif"), /* OUT */ 56096851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)), /* EINT8 */ 56196851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9), 56296851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 56396851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 56496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)), /* EINT9 */ 56596851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10), 56696851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 56796851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 56896851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mic"), /* CLK */ 56996851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)), /* EINT10 */ 57096851d39SAndre Przywara SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11), 57196851d39SAndre Przywara SUNXI_FUNCTION(0x0, "gpio_in"), 57296851d39SAndre Przywara SUNXI_FUNCTION(0x1, "gpio_out"), 57396851d39SAndre Przywara SUNXI_FUNCTION(0x2, "mic"), /* DATA */ 57496851d39SAndre Przywara SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)), /* EINT11 */ 57596851d39SAndre Przywara }; 57696851d39SAndre Przywara 57796851d39SAndre Przywara static const struct sunxi_pinctrl_desc a64_pinctrl_data = { 57896851d39SAndre Przywara .pins = a64_pins, 57996851d39SAndre Przywara .npins = ARRAY_SIZE(a64_pins), 58096851d39SAndre Przywara .irq_banks = 3, 58196851d39SAndre Przywara }; 58296851d39SAndre Przywara 58396851d39SAndre Przywara static int a64_pinctrl_probe(struct platform_device *pdev) 58496851d39SAndre Przywara { 58596851d39SAndre Przywara return sunxi_pinctrl_init(pdev, 58696851d39SAndre Przywara &a64_pinctrl_data); 58796851d39SAndre Przywara } 58896851d39SAndre Przywara 58996851d39SAndre Przywara static const struct of_device_id a64_pinctrl_match[] = { 59096851d39SAndre Przywara { .compatible = "allwinner,sun50i-a64-pinctrl", }, 59196851d39SAndre Przywara {} 59296851d39SAndre Przywara }; 59396851d39SAndre Przywara 59496851d39SAndre Przywara static struct platform_driver a64_pinctrl_driver = { 59596851d39SAndre Przywara .probe = a64_pinctrl_probe, 59696851d39SAndre Przywara .driver = { 59796851d39SAndre Przywara .name = "sun50i-a64-pinctrl", 59896851d39SAndre Przywara .of_match_table = a64_pinctrl_match, 59996851d39SAndre Przywara }, 60096851d39SAndre Przywara }; 60196851d39SAndre Przywara builtin_platform_driver(a64_pinctrl_driver); 602