1ba7fdf88SJianlong Huang# SPDX-License-Identifier: GPL-2.0-only 2ba7fdf88SJianlong Huang 3ba99b756SJianlong Huangconfig PINCTRL_STARFIVE_JH7100 4ba7fdf88SJianlong Huang tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC" 5ba7fdf88SJianlong Huang depends on SOC_STARFIVE || COMPILE_TEST 6ba7fdf88SJianlong Huang depends on OF 7ba7fdf88SJianlong Huang select GENERIC_PINCTRL_GROUPS 8ba7fdf88SJianlong Huang select GENERIC_PINMUX_FUNCTIONS 9ba7fdf88SJianlong Huang select GENERIC_PINCONF 10ba7fdf88SJianlong Huang select GPIOLIB 11ba7fdf88SJianlong Huang select GPIOLIB_IRQCHIP 12ba7fdf88SJianlong Huang select OF_GPIO 13ba7fdf88SJianlong Huang default SOC_STARFIVE 14ba7fdf88SJianlong Huang help 15ba7fdf88SJianlong Huang Say yes here to support pin control on the StarFive JH7100 SoC. 16ba7fdf88SJianlong Huang This also provides an interface to the GPIO pins not used by other 17ba7fdf88SJianlong Huang peripherals supporting inputs, outputs, configuring pull-up/pull-down 18ba7fdf88SJianlong Huang and interrupts on input changes. 19*447976abSJianlong Huang 20*447976abSJianlong Huangconfig PINCTRL_STARFIVE_JH7110 21*447976abSJianlong Huang bool 22*447976abSJianlong Huang select GENERIC_PINCTRL_GROUPS 23*447976abSJianlong Huang select GENERIC_PINMUX_FUNCTIONS 24*447976abSJianlong Huang select GENERIC_PINCONF 25*447976abSJianlong Huang select GPIOLIB 26*447976abSJianlong Huang select GPIOLIB_IRQCHIP 27*447976abSJianlong Huang select OF_GPIO 28*447976abSJianlong Huang 29*447976abSJianlong Huangconfig PINCTRL_STARFIVE_JH7110_SYS 30*447976abSJianlong Huang tristate "System pinctrl and GPIO driver for the StarFive JH7110 SoC" 31*447976abSJianlong Huang depends on SOC_STARFIVE || COMPILE_TEST 32*447976abSJianlong Huang depends on OF 33*447976abSJianlong Huang select PINCTRL_STARFIVE_JH7110 34*447976abSJianlong Huang default SOC_STARFIVE 35*447976abSJianlong Huang help 36*447976abSJianlong Huang Say yes here to support system pin control on the StarFive JH7110 SoC. 37*447976abSJianlong Huang This also provides an interface to the GPIO pins not used by other 38*447976abSJianlong Huang peripherals supporting inputs, outputs, configuring pull-up/pull-down 39*447976abSJianlong Huang and interrupts on input changes. 40