1 /* 2 * Spreadtrum pin controller driver 3 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * version 2 as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * General Public License for more details. 13 */ 14 15 #include <linux/debugfs.h> 16 #include <linux/err.h> 17 #include <linux/init.h> 18 #include <linux/io.h> 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_device.h> 23 #include <linux/platform_device.h> 24 #include <linux/pinctrl/machine.h> 25 #include <linux/pinctrl/pinconf.h> 26 #include <linux/pinctrl/pinconf-generic.h> 27 #include <linux/pinctrl/pinctrl.h> 28 #include <linux/pinctrl/pinmux.h> 29 #include <linux/slab.h> 30 31 #include "../core.h" 32 #include "../pinmux.h" 33 #include "../pinconf.h" 34 #include "../pinctrl-utils.h" 35 #include "pinctrl-sprd.h" 36 37 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width))) 38 #define PINCTRL_REG_OFFSET 0x20 39 #define PINCTRL_REG_MISC_OFFSET 0x4020 40 #define PINCTRL_REG_LEN 0x4 41 42 #define PIN_FUNC_MASK (BIT(4) | BIT(5)) 43 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK 44 #define PIN_FUNC_SEL_2 BIT(4) 45 #define PIN_FUNC_SEL_3 BIT(5) 46 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK 47 48 #define AP_SLEEP_MODE BIT(13) 49 #define PUBCP_SLEEP_MODE BIT(14) 50 #define TGLDSP_SLEEP_MODE BIT(15) 51 #define AGDSP_SLEEP_MODE BIT(16) 52 #define SLEEP_MODE_MASK GENMASK(3, 0) 53 #define SLEEP_MODE_SHIFT 13 54 55 #define SLEEP_INPUT BIT(1) 56 #define SLEEP_INPUT_MASK 0x1 57 #define SLEEP_INPUT_SHIFT 1 58 59 #define SLEEP_OUTPUT BIT(0) 60 #define SLEEP_OUTPUT_MASK 0x1 61 #define SLEEP_OUTPUT_SHIFT 0 62 63 #define DRIVE_STRENGTH_MASK GENMASK(3, 0) 64 #define DRIVE_STRENGTH_SHIFT 19 65 66 #define SLEEP_PULL_DOWN BIT(2) 67 #define SLEEP_PULL_DOWN_MASK 0x1 68 #define SLEEP_PULL_DOWN_SHIFT 2 69 70 #define PULL_DOWN BIT(6) 71 #define PULL_DOWN_MASK 0x1 72 #define PULL_DOWN_SHIFT 6 73 74 #define SLEEP_PULL_UP BIT(3) 75 #define SLEEP_PULL_UP_MASK 0x1 76 #define SLEEP_PULL_UP_SHIFT 3 77 78 #define PULL_UP_20K (BIT(12) | BIT(7)) 79 #define PULL_UP_4_7K BIT(12) 80 #define PULL_UP_MASK 0x21 81 #define PULL_UP_SHIFT 7 82 83 #define INPUT_SCHMITT BIT(11) 84 #define INPUT_SCHMITT_MASK 0x1 85 #define INPUT_SCHMITT_SHIFT 11 86 87 enum pin_sleep_mode { 88 AP_SLEEP = BIT(0), 89 PUBCP_SLEEP = BIT(1), 90 TGLDSP_SLEEP = BIT(2), 91 AGDSP_SLEEP = BIT(3), 92 }; 93 94 enum pin_func_sel { 95 PIN_FUNC_1, 96 PIN_FUNC_2, 97 PIN_FUNC_3, 98 PIN_FUNC_4, 99 PIN_FUNC_MAX, 100 }; 101 102 /** 103 * struct sprd_pin: represent one pin's description 104 * @name: pin name 105 * @number: pin number 106 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN 107 * @reg: pin register address 108 * @bit_offset: bit offset in pin register 109 * @bit_width: bit width in pin register 110 */ 111 struct sprd_pin { 112 const char *name; 113 unsigned int number; 114 enum pin_type type; 115 unsigned long reg; 116 unsigned long bit_offset; 117 unsigned long bit_width; 118 }; 119 120 /** 121 * struct sprd_pin_group: represent one group's description 122 * @name: group name 123 * @npins: pin numbers of this group 124 * @pins: pointer to pins array 125 */ 126 struct sprd_pin_group { 127 const char *name; 128 unsigned int npins; 129 unsigned int *pins; 130 }; 131 132 /** 133 * struct sprd_pinctrl_soc_info: represent the SoC's pins description 134 * @groups: pointer to groups of pins 135 * @ngroups: group numbers of the whole SoC 136 * @pins: pointer to pins description 137 * @npins: pin numbers of the whole SoC 138 * @grp_names: pointer to group names array 139 */ 140 struct sprd_pinctrl_soc_info { 141 struct sprd_pin_group *groups; 142 unsigned int ngroups; 143 struct sprd_pin *pins; 144 unsigned int npins; 145 const char **grp_names; 146 }; 147 148 /** 149 * struct sprd_pinctrl: represent the pin controller device 150 * @dev: pointer to the device structure 151 * @pctl: pointer to the pinctrl handle 152 * @base: base address of the controller 153 * @info: pointer to SoC's pins description information 154 */ 155 struct sprd_pinctrl { 156 struct device *dev; 157 struct pinctrl_dev *pctl; 158 void __iomem *base; 159 struct sprd_pinctrl_soc_info *info; 160 }; 161 162 enum sprd_pinconf_params { 163 SPRD_PIN_CONFIG_CONTROL = PIN_CONFIG_END + 1, 164 SPRD_PIN_CONFIG_SLEEP_MODE = PIN_CONFIG_END + 2, 165 }; 166 167 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl, 168 const char *name) 169 { 170 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 171 int i; 172 173 for (i = 0; i < info->npins; i++) { 174 if (!strcmp(info->pins[i].name, name)) 175 return info->pins[i].number; 176 } 177 178 return -ENODEV; 179 } 180 181 static struct sprd_pin * 182 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id) 183 { 184 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 185 struct sprd_pin *pin = NULL; 186 int i; 187 188 for (i = 0; i < info->npins; i++) { 189 if (info->pins[i].number == id) { 190 pin = &info->pins[i]; 191 break; 192 } 193 } 194 195 return pin; 196 } 197 198 static const struct sprd_pin_group * 199 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl, 200 const char *name) 201 { 202 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 203 const struct sprd_pin_group *grp = NULL; 204 int i; 205 206 for (i = 0; i < info->ngroups; i++) { 207 if (!strcmp(info->groups[i].name, name)) { 208 grp = &info->groups[i]; 209 break; 210 } 211 } 212 213 return grp; 214 } 215 216 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev) 217 { 218 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 219 struct sprd_pinctrl_soc_info *info = pctl->info; 220 221 return info->ngroups; 222 } 223 224 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev, 225 unsigned int selector) 226 { 227 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 228 struct sprd_pinctrl_soc_info *info = pctl->info; 229 230 return info->groups[selector].name; 231 } 232 233 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev, 234 unsigned int selector, 235 const unsigned int **pins, 236 unsigned int *npins) 237 { 238 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 239 struct sprd_pinctrl_soc_info *info = pctl->info; 240 241 if (selector >= info->ngroups) 242 return -EINVAL; 243 244 *pins = info->groups[selector].pins; 245 *npins = info->groups[selector].npins; 246 247 return 0; 248 } 249 250 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev, 251 struct device_node *np, 252 struct pinctrl_map **map, 253 unsigned int *num_maps) 254 { 255 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 256 const struct sprd_pin_group *grp; 257 unsigned long *configs = NULL; 258 unsigned int num_configs = 0; 259 unsigned int reserved_maps = 0; 260 unsigned int reserve = 0; 261 const char *function; 262 enum pinctrl_map_type type; 263 int ret; 264 265 grp = sprd_pinctrl_find_group_by_name(pctl, np->name); 266 if (!grp) { 267 dev_err(pctl->dev, "unable to find group for node %s\n", 268 of_node_full_name(np)); 269 return -EINVAL; 270 } 271 272 ret = of_property_count_strings(np, "pins"); 273 if (ret < 0) 274 return ret; 275 276 if (ret == 1) 277 type = PIN_MAP_TYPE_CONFIGS_PIN; 278 else 279 type = PIN_MAP_TYPE_CONFIGS_GROUP; 280 281 ret = of_property_read_string(np, "function", &function); 282 if (ret < 0) { 283 if (ret != -EINVAL) 284 dev_err(pctl->dev, 285 "%s: could not parse property function\n", 286 of_node_full_name(np)); 287 function = NULL; 288 } 289 290 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, 291 &num_configs); 292 if (ret < 0) { 293 dev_err(pctl->dev, "%s: could not parse node property\n", 294 of_node_full_name(np)); 295 return ret; 296 } 297 298 *map = NULL; 299 *num_maps = 0; 300 301 if (function != NULL) 302 reserve++; 303 if (num_configs) 304 reserve++; 305 306 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps, 307 num_maps, reserve); 308 if (ret < 0) 309 goto out; 310 311 if (function) { 312 ret = pinctrl_utils_add_map_mux(pctldev, map, 313 &reserved_maps, num_maps, 314 grp->name, function); 315 if (ret < 0) 316 goto out; 317 } 318 319 if (num_configs) { 320 const char *group_or_pin; 321 unsigned int pin_id; 322 323 if (type == PIN_MAP_TYPE_CONFIGS_PIN) { 324 pin_id = grp->pins[0]; 325 group_or_pin = pin_get_name(pctldev, pin_id); 326 } else { 327 group_or_pin = grp->name; 328 } 329 330 ret = pinctrl_utils_add_map_configs(pctldev, map, 331 &reserved_maps, num_maps, 332 group_or_pin, configs, 333 num_configs, type); 334 } 335 336 out: 337 kfree(configs); 338 return ret; 339 } 340 341 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 342 unsigned int offset) 343 { 344 seq_printf(s, "%s", dev_name(pctldev->dev)); 345 } 346 347 static const struct pinctrl_ops sprd_pctrl_ops = { 348 .get_groups_count = sprd_pctrl_group_count, 349 .get_group_name = sprd_pctrl_group_name, 350 .get_group_pins = sprd_pctrl_group_pins, 351 .pin_dbg_show = sprd_pctrl_dbg_show, 352 .dt_node_to_map = sprd_dt_node_to_map, 353 .dt_free_map = pinctrl_utils_free_map, 354 }; 355 356 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev) 357 { 358 return PIN_FUNC_MAX; 359 } 360 361 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev, 362 unsigned int selector) 363 { 364 switch (selector) { 365 case PIN_FUNC_1: 366 return "func1"; 367 case PIN_FUNC_2: 368 return "func2"; 369 case PIN_FUNC_3: 370 return "func3"; 371 case PIN_FUNC_4: 372 return "func4"; 373 default: 374 return "null"; 375 } 376 } 377 378 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev, 379 unsigned int selector, 380 const char * const **groups, 381 unsigned int * const num_groups) 382 { 383 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 384 struct sprd_pinctrl_soc_info *info = pctl->info; 385 386 *groups = info->grp_names; 387 *num_groups = info->ngroups; 388 389 return 0; 390 } 391 392 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev, 393 unsigned int func_selector, 394 unsigned int group_selector) 395 { 396 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 397 struct sprd_pinctrl_soc_info *info = pctl->info; 398 struct sprd_pin_group *grp = &info->groups[group_selector]; 399 unsigned int i, grp_pins = grp->npins; 400 unsigned long reg; 401 unsigned int val = 0; 402 403 if (group_selector >= info->ngroups) 404 return -EINVAL; 405 406 switch (func_selector) { 407 case PIN_FUNC_1: 408 val &= PIN_FUNC_SEL_1; 409 break; 410 case PIN_FUNC_2: 411 val |= PIN_FUNC_SEL_2; 412 break; 413 case PIN_FUNC_3: 414 val |= PIN_FUNC_SEL_3; 415 break; 416 case PIN_FUNC_4: 417 val |= PIN_FUNC_SEL_4; 418 break; 419 default: 420 break; 421 } 422 423 for (i = 0; i < grp_pins; i++) { 424 unsigned int pin_id = grp->pins[i]; 425 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 426 427 if (!pin || pin->type != COMMON_PIN) 428 continue; 429 430 reg = readl((void __iomem *)pin->reg); 431 reg &= ~PIN_FUNC_MASK; 432 reg |= val; 433 writel(reg, (void __iomem *)pin->reg); 434 } 435 436 return 0; 437 } 438 439 static const struct pinmux_ops sprd_pmx_ops = { 440 .get_functions_count = sprd_pmx_get_function_count, 441 .get_function_name = sprd_pmx_get_function_name, 442 .get_function_groups = sprd_pmx_get_function_groups, 443 .set_mux = sprd_pmx_set_mux, 444 }; 445 446 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id, 447 unsigned long *config) 448 { 449 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 450 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 451 unsigned int param = pinconf_to_config_param(*config); 452 unsigned int reg, arg; 453 454 if (!pin) 455 return -EINVAL; 456 457 if (pin->type == GLOBAL_CTRL_PIN) { 458 reg = (readl((void __iomem *)pin->reg) >> 459 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 460 } else { 461 reg = readl((void __iomem *)pin->reg); 462 } 463 464 if (pin->type == GLOBAL_CTRL_PIN && 465 param == SPRD_PIN_CONFIG_CONTROL) { 466 arg = reg; 467 } else if (pin->type == COMMON_PIN) { 468 switch (param) { 469 case SPRD_PIN_CONFIG_SLEEP_MODE: 470 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK; 471 break; 472 case PIN_CONFIG_INPUT_ENABLE: 473 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK; 474 break; 475 case PIN_CONFIG_OUTPUT: 476 arg = reg & SLEEP_OUTPUT_MASK; 477 break; 478 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 479 arg = 0; 480 break; 481 default: 482 return -ENOTSUPP; 483 } 484 } else if (pin->type == MISC_PIN) { 485 switch (param) { 486 case PIN_CONFIG_DRIVE_STRENGTH: 487 arg = (reg >> DRIVE_STRENGTH_SHIFT) & 488 DRIVE_STRENGTH_MASK; 489 break; 490 case PIN_CONFIG_BIAS_PULL_DOWN: 491 /* combine sleep pull down and pull down config */ 492 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) & 493 SLEEP_PULL_DOWN_MASK) << 16; 494 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK; 495 break; 496 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 497 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK; 498 break; 499 case PIN_CONFIG_BIAS_PULL_UP: 500 /* combine sleep pull up and pull up config */ 501 arg = ((reg >> SLEEP_PULL_UP_SHIFT) & 502 SLEEP_PULL_UP_MASK) << 16; 503 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK; 504 break; 505 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 506 arg = 0; 507 break; 508 default: 509 return -ENOTSUPP; 510 } 511 } else { 512 return -ENOTSUPP; 513 } 514 515 *config = pinconf_to_config_packed(param, arg); 516 return 0; 517 } 518 519 static unsigned int sprd_pinconf_drive(unsigned int mA) 520 { 521 unsigned int val = 0; 522 523 switch (mA) { 524 case 2: 525 break; 526 case 4: 527 val |= BIT(19); 528 break; 529 case 6: 530 val |= BIT(20); 531 break; 532 case 8: 533 val |= BIT(19) | BIT(20); 534 break; 535 case 10: 536 val |= BIT(21); 537 break; 538 case 12: 539 val |= BIT(21) | BIT(19); 540 break; 541 case 14: 542 val |= BIT(21) | BIT(20); 543 break; 544 case 16: 545 val |= BIT(19) | BIT(20) | BIT(21); 546 break; 547 case 20: 548 val |= BIT(22); 549 break; 550 case 21: 551 val |= BIT(22) | BIT(19); 552 break; 553 case 24: 554 val |= BIT(22) | BIT(20); 555 break; 556 case 25: 557 val |= BIT(22) | BIT(20) | BIT(19); 558 break; 559 case 27: 560 val |= BIT(22) | BIT(21); 561 break; 562 case 29: 563 val |= BIT(22) | BIT(21) | BIT(19); 564 break; 565 case 31: 566 val |= BIT(22) | BIT(21) | BIT(20); 567 break; 568 case 33: 569 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19); 570 break; 571 default: 572 break; 573 } 574 575 return val; 576 } 577 578 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs, 579 unsigned int num_configs) 580 { 581 unsigned int param; 582 int i; 583 584 for (i = 0; i < num_configs; i++) { 585 param = pinconf_to_config_param(configs[i]); 586 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE) 587 return true; 588 } 589 590 return false; 591 } 592 593 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id, 594 unsigned long *configs, unsigned int num_configs) 595 { 596 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 597 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 598 bool is_sleep_config; 599 unsigned long reg; 600 int i; 601 602 if (!pin) 603 return -EINVAL; 604 605 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs); 606 607 for (i = 0; i < num_configs; i++) { 608 unsigned int param, arg, shift, mask, val; 609 610 param = pinconf_to_config_param(configs[i]); 611 arg = pinconf_to_config_argument(configs[i]); 612 613 val = 0; 614 shift = 0; 615 mask = 0; 616 if (pin->type == GLOBAL_CTRL_PIN && 617 param == SPRD_PIN_CONFIG_CONTROL) { 618 val = arg; 619 } else if (pin->type == COMMON_PIN) { 620 switch (param) { 621 case SPRD_PIN_CONFIG_SLEEP_MODE: 622 if (arg & AP_SLEEP) 623 val |= AP_SLEEP_MODE; 624 if (arg & PUBCP_SLEEP) 625 val |= PUBCP_SLEEP_MODE; 626 if (arg & TGLDSP_SLEEP) 627 val |= TGLDSP_SLEEP_MODE; 628 if (arg & AGDSP_SLEEP) 629 val |= AGDSP_SLEEP_MODE; 630 631 mask = SLEEP_MODE_MASK; 632 shift = SLEEP_MODE_SHIFT; 633 break; 634 case PIN_CONFIG_INPUT_ENABLE: 635 if (is_sleep_config == true) { 636 if (arg > 0) 637 val |= SLEEP_INPUT; 638 else 639 val &= ~SLEEP_INPUT; 640 641 mask = SLEEP_INPUT_MASK; 642 shift = SLEEP_INPUT_SHIFT; 643 } 644 break; 645 case PIN_CONFIG_OUTPUT: 646 if (is_sleep_config == true) { 647 val |= SLEEP_OUTPUT; 648 mask = SLEEP_OUTPUT_MASK; 649 shift = SLEEP_OUTPUT_SHIFT; 650 } 651 break; 652 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 653 continue; 654 default: 655 return -ENOTSUPP; 656 } 657 } else if (pin->type == MISC_PIN) { 658 switch (param) { 659 case PIN_CONFIG_DRIVE_STRENGTH: 660 if (arg < 2 || arg > 60) 661 return -EINVAL; 662 663 val = sprd_pinconf_drive(arg); 664 mask = DRIVE_STRENGTH_MASK; 665 shift = DRIVE_STRENGTH_SHIFT; 666 break; 667 case PIN_CONFIG_BIAS_PULL_DOWN: 668 if (is_sleep_config == true) { 669 val |= SLEEP_PULL_DOWN; 670 mask = SLEEP_PULL_DOWN_MASK; 671 shift = SLEEP_PULL_DOWN_SHIFT; 672 } else { 673 val |= PULL_DOWN; 674 mask = PULL_DOWN_MASK; 675 shift = PULL_DOWN_SHIFT; 676 } 677 break; 678 case PIN_CONFIG_INPUT_SCHMITT_ENABLE: 679 if (arg > 0) 680 val |= INPUT_SCHMITT; 681 else 682 val &= ~INPUT_SCHMITT; 683 684 mask = INPUT_SCHMITT_MASK; 685 shift = INPUT_SCHMITT_SHIFT; 686 break; 687 case PIN_CONFIG_BIAS_PULL_UP: 688 if (is_sleep_config == true) { 689 val |= SLEEP_PULL_UP; 690 mask = SLEEP_PULL_UP_MASK; 691 shift = SLEEP_PULL_UP_SHIFT; 692 } else { 693 if (arg == 20000) 694 val |= PULL_UP_20K; 695 else if (arg == 4700) 696 val |= PULL_UP_4_7K; 697 698 mask = PULL_UP_MASK; 699 shift = PULL_UP_SHIFT; 700 } 701 break; 702 case PIN_CONFIG_SLEEP_HARDWARE_STATE: 703 continue; 704 default: 705 return -ENOTSUPP; 706 } 707 } else { 708 return -ENOTSUPP; 709 } 710 711 if (pin->type == GLOBAL_CTRL_PIN) { 712 reg = readl((void __iomem *)pin->reg); 713 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width) 714 << pin->bit_offset); 715 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width)) 716 << pin->bit_offset; 717 writel(reg, (void __iomem *)pin->reg); 718 } else { 719 reg = readl((void __iomem *)pin->reg); 720 reg &= ~(mask << shift); 721 reg |= val; 722 writel(reg, (void __iomem *)pin->reg); 723 } 724 } 725 726 return 0; 727 } 728 729 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev, 730 unsigned int selector, unsigned long *config) 731 { 732 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 733 struct sprd_pinctrl_soc_info *info = pctl->info; 734 struct sprd_pin_group *grp; 735 unsigned int pin_id; 736 737 if (selector >= info->ngroups) 738 return -EINVAL; 739 740 grp = &info->groups[selector]; 741 pin_id = grp->pins[0]; 742 743 return sprd_pinconf_get(pctldev, pin_id, config); 744 } 745 746 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev, 747 unsigned int selector, 748 unsigned long *configs, 749 unsigned int num_configs) 750 { 751 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 752 struct sprd_pinctrl_soc_info *info = pctl->info; 753 struct sprd_pin_group *grp; 754 int ret, i; 755 756 if (selector >= info->ngroups) 757 return -EINVAL; 758 759 grp = &info->groups[selector]; 760 761 for (i = 0; i < grp->npins; i++) { 762 unsigned int pin_id = grp->pins[i]; 763 764 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs); 765 if (ret) 766 return ret; 767 } 768 769 return 0; 770 } 771 772 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev, 773 unsigned int pin_id, 774 unsigned long *config) 775 { 776 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 777 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id); 778 779 if (!pin) 780 return -EINVAL; 781 782 if (pin->type == GLOBAL_CTRL_PIN) { 783 *config = (readl((void __iomem *)pin->reg) >> 784 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width); 785 } else { 786 *config = readl((void __iomem *)pin->reg); 787 } 788 789 return 0; 790 } 791 792 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev, 793 struct seq_file *s, unsigned int pin_id) 794 { 795 unsigned long config; 796 int ret; 797 798 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 799 if (ret) 800 return; 801 802 seq_printf(s, "0x%lx", config); 803 } 804 805 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, 806 struct seq_file *s, 807 unsigned int selector) 808 { 809 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); 810 struct sprd_pinctrl_soc_info *info = pctl->info; 811 struct sprd_pin_group *grp; 812 unsigned long config; 813 const char *name; 814 int i, ret; 815 816 if (selector >= info->ngroups) 817 return; 818 819 grp = &info->groups[selector]; 820 821 seq_putc(s, '\n'); 822 for (i = 0; i < grp->npins; i++, config++) { 823 unsigned int pin_id = grp->pins[i]; 824 825 name = pin_get_name(pctldev, pin_id); 826 ret = sprd_pinconf_get_config(pctldev, pin_id, &config); 827 if (ret) 828 return; 829 830 seq_printf(s, "%s: 0x%lx ", name, config); 831 } 832 } 833 834 static const struct pinconf_ops sprd_pinconf_ops = { 835 .is_generic = true, 836 .pin_config_get = sprd_pinconf_get, 837 .pin_config_set = sprd_pinconf_set, 838 .pin_config_group_get = sprd_pinconf_group_get, 839 .pin_config_group_set = sprd_pinconf_group_set, 840 .pin_config_dbg_show = sprd_pinconf_dbg_show, 841 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show, 842 }; 843 844 static const struct pinconf_generic_params sprd_dt_params[] = { 845 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0}, 846 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0}, 847 }; 848 849 #ifdef CONFIG_DEBUG_FS 850 static const struct pin_config_item sprd_conf_items[] = { 851 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true), 852 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true), 853 }; 854 #endif 855 856 static struct pinctrl_desc sprd_pinctrl_desc = { 857 .pctlops = &sprd_pctrl_ops, 858 .pmxops = &sprd_pmx_ops, 859 .confops = &sprd_pinconf_ops, 860 .num_custom_params = ARRAY_SIZE(sprd_dt_params), 861 .custom_params = sprd_dt_params, 862 #ifdef CONFIG_DEBUG_FS 863 .custom_conf_items = sprd_conf_items, 864 #endif 865 .owner = THIS_MODULE, 866 }; 867 868 static int sprd_pinctrl_parse_groups(struct device_node *np, 869 struct sprd_pinctrl *sprd_pctl, 870 struct sprd_pin_group *grp) 871 { 872 struct property *prop; 873 const char *pin_name; 874 int ret, i = 0; 875 876 ret = of_property_count_strings(np, "pins"); 877 if (ret < 0) 878 return ret; 879 880 grp->name = np->name; 881 grp->npins = ret; 882 grp->pins = devm_kcalloc(sprd_pctl->dev, 883 grp->npins, sizeof(unsigned int), 884 GFP_KERNEL); 885 if (!grp->pins) 886 return -ENOMEM; 887 888 of_property_for_each_string(np, "pins", prop, pin_name) { 889 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name); 890 if (ret >= 0) 891 grp->pins[i++] = ret; 892 } 893 894 for (i = 0; i < grp->npins; i++) { 895 dev_dbg(sprd_pctl->dev, 896 "Group[%s] contains [%d] pins: id = %d\n", 897 grp->name, grp->npins, grp->pins[i]); 898 } 899 900 return 0; 901 } 902 903 static unsigned int sprd_pinctrl_get_groups(struct device_node *np) 904 { 905 struct device_node *child; 906 unsigned int group_cnt, cnt; 907 908 group_cnt = of_get_child_count(np); 909 910 for_each_child_of_node(np, child) { 911 cnt = of_get_child_count(child); 912 if (cnt > 0) 913 group_cnt += cnt; 914 } 915 916 return group_cnt; 917 } 918 919 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl) 920 { 921 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 922 struct device_node *np = sprd_pctl->dev->of_node; 923 struct device_node *child, *sub_child; 924 struct sprd_pin_group *grp; 925 const char **temp; 926 int ret; 927 928 if (!np) 929 return -ENODEV; 930 931 info->ngroups = sprd_pinctrl_get_groups(np); 932 if (!info->ngroups) 933 return 0; 934 935 info->groups = devm_kcalloc(sprd_pctl->dev, 936 info->ngroups, 937 sizeof(struct sprd_pin_group), 938 GFP_KERNEL); 939 if (!info->groups) 940 return -ENOMEM; 941 942 info->grp_names = devm_kcalloc(sprd_pctl->dev, 943 info->ngroups, sizeof(char *), 944 GFP_KERNEL); 945 if (!info->grp_names) 946 return -ENOMEM; 947 948 temp = info->grp_names; 949 grp = info->groups; 950 951 for_each_child_of_node(np, child) { 952 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp); 953 if (ret) 954 return ret; 955 956 *temp++ = grp->name; 957 grp++; 958 959 if (of_get_child_count(child) > 0) { 960 for_each_child_of_node(child, sub_child) { 961 ret = sprd_pinctrl_parse_groups(sub_child, 962 sprd_pctl, grp); 963 if (ret) 964 return ret; 965 966 *temp++ = grp->name; 967 grp++; 968 } 969 } 970 } 971 972 return 0; 973 } 974 975 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl, 976 struct sprd_pins_info *sprd_soc_pin_info, 977 int pins_cnt) 978 { 979 struct sprd_pinctrl_soc_info *info = sprd_pctl->info; 980 unsigned int ctrl_pin = 0, com_pin = 0; 981 struct sprd_pin *pin; 982 int i; 983 984 info->npins = pins_cnt; 985 info->pins = devm_kcalloc(sprd_pctl->dev, 986 info->npins, sizeof(struct sprd_pin), 987 GFP_KERNEL); 988 if (!info->pins) 989 return -ENOMEM; 990 991 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) { 992 unsigned int reg; 993 994 pin->name = sprd_soc_pin_info[i].name; 995 pin->type = sprd_soc_pin_info[i].type; 996 pin->number = sprd_soc_pin_info[i].num; 997 reg = sprd_soc_pin_info[i].reg; 998 if (pin->type == GLOBAL_CTRL_PIN) { 999 pin->reg = (unsigned long)sprd_pctl->base + 1000 PINCTRL_REG_LEN * reg; 1001 pin->bit_offset = sprd_soc_pin_info[i].bit_offset; 1002 pin->bit_width = sprd_soc_pin_info[i].bit_width; 1003 ctrl_pin++; 1004 } else if (pin->type == COMMON_PIN) { 1005 pin->reg = (unsigned long)sprd_pctl->base + 1006 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN * 1007 (i - ctrl_pin); 1008 com_pin++; 1009 } else if (pin->type == MISC_PIN) { 1010 pin->reg = (unsigned long)sprd_pctl->base + 1011 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN * 1012 (i - ctrl_pin - com_pin); 1013 } 1014 } 1015 1016 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) { 1017 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, " 1018 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n", 1019 pin->name, pin->number, pin->type, 1020 pin->bit_offset, pin->bit_width, pin->reg); 1021 } 1022 1023 return 0; 1024 } 1025 1026 int sprd_pinctrl_core_probe(struct platform_device *pdev, 1027 struct sprd_pins_info *sprd_soc_pin_info, 1028 int pins_cnt) 1029 { 1030 struct sprd_pinctrl *sprd_pctl; 1031 struct sprd_pinctrl_soc_info *pinctrl_info; 1032 struct pinctrl_pin_desc *pin_desc; 1033 struct resource *res; 1034 int ret, i; 1035 1036 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl), 1037 GFP_KERNEL); 1038 if (!sprd_pctl) 1039 return -ENOMEM; 1040 1041 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1042 sprd_pctl->base = devm_ioremap_resource(&pdev->dev, res); 1043 if (IS_ERR(sprd_pctl->base)) 1044 return PTR_ERR(sprd_pctl->base); 1045 1046 pinctrl_info = devm_kzalloc(&pdev->dev, 1047 sizeof(struct sprd_pinctrl_soc_info), 1048 GFP_KERNEL); 1049 if (!pinctrl_info) 1050 return -ENOMEM; 1051 1052 sprd_pctl->info = pinctrl_info; 1053 sprd_pctl->dev = &pdev->dev; 1054 platform_set_drvdata(pdev, sprd_pctl); 1055 1056 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt); 1057 if (ret) { 1058 dev_err(&pdev->dev, "fail to add pins information\n"); 1059 return ret; 1060 } 1061 1062 pin_desc = devm_kcalloc(&pdev->dev, 1063 pinctrl_info->npins, 1064 sizeof(struct pinctrl_pin_desc), 1065 GFP_KERNEL); 1066 if (!pin_desc) 1067 return -ENOMEM; 1068 1069 for (i = 0; i < pinctrl_info->npins; i++) { 1070 pin_desc[i].number = pinctrl_info->pins[i].number; 1071 pin_desc[i].name = pinctrl_info->pins[i].name; 1072 pin_desc[i].drv_data = pinctrl_info; 1073 } 1074 1075 sprd_pinctrl_desc.pins = pin_desc; 1076 sprd_pinctrl_desc.name = dev_name(&pdev->dev); 1077 sprd_pinctrl_desc.npins = pinctrl_info->npins; 1078 1079 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc, 1080 &pdev->dev, (void *)sprd_pctl); 1081 if (IS_ERR(sprd_pctl->pctl)) { 1082 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 1083 return PTR_ERR(sprd_pctl->pctl); 1084 } 1085 1086 ret = sprd_pinctrl_parse_dt(sprd_pctl); 1087 if (ret) { 1088 dev_err(&pdev->dev, "fail to parse dt properties\n"); 1089 pinctrl_unregister(sprd_pctl->pctl); 1090 return ret; 1091 } 1092 1093 return 0; 1094 } 1095 1096 int sprd_pinctrl_remove(struct platform_device *pdev) 1097 { 1098 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev); 1099 1100 pinctrl_unregister(sprd_pctl->pctl); 1101 return 0; 1102 } 1103 1104 void sprd_pinctrl_shutdown(struct platform_device *pdev) 1105 { 1106 struct pinctrl *pinctl; 1107 struct pinctrl_state *state; 1108 1109 pinctl = devm_pinctrl_get(&pdev->dev); 1110 if (IS_ERR(pinctl)) 1111 return; 1112 state = pinctrl_lookup_state(pinctl, "shutdown"); 1113 if (IS_ERR(state)) 1114 return; 1115 pinctrl_select_state(pinctl, state); 1116 } 1117 1118 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver"); 1119 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>"); 1120 MODULE_LICENSE("GPL v2"); 1121