1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Spreadtrum pin controller driver
4  * Copyright (C) 2017 Spreadtrum  - http://www.spreadtrum.com
5  */
6 
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/init.h>
10 #include <linux/io.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pinctrl/machine.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/slab.h>
22 
23 #include "../core.h"
24 #include "../pinmux.h"
25 #include "../pinconf.h"
26 #include "../pinctrl-utils.h"
27 #include "pinctrl-sprd.h"
28 
29 #define PINCTRL_BIT_MASK(width)		(~(~0UL << (width)))
30 #define PINCTRL_REG_OFFSET		0x20
31 #define PINCTRL_REG_MISC_OFFSET		0x4020
32 #define PINCTRL_REG_LEN			0x4
33 
34 #define PIN_FUNC_MASK			(BIT(4) | BIT(5))
35 #define PIN_FUNC_SEL_1			~PIN_FUNC_MASK
36 #define PIN_FUNC_SEL_2			BIT(4)
37 #define PIN_FUNC_SEL_3			BIT(5)
38 #define PIN_FUNC_SEL_4			PIN_FUNC_MASK
39 
40 #define AP_SLEEP_MODE			BIT(13)
41 #define PUBCP_SLEEP_MODE		BIT(14)
42 #define TGLDSP_SLEEP_MODE		BIT(15)
43 #define AGDSP_SLEEP_MODE		BIT(16)
44 #define SLEEP_MODE_MASK			GENMASK(3, 0)
45 #define SLEEP_MODE_SHIFT		13
46 
47 #define SLEEP_INPUT			BIT(1)
48 #define SLEEP_INPUT_MASK		0x1
49 #define SLEEP_INPUT_SHIFT		1
50 
51 #define SLEEP_OUTPUT			BIT(0)
52 #define SLEEP_OUTPUT_MASK		0x1
53 #define SLEEP_OUTPUT_SHIFT		0
54 
55 #define DRIVE_STRENGTH_MASK		GENMASK(3, 0)
56 #define DRIVE_STRENGTH_SHIFT		19
57 
58 #define SLEEP_PULL_DOWN			BIT(2)
59 #define SLEEP_PULL_DOWN_MASK		0x1
60 #define SLEEP_PULL_DOWN_SHIFT		2
61 
62 #define PULL_DOWN			BIT(6)
63 #define PULL_DOWN_MASK			0x1
64 #define PULL_DOWN_SHIFT			6
65 
66 #define SLEEP_PULL_UP			BIT(3)
67 #define SLEEP_PULL_UP_MASK		0x1
68 #define SLEEP_PULL_UP_SHIFT		3
69 
70 #define PULL_UP_20K			(BIT(12) | BIT(7))
71 #define PULL_UP_4_7K			BIT(12)
72 #define PULL_UP_MASK			0x21
73 #define PULL_UP_SHIFT			7
74 
75 #define INPUT_SCHMITT			BIT(11)
76 #define INPUT_SCHMITT_MASK		0x1
77 #define INPUT_SCHMITT_SHIFT		11
78 
79 enum pin_sleep_mode {
80 	AP_SLEEP = BIT(0),
81 	PUBCP_SLEEP = BIT(1),
82 	TGLDSP_SLEEP = BIT(2),
83 	AGDSP_SLEEP = BIT(3),
84 };
85 
86 enum pin_func_sel {
87 	PIN_FUNC_1,
88 	PIN_FUNC_2,
89 	PIN_FUNC_3,
90 	PIN_FUNC_4,
91 	PIN_FUNC_MAX,
92 };
93 
94 /**
95  * struct sprd_pin: represent one pin's description
96  * @name: pin name
97  * @number: pin number
98  * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
99  * @reg: pin register address
100  * @bit_offset: bit offset in pin register
101  * @bit_width: bit width in pin register
102  */
103 struct sprd_pin {
104 	const char *name;
105 	unsigned int number;
106 	enum pin_type type;
107 	unsigned long reg;
108 	unsigned long bit_offset;
109 	unsigned long bit_width;
110 };
111 
112 /**
113  * struct sprd_pin_group: represent one group's description
114  * @name: group name
115  * @npins: pin numbers of this group
116  * @pins: pointer to pins array
117  */
118 struct sprd_pin_group {
119 	const char *name;
120 	unsigned int npins;
121 	unsigned int *pins;
122 };
123 
124 /**
125  * struct sprd_pinctrl_soc_info: represent the SoC's pins description
126  * @groups: pointer to groups of pins
127  * @ngroups: group numbers of the whole SoC
128  * @pins: pointer to pins description
129  * @npins: pin numbers of the whole SoC
130  * @grp_names: pointer to group names array
131  */
132 struct sprd_pinctrl_soc_info {
133 	struct sprd_pin_group *groups;
134 	unsigned int ngroups;
135 	struct sprd_pin *pins;
136 	unsigned int npins;
137 	const char **grp_names;
138 };
139 
140 /**
141  * struct sprd_pinctrl: represent the pin controller device
142  * @dev: pointer to the device structure
143  * @pctl: pointer to the pinctrl handle
144  * @base: base address of the controller
145  * @info: pointer to SoC's pins description information
146  */
147 struct sprd_pinctrl {
148 	struct device *dev;
149 	struct pinctrl_dev *pctl;
150 	void __iomem *base;
151 	struct sprd_pinctrl_soc_info *info;
152 };
153 
154 #define SPRD_PIN_CONFIG_CONTROL		(PIN_CONFIG_END + 1)
155 #define SPRD_PIN_CONFIG_SLEEP_MODE	(PIN_CONFIG_END + 2)
156 
157 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
158 				       const char *name)
159 {
160 	struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
161 	int i;
162 
163 	for (i = 0; i < info->npins; i++) {
164 		if (!strcmp(info->pins[i].name, name))
165 			return info->pins[i].number;
166 	}
167 
168 	return -ENODEV;
169 }
170 
171 static struct sprd_pin *
172 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
173 {
174 	struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
175 	struct sprd_pin *pin = NULL;
176 	int i;
177 
178 	for (i = 0; i < info->npins; i++) {
179 		if (info->pins[i].number == id) {
180 			pin = &info->pins[i];
181 			break;
182 		}
183 	}
184 
185 	return pin;
186 }
187 
188 static const struct sprd_pin_group *
189 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
190 				const char *name)
191 {
192 	struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
193 	const struct sprd_pin_group *grp = NULL;
194 	int i;
195 
196 	for (i = 0; i < info->ngroups; i++) {
197 		if (!strcmp(info->groups[i].name, name)) {
198 			grp = &info->groups[i];
199 			break;
200 		}
201 	}
202 
203 	return grp;
204 }
205 
206 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
207 {
208 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
209 	struct sprd_pinctrl_soc_info *info = pctl->info;
210 
211 	return info->ngroups;
212 }
213 
214 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
215 					 unsigned int selector)
216 {
217 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
218 	struct sprd_pinctrl_soc_info *info = pctl->info;
219 
220 	return info->groups[selector].name;
221 }
222 
223 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
224 				 unsigned int selector,
225 				 const unsigned int **pins,
226 				 unsigned int *npins)
227 {
228 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
229 	struct sprd_pinctrl_soc_info *info = pctl->info;
230 
231 	if (selector >= info->ngroups)
232 		return -EINVAL;
233 
234 	*pins = info->groups[selector].pins;
235 	*npins = info->groups[selector].npins;
236 
237 	return 0;
238 }
239 
240 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
241 			       struct device_node *np,
242 			       struct pinctrl_map **map,
243 			       unsigned int *num_maps)
244 {
245 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
246 	const struct sprd_pin_group *grp;
247 	unsigned long *configs = NULL;
248 	unsigned int num_configs = 0;
249 	unsigned int reserved_maps = 0;
250 	unsigned int reserve = 0;
251 	const char *function;
252 	enum pinctrl_map_type type;
253 	int ret;
254 
255 	grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
256 	if (!grp) {
257 		dev_err(pctl->dev, "unable to find group for node %s\n",
258 			of_node_full_name(np));
259 		return -EINVAL;
260 	}
261 
262 	ret = of_property_count_strings(np, "pins");
263 	if (ret < 0)
264 		return ret;
265 
266 	if (ret == 1)
267 		type = PIN_MAP_TYPE_CONFIGS_PIN;
268 	else
269 		type = PIN_MAP_TYPE_CONFIGS_GROUP;
270 
271 	ret = of_property_read_string(np, "function", &function);
272 	if (ret < 0) {
273 		if (ret != -EINVAL)
274 			dev_err(pctl->dev,
275 				"%s: could not parse property function\n",
276 				of_node_full_name(np));
277 		function = NULL;
278 	}
279 
280 	ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
281 					      &num_configs);
282 	if (ret < 0) {
283 		dev_err(pctl->dev, "%s: could not parse node property\n",
284 			of_node_full_name(np));
285 		return ret;
286 	}
287 
288 	*map = NULL;
289 	*num_maps = 0;
290 
291 	if (function != NULL)
292 		reserve++;
293 	if (num_configs)
294 		reserve++;
295 
296 	ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
297 					num_maps, reserve);
298 	if (ret < 0)
299 		goto out;
300 
301 	if (function) {
302 		ret = pinctrl_utils_add_map_mux(pctldev, map,
303 						&reserved_maps, num_maps,
304 						grp->name, function);
305 		if (ret < 0)
306 			goto out;
307 	}
308 
309 	if (num_configs) {
310 		const char *group_or_pin;
311 		unsigned int pin_id;
312 
313 		if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
314 			pin_id = grp->pins[0];
315 			group_or_pin = pin_get_name(pctldev, pin_id);
316 		} else {
317 			group_or_pin = grp->name;
318 		}
319 
320 		ret = pinctrl_utils_add_map_configs(pctldev, map,
321 						    &reserved_maps, num_maps,
322 						    group_or_pin, configs,
323 						    num_configs, type);
324 	}
325 
326 out:
327 	kfree(configs);
328 	return ret;
329 }
330 
331 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
332 				unsigned int offset)
333 {
334 	seq_printf(s, "%s", dev_name(pctldev->dev));
335 }
336 
337 static const struct pinctrl_ops sprd_pctrl_ops = {
338 	.get_groups_count = sprd_pctrl_group_count,
339 	.get_group_name = sprd_pctrl_group_name,
340 	.get_group_pins = sprd_pctrl_group_pins,
341 	.pin_dbg_show = sprd_pctrl_dbg_show,
342 	.dt_node_to_map = sprd_dt_node_to_map,
343 	.dt_free_map = pinctrl_utils_free_map,
344 };
345 
346 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
347 {
348 	return PIN_FUNC_MAX;
349 }
350 
351 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
352 					      unsigned int selector)
353 {
354 	switch (selector) {
355 	case PIN_FUNC_1:
356 		return "func1";
357 	case PIN_FUNC_2:
358 		return "func2";
359 	case PIN_FUNC_3:
360 		return "func3";
361 	case PIN_FUNC_4:
362 		return "func4";
363 	default:
364 		return "null";
365 	}
366 }
367 
368 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
369 					unsigned int selector,
370 					const char * const **groups,
371 					unsigned int * const num_groups)
372 {
373 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
374 	struct sprd_pinctrl_soc_info *info = pctl->info;
375 
376 	*groups = info->grp_names;
377 	*num_groups = info->ngroups;
378 
379 	return 0;
380 }
381 
382 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
383 			    unsigned int func_selector,
384 			    unsigned int group_selector)
385 {
386 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
387 	struct sprd_pinctrl_soc_info *info = pctl->info;
388 	struct sprd_pin_group *grp = &info->groups[group_selector];
389 	unsigned int i, grp_pins = grp->npins;
390 	unsigned long reg;
391 	unsigned int val = 0;
392 
393 	if (group_selector >= info->ngroups)
394 		return -EINVAL;
395 
396 	switch (func_selector) {
397 	case PIN_FUNC_1:
398 		val &= PIN_FUNC_SEL_1;
399 		break;
400 	case PIN_FUNC_2:
401 		val |= PIN_FUNC_SEL_2;
402 		break;
403 	case PIN_FUNC_3:
404 		val |= PIN_FUNC_SEL_3;
405 		break;
406 	case PIN_FUNC_4:
407 		val |= PIN_FUNC_SEL_4;
408 		break;
409 	default:
410 		break;
411 	}
412 
413 	for (i = 0; i < grp_pins; i++) {
414 		unsigned int pin_id = grp->pins[i];
415 		struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
416 
417 		if (!pin || pin->type != COMMON_PIN)
418 			continue;
419 
420 		reg = readl((void __iomem *)pin->reg);
421 		reg &= ~PIN_FUNC_MASK;
422 		reg |= val;
423 		writel(reg, (void __iomem *)pin->reg);
424 	}
425 
426 	return 0;
427 }
428 
429 static const struct pinmux_ops sprd_pmx_ops = {
430 	.get_functions_count = sprd_pmx_get_function_count,
431 	.get_function_name = sprd_pmx_get_function_name,
432 	.get_function_groups = sprd_pmx_get_function_groups,
433 	.set_mux = sprd_pmx_set_mux,
434 };
435 
436 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
437 			    unsigned long *config)
438 {
439 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
440 	struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
441 	unsigned int param = pinconf_to_config_param(*config);
442 	unsigned int reg, arg;
443 
444 	if (!pin)
445 		return -EINVAL;
446 
447 	if (pin->type == GLOBAL_CTRL_PIN) {
448 		reg = (readl((void __iomem *)pin->reg) >>
449 			   pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
450 	} else {
451 		reg = readl((void __iomem *)pin->reg);
452 	}
453 
454 	if (pin->type == GLOBAL_CTRL_PIN &&
455 	    param == SPRD_PIN_CONFIG_CONTROL) {
456 		arg = reg;
457 	} else if (pin->type == COMMON_PIN) {
458 		switch (param) {
459 		case SPRD_PIN_CONFIG_SLEEP_MODE:
460 			arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
461 			break;
462 		case PIN_CONFIG_INPUT_ENABLE:
463 			arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
464 			break;
465 		case PIN_CONFIG_OUTPUT:
466 			arg = reg & SLEEP_OUTPUT_MASK;
467 			break;
468 		case PIN_CONFIG_SLEEP_HARDWARE_STATE:
469 			arg = 0;
470 			break;
471 		default:
472 			return -ENOTSUPP;
473 		}
474 	} else if (pin->type == MISC_PIN) {
475 		switch (param) {
476 		case PIN_CONFIG_DRIVE_STRENGTH:
477 			arg = (reg >> DRIVE_STRENGTH_SHIFT) &
478 				DRIVE_STRENGTH_MASK;
479 			break;
480 		case PIN_CONFIG_BIAS_PULL_DOWN:
481 			/* combine sleep pull down and pull down config */
482 			arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
483 			       SLEEP_PULL_DOWN_MASK) << 16;
484 			arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
485 			break;
486 		case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
487 			arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
488 			break;
489 		case PIN_CONFIG_BIAS_PULL_UP:
490 			/* combine sleep pull up and pull up config */
491 			arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
492 			       SLEEP_PULL_UP_MASK) << 16;
493 			arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
494 			break;
495 		case PIN_CONFIG_SLEEP_HARDWARE_STATE:
496 			arg = 0;
497 			break;
498 		default:
499 			return -ENOTSUPP;
500 		}
501 	} else {
502 		return -ENOTSUPP;
503 	}
504 
505 	*config = pinconf_to_config_packed(param, arg);
506 	return 0;
507 }
508 
509 static unsigned int sprd_pinconf_drive(unsigned int mA)
510 {
511 	unsigned int val = 0;
512 
513 	switch (mA) {
514 	case 2:
515 		break;
516 	case 4:
517 		val |= BIT(19);
518 		break;
519 	case 6:
520 		val |= BIT(20);
521 		break;
522 	case 8:
523 		val |= BIT(19) | BIT(20);
524 		break;
525 	case 10:
526 		val |= BIT(21);
527 		break;
528 	case 12:
529 		val |= BIT(21) | BIT(19);
530 		break;
531 	case 14:
532 		val |= BIT(21) | BIT(20);
533 		break;
534 	case 16:
535 		val |= BIT(19) | BIT(20) | BIT(21);
536 		break;
537 	case 20:
538 		val |= BIT(22);
539 		break;
540 	case 21:
541 		val |= BIT(22) | BIT(19);
542 		break;
543 	case 24:
544 		val |= BIT(22) | BIT(20);
545 		break;
546 	case 25:
547 		val |= BIT(22) | BIT(20) | BIT(19);
548 		break;
549 	case 27:
550 		val |= BIT(22) | BIT(21);
551 		break;
552 	case 29:
553 		val |= BIT(22) | BIT(21) | BIT(19);
554 		break;
555 	case 31:
556 		val |= BIT(22) | BIT(21) | BIT(20);
557 		break;
558 	case 33:
559 		val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
560 		break;
561 	default:
562 		break;
563 	}
564 
565 	return val;
566 }
567 
568 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
569 					    unsigned int num_configs)
570 {
571 	unsigned int param;
572 	int i;
573 
574 	for (i = 0; i < num_configs; i++) {
575 		param = pinconf_to_config_param(configs[i]);
576 		if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
577 			return true;
578 	}
579 
580 	return false;
581 }
582 
583 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
584 			    unsigned long *configs, unsigned int num_configs)
585 {
586 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
587 	struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
588 	bool is_sleep_config;
589 	unsigned long reg;
590 	int i;
591 
592 	if (!pin)
593 		return -EINVAL;
594 
595 	is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
596 
597 	for (i = 0; i < num_configs; i++) {
598 		unsigned int param, arg, shift, mask, val;
599 
600 		param = pinconf_to_config_param(configs[i]);
601 		arg = pinconf_to_config_argument(configs[i]);
602 
603 		val = 0;
604 		shift = 0;
605 		mask = 0;
606 		if (pin->type == GLOBAL_CTRL_PIN &&
607 		    param == SPRD_PIN_CONFIG_CONTROL) {
608 			val = arg;
609 		} else if (pin->type == COMMON_PIN) {
610 			switch (param) {
611 			case SPRD_PIN_CONFIG_SLEEP_MODE:
612 				if (arg & AP_SLEEP)
613 					val |= AP_SLEEP_MODE;
614 				if (arg & PUBCP_SLEEP)
615 					val |= PUBCP_SLEEP_MODE;
616 				if (arg & TGLDSP_SLEEP)
617 					val |= TGLDSP_SLEEP_MODE;
618 				if (arg & AGDSP_SLEEP)
619 					val |= AGDSP_SLEEP_MODE;
620 
621 				mask = SLEEP_MODE_MASK;
622 				shift = SLEEP_MODE_SHIFT;
623 				break;
624 			case PIN_CONFIG_INPUT_ENABLE:
625 				if (is_sleep_config == true) {
626 					if (arg > 0)
627 						val |= SLEEP_INPUT;
628 					else
629 						val &= ~SLEEP_INPUT;
630 
631 					mask = SLEEP_INPUT_MASK;
632 					shift = SLEEP_INPUT_SHIFT;
633 				}
634 				break;
635 			case PIN_CONFIG_OUTPUT:
636 				if (is_sleep_config == true) {
637 					val |= SLEEP_OUTPUT;
638 					mask = SLEEP_OUTPUT_MASK;
639 					shift = SLEEP_OUTPUT_SHIFT;
640 				}
641 				break;
642 			case PIN_CONFIG_SLEEP_HARDWARE_STATE:
643 				continue;
644 			default:
645 				return -ENOTSUPP;
646 			}
647 		} else if (pin->type == MISC_PIN) {
648 			switch (param) {
649 			case PIN_CONFIG_DRIVE_STRENGTH:
650 				if (arg < 2 || arg > 60)
651 					return -EINVAL;
652 
653 				val = sprd_pinconf_drive(arg);
654 				mask = DRIVE_STRENGTH_MASK;
655 				shift = DRIVE_STRENGTH_SHIFT;
656 				break;
657 			case PIN_CONFIG_BIAS_PULL_DOWN:
658 				if (is_sleep_config == true) {
659 					val |= SLEEP_PULL_DOWN;
660 					mask = SLEEP_PULL_DOWN_MASK;
661 					shift = SLEEP_PULL_DOWN_SHIFT;
662 				} else {
663 					val |= PULL_DOWN;
664 					mask = PULL_DOWN_MASK;
665 					shift = PULL_DOWN_SHIFT;
666 				}
667 				break;
668 			case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
669 				if (arg > 0)
670 					val |= INPUT_SCHMITT;
671 				else
672 					val &= ~INPUT_SCHMITT;
673 
674 				mask = INPUT_SCHMITT_MASK;
675 				shift = INPUT_SCHMITT_SHIFT;
676 				break;
677 			case PIN_CONFIG_BIAS_PULL_UP:
678 				if (is_sleep_config == true) {
679 					val |= SLEEP_PULL_UP;
680 					mask = SLEEP_PULL_UP_MASK;
681 					shift = SLEEP_PULL_UP_SHIFT;
682 				} else {
683 					if (arg == 20000)
684 						val |= PULL_UP_20K;
685 					else if (arg == 4700)
686 						val |= PULL_UP_4_7K;
687 
688 					mask = PULL_UP_MASK;
689 					shift = PULL_UP_SHIFT;
690 				}
691 				break;
692 			case PIN_CONFIG_SLEEP_HARDWARE_STATE:
693 				continue;
694 			default:
695 				return -ENOTSUPP;
696 			}
697 		} else {
698 			return -ENOTSUPP;
699 		}
700 
701 		if (pin->type == GLOBAL_CTRL_PIN) {
702 			reg = readl((void __iomem *)pin->reg);
703 			reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
704 				<< pin->bit_offset);
705 			reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
706 				<< pin->bit_offset;
707 			writel(reg, (void __iomem *)pin->reg);
708 		} else {
709 			reg = readl((void __iomem *)pin->reg);
710 			reg &= ~(mask << shift);
711 			reg |= val;
712 			writel(reg, (void __iomem *)pin->reg);
713 		}
714 	}
715 
716 	return 0;
717 }
718 
719 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
720 				  unsigned int selector, unsigned long *config)
721 {
722 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
723 	struct sprd_pinctrl_soc_info *info = pctl->info;
724 	struct sprd_pin_group *grp;
725 	unsigned int pin_id;
726 
727 	if (selector >= info->ngroups)
728 		return -EINVAL;
729 
730 	grp = &info->groups[selector];
731 	pin_id = grp->pins[0];
732 
733 	return sprd_pinconf_get(pctldev, pin_id, config);
734 }
735 
736 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
737 				  unsigned int selector,
738 				  unsigned long *configs,
739 				  unsigned int num_configs)
740 {
741 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
742 	struct sprd_pinctrl_soc_info *info = pctl->info;
743 	struct sprd_pin_group *grp;
744 	int ret, i;
745 
746 	if (selector >= info->ngroups)
747 		return -EINVAL;
748 
749 	grp = &info->groups[selector];
750 
751 	for (i = 0; i < grp->npins; i++) {
752 		unsigned int pin_id = grp->pins[i];
753 
754 		ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
755 		if (ret)
756 			return ret;
757 	}
758 
759 	return 0;
760 }
761 
762 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
763 				   unsigned int pin_id,
764 				   unsigned long *config)
765 {
766 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
767 	struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
768 
769 	if (!pin)
770 		return -EINVAL;
771 
772 	if (pin->type == GLOBAL_CTRL_PIN) {
773 		*config = (readl((void __iomem *)pin->reg) >>
774 			   pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
775 	} else {
776 		*config = readl((void __iomem *)pin->reg);
777 	}
778 
779 	return 0;
780 }
781 
782 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
783 				  struct seq_file *s, unsigned int pin_id)
784 {
785 	unsigned long config;
786 	int ret;
787 
788 	ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
789 	if (ret)
790 		return;
791 
792 	seq_printf(s, "0x%lx", config);
793 }
794 
795 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
796 					struct seq_file *s,
797 					unsigned int selector)
798 {
799 	struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
800 	struct sprd_pinctrl_soc_info *info = pctl->info;
801 	struct sprd_pin_group *grp;
802 	unsigned long config;
803 	const char *name;
804 	int i, ret;
805 
806 	if (selector >= info->ngroups)
807 		return;
808 
809 	grp = &info->groups[selector];
810 
811 	seq_putc(s, '\n');
812 	for (i = 0; i < grp->npins; i++, config++) {
813 		unsigned int pin_id = grp->pins[i];
814 
815 		name = pin_get_name(pctldev, pin_id);
816 		ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
817 		if (ret)
818 			return;
819 
820 		seq_printf(s, "%s: 0x%lx ", name, config);
821 	}
822 }
823 
824 static const struct pinconf_ops sprd_pinconf_ops = {
825 	.is_generic = true,
826 	.pin_config_get = sprd_pinconf_get,
827 	.pin_config_set = sprd_pinconf_set,
828 	.pin_config_group_get = sprd_pinconf_group_get,
829 	.pin_config_group_set = sprd_pinconf_group_set,
830 	.pin_config_dbg_show = sprd_pinconf_dbg_show,
831 	.pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
832 };
833 
834 static const struct pinconf_generic_params sprd_dt_params[] = {
835 	{"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
836 	{"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
837 };
838 
839 #ifdef CONFIG_DEBUG_FS
840 static const struct pin_config_item sprd_conf_items[] = {
841 	PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
842 	PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
843 };
844 #endif
845 
846 static struct pinctrl_desc sprd_pinctrl_desc = {
847 	.pctlops = &sprd_pctrl_ops,
848 	.pmxops = &sprd_pmx_ops,
849 	.confops = &sprd_pinconf_ops,
850 	.num_custom_params = ARRAY_SIZE(sprd_dt_params),
851 	.custom_params = sprd_dt_params,
852 #ifdef CONFIG_DEBUG_FS
853 	.custom_conf_items = sprd_conf_items,
854 #endif
855 	.owner = THIS_MODULE,
856 };
857 
858 static int sprd_pinctrl_parse_groups(struct device_node *np,
859 				     struct sprd_pinctrl *sprd_pctl,
860 				     struct sprd_pin_group *grp)
861 {
862 	struct property *prop;
863 	const char *pin_name;
864 	int ret, i = 0;
865 
866 	ret = of_property_count_strings(np, "pins");
867 	if (ret < 0)
868 		return ret;
869 
870 	grp->name = np->name;
871 	grp->npins = ret;
872 	grp->pins = devm_kcalloc(sprd_pctl->dev,
873 				 grp->npins, sizeof(unsigned int),
874 				 GFP_KERNEL);
875 	if (!grp->pins)
876 		return -ENOMEM;
877 
878 	of_property_for_each_string(np, "pins", prop, pin_name) {
879 		ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
880 		if (ret >= 0)
881 			grp->pins[i++] = ret;
882 	}
883 
884 	for (i = 0; i < grp->npins; i++) {
885 		dev_dbg(sprd_pctl->dev,
886 			"Group[%s] contains [%d] pins: id = %d\n",
887 			grp->name, grp->npins, grp->pins[i]);
888 	}
889 
890 	return 0;
891 }
892 
893 static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
894 {
895 	struct device_node *child;
896 	unsigned int group_cnt, cnt;
897 
898 	group_cnt = of_get_child_count(np);
899 
900 	for_each_child_of_node(np, child) {
901 		cnt = of_get_child_count(child);
902 		if (cnt > 0)
903 			group_cnt += cnt;
904 	}
905 
906 	return group_cnt;
907 }
908 
909 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
910 {
911 	struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
912 	struct device_node *np = sprd_pctl->dev->of_node;
913 	struct device_node *child, *sub_child;
914 	struct sprd_pin_group *grp;
915 	const char **temp;
916 	int ret;
917 
918 	if (!np)
919 		return -ENODEV;
920 
921 	info->ngroups = sprd_pinctrl_get_groups(np);
922 	if (!info->ngroups)
923 		return 0;
924 
925 	info->groups = devm_kcalloc(sprd_pctl->dev,
926 				    info->ngroups,
927 				    sizeof(struct sprd_pin_group),
928 				    GFP_KERNEL);
929 	if (!info->groups)
930 		return -ENOMEM;
931 
932 	info->grp_names = devm_kcalloc(sprd_pctl->dev,
933 				       info->ngroups, sizeof(char *),
934 				       GFP_KERNEL);
935 	if (!info->grp_names)
936 		return -ENOMEM;
937 
938 	temp = info->grp_names;
939 	grp = info->groups;
940 
941 	for_each_child_of_node(np, child) {
942 		ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
943 		if (ret)
944 			return ret;
945 
946 		*temp++ = grp->name;
947 		grp++;
948 
949 		if (of_get_child_count(child) > 0) {
950 			for_each_child_of_node(child, sub_child) {
951 				ret = sprd_pinctrl_parse_groups(sub_child,
952 								sprd_pctl, grp);
953 				if (ret)
954 					return ret;
955 
956 				*temp++ = grp->name;
957 				grp++;
958 			}
959 		}
960 	}
961 
962 	return 0;
963 }
964 
965 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
966 				 struct sprd_pins_info *sprd_soc_pin_info,
967 				 int pins_cnt)
968 {
969 	struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
970 	unsigned int ctrl_pin = 0, com_pin = 0;
971 	struct sprd_pin *pin;
972 	int i;
973 
974 	info->npins = pins_cnt;
975 	info->pins = devm_kcalloc(sprd_pctl->dev,
976 				  info->npins, sizeof(struct sprd_pin),
977 				  GFP_KERNEL);
978 	if (!info->pins)
979 		return -ENOMEM;
980 
981 	for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
982 		unsigned int reg;
983 
984 		pin->name = sprd_soc_pin_info[i].name;
985 		pin->type = sprd_soc_pin_info[i].type;
986 		pin->number = sprd_soc_pin_info[i].num;
987 		reg = sprd_soc_pin_info[i].reg;
988 		if (pin->type == GLOBAL_CTRL_PIN) {
989 			pin->reg = (unsigned long)sprd_pctl->base +
990 				PINCTRL_REG_LEN * reg;
991 			pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
992 			pin->bit_width = sprd_soc_pin_info[i].bit_width;
993 			ctrl_pin++;
994 		} else if (pin->type == COMMON_PIN) {
995 			pin->reg = (unsigned long)sprd_pctl->base +
996 				PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
997 				(i - ctrl_pin);
998 			com_pin++;
999 		} else if (pin->type == MISC_PIN) {
1000 			pin->reg = (unsigned long)sprd_pctl->base +
1001 				PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
1002 				(i - ctrl_pin - com_pin);
1003 		}
1004 	}
1005 
1006 	for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
1007 		dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
1008 			"bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
1009 			pin->name, pin->number, pin->type,
1010 			pin->bit_offset, pin->bit_width, pin->reg);
1011 	}
1012 
1013 	return 0;
1014 }
1015 
1016 int sprd_pinctrl_core_probe(struct platform_device *pdev,
1017 			    struct sprd_pins_info *sprd_soc_pin_info,
1018 			    int pins_cnt)
1019 {
1020 	struct sprd_pinctrl *sprd_pctl;
1021 	struct sprd_pinctrl_soc_info *pinctrl_info;
1022 	struct pinctrl_pin_desc *pin_desc;
1023 	struct resource *res;
1024 	int ret, i;
1025 
1026 	sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
1027 				 GFP_KERNEL);
1028 	if (!sprd_pctl)
1029 		return -ENOMEM;
1030 
1031 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1032 	sprd_pctl->base = devm_ioremap_resource(&pdev->dev, res);
1033 	if (IS_ERR(sprd_pctl->base))
1034 		return PTR_ERR(sprd_pctl->base);
1035 
1036 	pinctrl_info = devm_kzalloc(&pdev->dev,
1037 				    sizeof(struct sprd_pinctrl_soc_info),
1038 				    GFP_KERNEL);
1039 	if (!pinctrl_info)
1040 		return -ENOMEM;
1041 
1042 	sprd_pctl->info = pinctrl_info;
1043 	sprd_pctl->dev = &pdev->dev;
1044 	platform_set_drvdata(pdev, sprd_pctl);
1045 
1046 	ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
1047 	if (ret) {
1048 		dev_err(&pdev->dev, "fail to add pins information\n");
1049 		return ret;
1050 	}
1051 
1052 	ret = sprd_pinctrl_parse_dt(sprd_pctl);
1053 	if (ret) {
1054 		dev_err(&pdev->dev, "fail to parse dt properties\n");
1055 		return ret;
1056 	}
1057 
1058 	pin_desc = devm_kcalloc(&pdev->dev,
1059 				pinctrl_info->npins,
1060 				sizeof(struct pinctrl_pin_desc),
1061 				GFP_KERNEL);
1062 	if (!pin_desc)
1063 		return -ENOMEM;
1064 
1065 	for (i = 0; i < pinctrl_info->npins; i++) {
1066 		pin_desc[i].number = pinctrl_info->pins[i].number;
1067 		pin_desc[i].name = pinctrl_info->pins[i].name;
1068 		pin_desc[i].drv_data = pinctrl_info;
1069 	}
1070 
1071 	sprd_pinctrl_desc.pins = pin_desc;
1072 	sprd_pinctrl_desc.name = dev_name(&pdev->dev);
1073 	sprd_pinctrl_desc.npins = pinctrl_info->npins;
1074 
1075 	sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
1076 					   &pdev->dev, (void *)sprd_pctl);
1077 	if (IS_ERR(sprd_pctl->pctl)) {
1078 		dev_err(&pdev->dev, "could not register pinctrl driver\n");
1079 		return PTR_ERR(sprd_pctl->pctl);
1080 	}
1081 
1082 	return 0;
1083 }
1084 
1085 int sprd_pinctrl_remove(struct platform_device *pdev)
1086 {
1087 	struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
1088 
1089 	pinctrl_unregister(sprd_pctl->pctl);
1090 	return 0;
1091 }
1092 
1093 void sprd_pinctrl_shutdown(struct platform_device *pdev)
1094 {
1095 	struct pinctrl *pinctl;
1096 	struct pinctrl_state *state;
1097 
1098 	pinctl = devm_pinctrl_get(&pdev->dev);
1099 	if (IS_ERR(pinctl))
1100 		return;
1101 	state = pinctrl_lookup_state(pinctl, "shutdown");
1102 	if (IS_ERR(state))
1103 		return;
1104 	pinctrl_select_state(pinctl, state);
1105 }
1106 
1107 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
1108 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
1109 MODULE_LICENSE("GPL v2");
1110