1 /* 2 * Driver for the ST Microelectronics SPEAr pinmux 3 * 4 * Copyright (C) 2012 ST Microelectronics 5 * Viresh Kumar <vireshk@kernel.org> 6 * 7 * Inspired from: 8 * - U300 Pinctl drivers 9 * - Tegra Pinctl drivers 10 * 11 * This file is licensed under the terms of the GNU General Public 12 * License version 2. This program is licensed "as is" without any 13 * warranty of any kind, whether express or implied. 14 */ 15 16 #include <linux/err.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_address.h> 21 #include <linux/of_gpio.h> 22 #include <linux/platform_device.h> 23 #include <linux/seq_file.h> 24 #include <linux/slab.h> 25 26 #include <linux/pinctrl/machine.h> 27 #include <linux/pinctrl/pinctrl.h> 28 #include <linux/pinctrl/pinmux.h> 29 30 #include "pinctrl-spear.h" 31 32 #define DRIVER_NAME "spear-pinmux" 33 34 static void muxregs_endisable(struct spear_pmx *pmx, 35 struct spear_muxreg *muxregs, u8 count, bool enable) 36 { 37 struct spear_muxreg *muxreg; 38 u32 val, temp, j; 39 40 for (j = 0; j < count; j++) { 41 muxreg = &muxregs[j]; 42 43 val = pmx_readl(pmx, muxreg->reg); 44 val &= ~muxreg->mask; 45 46 if (enable) 47 temp = muxreg->val; 48 else 49 temp = ~muxreg->val; 50 51 val |= muxreg->mask & temp; 52 pmx_writel(pmx, val, muxreg->reg); 53 } 54 } 55 56 static int set_mode(struct spear_pmx *pmx, int mode) 57 { 58 struct spear_pmx_mode *pmx_mode = NULL; 59 int i; 60 u32 val; 61 62 if (!pmx->machdata->pmx_modes || !pmx->machdata->npmx_modes) 63 return -EINVAL; 64 65 for (i = 0; i < pmx->machdata->npmx_modes; i++) { 66 if (pmx->machdata->pmx_modes[i]->mode == (1 << mode)) { 67 pmx_mode = pmx->machdata->pmx_modes[i]; 68 break; 69 } 70 } 71 72 if (!pmx_mode) 73 return -EINVAL; 74 75 val = pmx_readl(pmx, pmx_mode->reg); 76 val &= ~pmx_mode->mask; 77 val |= pmx_mode->val; 78 pmx_writel(pmx, val, pmx_mode->reg); 79 80 pmx->machdata->mode = pmx_mode->mode; 81 dev_info(pmx->dev, "Configured Mode: %s with id: %x\n\n", 82 pmx_mode->name ? pmx_mode->name : "no_name", 83 pmx_mode->reg); 84 85 return 0; 86 } 87 88 void pmx_init_gpio_pingroup_addr(struct spear_gpio_pingroup *gpio_pingroup, 89 unsigned count, u16 reg) 90 { 91 int i, j; 92 93 for (i = 0; i < count; i++) 94 for (j = 0; j < gpio_pingroup[i].nmuxregs; j++) 95 gpio_pingroup[i].muxregs[j].reg = reg; 96 } 97 98 void pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg) 99 { 100 struct spear_pingroup *pgroup; 101 struct spear_modemux *modemux; 102 int i, j, group; 103 104 for (group = 0; group < machdata->ngroups; group++) { 105 pgroup = machdata->groups[group]; 106 107 for (i = 0; i < pgroup->nmodemuxs; i++) { 108 modemux = &pgroup->modemuxs[i]; 109 110 for (j = 0; j < modemux->nmuxregs; j++) 111 if (modemux->muxregs[j].reg == 0xFFFF) 112 modemux->muxregs[j].reg = reg; 113 } 114 } 115 } 116 117 static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev) 118 { 119 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 120 121 return pmx->machdata->ngroups; 122 } 123 124 static const char *spear_pinctrl_get_group_name(struct pinctrl_dev *pctldev, 125 unsigned group) 126 { 127 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 128 129 return pmx->machdata->groups[group]->name; 130 } 131 132 static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, 133 unsigned group, const unsigned **pins, unsigned *num_pins) 134 { 135 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 136 137 *pins = pmx->machdata->groups[group]->pins; 138 *num_pins = pmx->machdata->groups[group]->npins; 139 140 return 0; 141 } 142 143 static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev, 144 struct seq_file *s, unsigned offset) 145 { 146 seq_printf(s, " " DRIVER_NAME); 147 } 148 149 static int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, 150 struct device_node *np_config, 151 struct pinctrl_map **map, 152 unsigned *num_maps) 153 { 154 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 155 struct device_node *np; 156 struct property *prop; 157 const char *function, *group; 158 int ret, index = 0, count = 0; 159 160 /* calculate number of maps required */ 161 for_each_child_of_node(np_config, np) { 162 ret = of_property_read_string(np, "st,function", &function); 163 if (ret < 0) { 164 of_node_put(np); 165 return ret; 166 } 167 168 ret = of_property_count_strings(np, "st,pins"); 169 if (ret < 0) { 170 of_node_put(np); 171 return ret; 172 } 173 174 count += ret; 175 } 176 177 if (!count) { 178 dev_err(pmx->dev, "No child nodes passed via DT\n"); 179 return -ENODEV; 180 } 181 182 *map = kcalloc(count, sizeof(**map), GFP_KERNEL); 183 if (!*map) 184 return -ENOMEM; 185 186 for_each_child_of_node(np_config, np) { 187 of_property_read_string(np, "st,function", &function); 188 of_property_for_each_string(np, "st,pins", prop, group) { 189 (*map)[index].type = PIN_MAP_TYPE_MUX_GROUP; 190 (*map)[index].data.mux.group = group; 191 (*map)[index].data.mux.function = function; 192 index++; 193 } 194 } 195 196 *num_maps = count; 197 198 return 0; 199 } 200 201 static void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, 202 struct pinctrl_map *map, 203 unsigned num_maps) 204 { 205 kfree(map); 206 } 207 208 static const struct pinctrl_ops spear_pinctrl_ops = { 209 .get_groups_count = spear_pinctrl_get_groups_cnt, 210 .get_group_name = spear_pinctrl_get_group_name, 211 .get_group_pins = spear_pinctrl_get_group_pins, 212 .pin_dbg_show = spear_pinctrl_pin_dbg_show, 213 .dt_node_to_map = spear_pinctrl_dt_node_to_map, 214 .dt_free_map = spear_pinctrl_dt_free_map, 215 }; 216 217 static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev) 218 { 219 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 220 221 return pmx->machdata->nfunctions; 222 } 223 224 static const char *spear_pinctrl_get_func_name(struct pinctrl_dev *pctldev, 225 unsigned function) 226 { 227 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 228 229 return pmx->machdata->functions[function]->name; 230 } 231 232 static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev, 233 unsigned function, const char *const **groups, 234 unsigned * const ngroups) 235 { 236 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 237 238 *groups = pmx->machdata->functions[function]->groups; 239 *ngroups = pmx->machdata->functions[function]->ngroups; 240 241 return 0; 242 } 243 244 static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, 245 unsigned function, unsigned group, bool enable) 246 { 247 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 248 const struct spear_pingroup *pgroup; 249 const struct spear_modemux *modemux; 250 int i; 251 bool found = false; 252 253 pgroup = pmx->machdata->groups[group]; 254 255 for (i = 0; i < pgroup->nmodemuxs; i++) { 256 modemux = &pgroup->modemuxs[i]; 257 258 /* SoC have any modes */ 259 if (pmx->machdata->modes_supported) { 260 if (!(pmx->machdata->mode & modemux->modes)) 261 continue; 262 } 263 264 found = true; 265 muxregs_endisable(pmx, modemux->muxregs, modemux->nmuxregs, 266 enable); 267 } 268 269 if (!found) { 270 dev_err(pmx->dev, "pinmux group: %s not supported\n", 271 pgroup->name); 272 return -ENODEV; 273 } 274 275 return 0; 276 } 277 278 static int spear_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned function, 279 unsigned group) 280 { 281 return spear_pinctrl_endisable(pctldev, function, group, true); 282 } 283 284 /* gpio with pinmux */ 285 static struct spear_gpio_pingroup *get_gpio_pingroup(struct spear_pmx *pmx, 286 unsigned pin) 287 { 288 struct spear_gpio_pingroup *gpio_pingroup; 289 int i, j; 290 291 if (!pmx->machdata->gpio_pingroups) 292 return NULL; 293 294 for (i = 0; i < pmx->machdata->ngpio_pingroups; i++) { 295 gpio_pingroup = &pmx->machdata->gpio_pingroups[i]; 296 297 for (j = 0; j < gpio_pingroup->npins; j++) { 298 if (gpio_pingroup->pins[j] == pin) 299 return gpio_pingroup; 300 } 301 } 302 303 return NULL; 304 } 305 306 static int gpio_request_endisable(struct pinctrl_dev *pctldev, 307 struct pinctrl_gpio_range *range, unsigned offset, bool enable) 308 { 309 struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); 310 struct spear_pinctrl_machdata *machdata = pmx->machdata; 311 struct spear_gpio_pingroup *gpio_pingroup; 312 313 /* 314 * Some SoC have configuration options applicable to group of pins, 315 * rather than a single pin. 316 */ 317 gpio_pingroup = get_gpio_pingroup(pmx, offset); 318 if (gpio_pingroup) 319 muxregs_endisable(pmx, gpio_pingroup->muxregs, 320 gpio_pingroup->nmuxregs, enable); 321 322 /* 323 * SoC may need some extra configurations, or configurations for single 324 * pin 325 */ 326 if (machdata->gpio_request_endisable) 327 machdata->gpio_request_endisable(pmx, offset, enable); 328 329 return 0; 330 } 331 332 static int gpio_request_enable(struct pinctrl_dev *pctldev, 333 struct pinctrl_gpio_range *range, unsigned offset) 334 { 335 return gpio_request_endisable(pctldev, range, offset, true); 336 } 337 338 static void gpio_disable_free(struct pinctrl_dev *pctldev, 339 struct pinctrl_gpio_range *range, unsigned offset) 340 { 341 gpio_request_endisable(pctldev, range, offset, false); 342 } 343 344 static const struct pinmux_ops spear_pinmux_ops = { 345 .get_functions_count = spear_pinctrl_get_funcs_count, 346 .get_function_name = spear_pinctrl_get_func_name, 347 .get_function_groups = spear_pinctrl_get_func_groups, 348 .set_mux = spear_pinctrl_set_mux, 349 .gpio_request_enable = gpio_request_enable, 350 .gpio_disable_free = gpio_disable_free, 351 }; 352 353 static struct pinctrl_desc spear_pinctrl_desc = { 354 .name = DRIVER_NAME, 355 .pctlops = &spear_pinctrl_ops, 356 .pmxops = &spear_pinmux_ops, 357 .owner = THIS_MODULE, 358 }; 359 360 int spear_pinctrl_probe(struct platform_device *pdev, 361 struct spear_pinctrl_machdata *machdata) 362 { 363 struct device_node *np = pdev->dev.of_node; 364 struct spear_pmx *pmx; 365 366 if (!machdata) 367 return -ENODEV; 368 369 pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL); 370 if (!pmx) 371 return -ENOMEM; 372 373 pmx->regmap = device_node_to_regmap(np); 374 if (IS_ERR(pmx->regmap)) { 375 dev_err(&pdev->dev, "Init regmap failed (%pe).\n", 376 pmx->regmap); 377 return PTR_ERR(pmx->regmap); 378 } 379 380 pmx->dev = &pdev->dev; 381 pmx->machdata = machdata; 382 383 /* configure mode, if supported by SoC */ 384 if (machdata->modes_supported) { 385 int mode = 0; 386 387 if (of_property_read_u32(np, "st,pinmux-mode", &mode)) { 388 dev_err(&pdev->dev, "OF: pinmux mode not passed\n"); 389 return -EINVAL; 390 } 391 392 if (set_mode(pmx, mode)) { 393 dev_err(&pdev->dev, "OF: Couldn't configure mode: %x\n", 394 mode); 395 return -EINVAL; 396 } 397 } 398 399 platform_set_drvdata(pdev, pmx); 400 401 spear_pinctrl_desc.pins = machdata->pins; 402 spear_pinctrl_desc.npins = machdata->npins; 403 404 pmx->pctl = devm_pinctrl_register(&pdev->dev, &spear_pinctrl_desc, pmx); 405 if (IS_ERR(pmx->pctl)) { 406 dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); 407 return PTR_ERR(pmx->pctl); 408 } 409 410 return 0; 411 } 412