1 /* 2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 3 * 4 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * Copyright (c) 2012 Linaro Ltd 7 * http://www.linaro.org 8 * 9 * Author: Thomas Abraham <thomas.ab@samsung.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 */ 16 17 #ifndef __PINCTRL_SAMSUNG_H 18 #define __PINCTRL_SAMSUNG_H 19 20 #include <linux/pinctrl/pinctrl.h> 21 #include <linux/pinctrl/pinmux.h> 22 #include <linux/pinctrl/pinconf.h> 23 #include <linux/pinctrl/consumer.h> 24 #include <linux/pinctrl/machine.h> 25 26 #include <linux/gpio.h> 27 28 /* pinmux function number for pin as gpio output line */ 29 #define FUNC_OUTPUT 0x1 30 31 /** 32 * enum pincfg_type - possible pin configuration types supported. 33 * @PINCFG_TYPE_FUNC: Function configuration. 34 * @PINCFG_TYPE_DAT: Pin value configuration. 35 * @PINCFG_TYPE_PUD: Pull up/down configuration. 36 * @PINCFG_TYPE_DRV: Drive strength configuration. 37 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode. 38 * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode. 39 */ 40 enum pincfg_type { 41 PINCFG_TYPE_FUNC, 42 PINCFG_TYPE_DAT, 43 PINCFG_TYPE_PUD, 44 PINCFG_TYPE_DRV, 45 PINCFG_TYPE_CON_PDN, 46 PINCFG_TYPE_PUD_PDN, 47 48 PINCFG_TYPE_NUM 49 }; 50 51 /* 52 * pin configuration (pull up/down and drive strength) type and its value are 53 * packed together into a 16-bits. The upper 8-bits represent the configuration 54 * type and the lower 8-bits hold the value of the configuration type. 55 */ 56 #define PINCFG_TYPE_MASK 0xFF 57 #define PINCFG_VALUE_SHIFT 8 58 #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT) 59 #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type) 60 #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK) 61 #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \ 62 PINCFG_VALUE_SHIFT) 63 /** 64 * enum eint_type - possible external interrupt types. 65 * @EINT_TYPE_NONE: bank does not support external interrupts 66 * @EINT_TYPE_GPIO: bank supportes external gpio interrupts 67 * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts 68 * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts 69 * 70 * Samsung GPIO controller groups all the available pins into banks. The pins 71 * in a pin bank can support external gpio interrupts or external wakeup 72 * interrupts or no interrupts at all. From a software perspective, the only 73 * difference between external gpio and external wakeup interrupts is that 74 * the wakeup interrupts can additionally wakeup the system if it is in 75 * suspended state. 76 */ 77 enum eint_type { 78 EINT_TYPE_NONE, 79 EINT_TYPE_GPIO, 80 EINT_TYPE_WKUP, 81 EINT_TYPE_WKUP_MUX, 82 }; 83 84 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */ 85 #define PIN_NAME_LENGTH 10 86 87 #define PIN_GROUP(n, p, f) \ 88 { \ 89 .name = n, \ 90 .pins = p, \ 91 .num_pins = ARRAY_SIZE(p), \ 92 .func = f \ 93 } 94 95 #define PMX_FUNC(n, g) \ 96 { \ 97 .name = n, \ 98 .groups = g, \ 99 .num_groups = ARRAY_SIZE(g), \ 100 } 101 102 struct samsung_pinctrl_drv_data; 103 104 /** 105 * struct samsung_pin_bank_type: pin bank type description 106 * @fld_width: widths of configuration bitfields (0 if unavailable) 107 * @reg_offset: offsets of configuration registers (don't care of width is 0) 108 */ 109 struct samsung_pin_bank_type { 110 u8 fld_width[PINCFG_TYPE_NUM]; 111 u8 reg_offset[PINCFG_TYPE_NUM]; 112 }; 113 114 /** 115 * struct samsung_pin_bank: represent a controller pin-bank. 116 * @type: type of the bank (register offsets and bitfield widths) 117 * @pctl_offset: starting offset of the pin-bank registers. 118 * @pin_base: starting pin number of the bank. 119 * @nr_pins: number of pins included in this bank. 120 * @eint_func: function to set in CON register to configure pin as EINT. 121 * @eint_type: type of the external interrupt supported by the bank. 122 * @eint_mask: bit mask of pins which support EINT function. 123 * @name: name to be prefixed for each pin in this pin bank. 124 * @of_node: OF node of the bank. 125 * @drvdata: link to controller driver data 126 * @irq_domain: IRQ domain of the bank. 127 * @gpio_chip: GPIO chip of the bank. 128 * @grange: linux gpio pin range supported by this bank. 129 * @slock: spinlock protecting bank registers 130 * @pm_save: saved register values during suspend 131 */ 132 struct samsung_pin_bank { 133 struct samsung_pin_bank_type *type; 134 u32 pctl_offset; 135 u32 pin_base; 136 u8 nr_pins; 137 u8 eint_func; 138 enum eint_type eint_type; 139 u32 eint_mask; 140 u32 eint_offset; 141 char *name; 142 void *soc_priv; 143 struct device_node *of_node; 144 struct samsung_pinctrl_drv_data *drvdata; 145 struct irq_domain *irq_domain; 146 struct gpio_chip gpio_chip; 147 struct pinctrl_gpio_range grange; 148 spinlock_t slock; 149 150 u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/ 151 }; 152 153 /** 154 * struct samsung_pin_ctrl: represent a pin controller. 155 * @pin_banks: list of pin banks included in this controller. 156 * @nr_banks: number of pin banks. 157 * @base: starting system wide pin number. 158 * @nr_pins: number of pins supported by the controller. 159 * @eint_gpio_init: platform specific callback to setup the external gpio 160 * interrupts for the controller. 161 * @eint_wkup_init: platform specific callback to setup the external wakeup 162 * interrupts for the controller. 163 * @label: for debug information. 164 */ 165 struct samsung_pin_ctrl { 166 struct samsung_pin_bank *pin_banks; 167 u32 nr_banks; 168 169 u32 base; 170 u32 nr_pins; 171 172 int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *); 173 int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *); 174 void (*suspend)(struct samsung_pinctrl_drv_data *); 175 void (*resume)(struct samsung_pinctrl_drv_data *); 176 177 char *label; 178 }; 179 180 /** 181 * struct samsung_pinctrl_drv_data: wrapper for holding driver data together. 182 * @node: global list node 183 * @virt_base: register base address of the controller. 184 * @dev: device instance representing the controller. 185 * @irq: interrpt number used by the controller to notify gpio interrupts. 186 * @ctrl: pin controller instance managed by the driver. 187 * @pctl: pin controller descriptor registered with the pinctrl subsystem. 188 * @pctl_dev: cookie representing pinctrl device instance. 189 * @pin_groups: list of pin groups available to the driver. 190 * @nr_groups: number of such pin groups. 191 * @pmx_functions: list of pin functions available to the driver. 192 * @nr_function: number of such pin functions. 193 */ 194 struct samsung_pinctrl_drv_data { 195 struct list_head node; 196 void __iomem *virt_base; 197 struct device *dev; 198 int irq; 199 200 struct samsung_pin_ctrl *ctrl; 201 struct pinctrl_desc pctl; 202 struct pinctrl_dev *pctl_dev; 203 204 const struct samsung_pin_group *pin_groups; 205 unsigned int nr_groups; 206 const struct samsung_pmx_func *pmx_functions; 207 unsigned int nr_functions; 208 }; 209 210 /** 211 * struct samsung_pin_group: represent group of pins of a pinmux function. 212 * @name: name of the pin group, used to lookup the group. 213 * @pins: the pins included in this group. 214 * @num_pins: number of pins included in this group. 215 * @func: the function number to be programmed when selected. 216 */ 217 struct samsung_pin_group { 218 const char *name; 219 const unsigned int *pins; 220 u8 num_pins; 221 u8 func; 222 }; 223 224 /** 225 * struct samsung_pmx_func: represent a pin function. 226 * @name: name of the pin function, used to lookup the function. 227 * @groups: one or more names of pin groups that provide this function. 228 * @num_groups: number of groups included in @groups. 229 */ 230 struct samsung_pmx_func { 231 const char *name; 232 const char **groups; 233 u8 num_groups; 234 u32 val; 235 }; 236 237 /* list of all exported SoC specific data */ 238 extern struct samsung_pin_ctrl exynos3250_pin_ctrl[]; 239 extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; 240 extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; 241 extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; 242 extern struct samsung_pin_ctrl exynos5260_pin_ctrl[]; 243 extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; 244 extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; 245 extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; 246 extern struct samsung_pin_ctrl s3c2416_pin_ctrl[]; 247 extern struct samsung_pin_ctrl s3c2440_pin_ctrl[]; 248 extern struct samsung_pin_ctrl s3c2450_pin_ctrl[]; 249 extern struct samsung_pin_ctrl s5pv210_pin_ctrl[]; 250 251 #endif /* __PINCTRL_SAMSUNG_H */ 252