1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4 // 5 // Copyright (c) 2012 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 // Copyright (c) 2012 Linaro Ltd 8 // http://www.linaro.org 9 // 10 // Author: Thomas Abraham <thomas.ab@samsung.com> 11 // 12 // This driver implements the Samsung pinctrl driver. It supports setting up of 13 // pinmux and pinconf configurations. The gpiolib interface is also included. 14 // External interrupt (gpio and wakeup) support are not included in this driver 15 // but provides extensions to which platform specific implementation of the gpio 16 // and wakeup interrupts can be hooked to. 17 18 #include <linux/init.h> 19 #include <linux/platform_device.h> 20 #include <linux/io.h> 21 #include <linux/slab.h> 22 #include <linux/err.h> 23 #include <linux/gpio.h> 24 #include <linux/irqdomain.h> 25 #include <linux/of_device.h> 26 #include <linux/spinlock.h> 27 28 #include <dt-bindings/pinctrl/samsung.h> 29 30 #include "../core.h" 31 #include "pinctrl-samsung.h" 32 33 /* maximum number of the memory resources */ 34 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 35 36 /* list of all possible config options supported */ 37 static struct pin_config { 38 const char *property; 39 enum pincfg_type param; 40 } cfg_params[] = { 41 { "samsung,pin-pud", PINCFG_TYPE_PUD }, 42 { "samsung,pin-drv", PINCFG_TYPE_DRV }, 43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, 44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, 45 { "samsung,pin-val", PINCFG_TYPE_DAT }, 46 }; 47 48 static unsigned int pin_base; 49 50 static int samsung_get_group_count(struct pinctrl_dev *pctldev) 51 { 52 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 53 54 return pmx->nr_groups; 55 } 56 57 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, 58 unsigned group) 59 { 60 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 61 62 return pmx->pin_groups[group].name; 63 } 64 65 static int samsung_get_group_pins(struct pinctrl_dev *pctldev, 66 unsigned group, 67 const unsigned **pins, 68 unsigned *num_pins) 69 { 70 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 71 72 *pins = pmx->pin_groups[group].pins; 73 *num_pins = pmx->pin_groups[group].num_pins; 74 75 return 0; 76 } 77 78 static int reserve_map(struct device *dev, struct pinctrl_map **map, 79 unsigned *reserved_maps, unsigned *num_maps, 80 unsigned reserve) 81 { 82 unsigned old_num = *reserved_maps; 83 unsigned new_num = *num_maps + reserve; 84 struct pinctrl_map *new_map; 85 86 if (old_num >= new_num) 87 return 0; 88 89 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); 90 if (!new_map) 91 return -ENOMEM; 92 93 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); 94 95 *map = new_map; 96 *reserved_maps = new_num; 97 98 return 0; 99 } 100 101 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, 102 unsigned *num_maps, const char *group, 103 const char *function) 104 { 105 if (WARN_ON(*num_maps == *reserved_maps)) 106 return -ENOSPC; 107 108 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 109 (*map)[*num_maps].data.mux.group = group; 110 (*map)[*num_maps].data.mux.function = function; 111 (*num_maps)++; 112 113 return 0; 114 } 115 116 static int add_map_configs(struct device *dev, struct pinctrl_map **map, 117 unsigned *reserved_maps, unsigned *num_maps, 118 const char *group, unsigned long *configs, 119 unsigned num_configs) 120 { 121 unsigned long *dup_configs; 122 123 if (WARN_ON(*num_maps == *reserved_maps)) 124 return -ENOSPC; 125 126 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 127 GFP_KERNEL); 128 if (!dup_configs) 129 return -ENOMEM; 130 131 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; 132 (*map)[*num_maps].data.configs.group_or_pin = group; 133 (*map)[*num_maps].data.configs.configs = dup_configs; 134 (*map)[*num_maps].data.configs.num_configs = num_configs; 135 (*num_maps)++; 136 137 return 0; 138 } 139 140 static int add_config(struct device *dev, unsigned long **configs, 141 unsigned *num_configs, unsigned long config) 142 { 143 unsigned old_num = *num_configs; 144 unsigned new_num = old_num + 1; 145 unsigned long *new_configs; 146 147 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, 148 GFP_KERNEL); 149 if (!new_configs) 150 return -ENOMEM; 151 152 new_configs[old_num] = config; 153 154 *configs = new_configs; 155 *num_configs = new_num; 156 157 return 0; 158 } 159 160 static void samsung_dt_free_map(struct pinctrl_dev *pctldev, 161 struct pinctrl_map *map, 162 unsigned num_maps) 163 { 164 int i; 165 166 for (i = 0; i < num_maps; i++) 167 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 168 kfree(map[i].data.configs.configs); 169 170 kfree(map); 171 } 172 173 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, 174 struct device *dev, 175 struct device_node *np, 176 struct pinctrl_map **map, 177 unsigned *reserved_maps, 178 unsigned *num_maps) 179 { 180 int ret, i; 181 u32 val; 182 unsigned long config; 183 unsigned long *configs = NULL; 184 unsigned num_configs = 0; 185 unsigned reserve; 186 struct property *prop; 187 const char *group; 188 bool has_func = false; 189 190 ret = of_property_read_u32(np, "samsung,pin-function", &val); 191 if (!ret) 192 has_func = true; 193 194 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { 195 ret = of_property_read_u32(np, cfg_params[i].property, &val); 196 if (!ret) { 197 config = PINCFG_PACK(cfg_params[i].param, val); 198 ret = add_config(dev, &configs, &num_configs, config); 199 if (ret < 0) 200 goto exit; 201 /* EINVAL=missing, which is fine since it's optional */ 202 } else if (ret != -EINVAL) { 203 dev_err(dev, "could not parse property %s\n", 204 cfg_params[i].property); 205 } 206 } 207 208 reserve = 0; 209 if (has_func) 210 reserve++; 211 if (num_configs) 212 reserve++; 213 ret = of_property_count_strings(np, "samsung,pins"); 214 if (ret < 0) { 215 dev_err(dev, "could not parse property samsung,pins\n"); 216 goto exit; 217 } 218 reserve *= ret; 219 220 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); 221 if (ret < 0) 222 goto exit; 223 224 of_property_for_each_string(np, "samsung,pins", prop, group) { 225 if (has_func) { 226 ret = add_map_mux(map, reserved_maps, 227 num_maps, group, np->full_name); 228 if (ret < 0) 229 goto exit; 230 } 231 232 if (num_configs) { 233 ret = add_map_configs(dev, map, reserved_maps, 234 num_maps, group, configs, 235 num_configs); 236 if (ret < 0) 237 goto exit; 238 } 239 } 240 241 ret = 0; 242 243 exit: 244 kfree(configs); 245 return ret; 246 } 247 248 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, 249 struct device_node *np_config, 250 struct pinctrl_map **map, 251 unsigned *num_maps) 252 { 253 struct samsung_pinctrl_drv_data *drvdata; 254 unsigned reserved_maps; 255 struct device_node *np; 256 int ret; 257 258 drvdata = pinctrl_dev_get_drvdata(pctldev); 259 260 reserved_maps = 0; 261 *map = NULL; 262 *num_maps = 0; 263 264 if (!of_get_child_count(np_config)) 265 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, 266 np_config, map, 267 &reserved_maps, 268 num_maps); 269 270 for_each_child_of_node(np_config, np) { 271 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, 272 &reserved_maps, num_maps); 273 if (ret < 0) { 274 samsung_dt_free_map(pctldev, *map, *num_maps); 275 return ret; 276 } 277 } 278 279 return 0; 280 } 281 282 /* list of pinctrl callbacks for the pinctrl core */ 283 static const struct pinctrl_ops samsung_pctrl_ops = { 284 .get_groups_count = samsung_get_group_count, 285 .get_group_name = samsung_get_group_name, 286 .get_group_pins = samsung_get_group_pins, 287 .dt_node_to_map = samsung_dt_node_to_map, 288 .dt_free_map = samsung_dt_free_map, 289 }; 290 291 /* check if the selector is a valid pin function selector */ 292 static int samsung_get_functions_count(struct pinctrl_dev *pctldev) 293 { 294 struct samsung_pinctrl_drv_data *drvdata; 295 296 drvdata = pinctrl_dev_get_drvdata(pctldev); 297 return drvdata->nr_functions; 298 } 299 300 /* return the name of the pin function specified */ 301 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, 302 unsigned selector) 303 { 304 struct samsung_pinctrl_drv_data *drvdata; 305 306 drvdata = pinctrl_dev_get_drvdata(pctldev); 307 return drvdata->pmx_functions[selector].name; 308 } 309 310 /* return the groups associated for the specified function selector */ 311 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, 312 unsigned selector, const char * const **groups, 313 unsigned * const num_groups) 314 { 315 struct samsung_pinctrl_drv_data *drvdata; 316 317 drvdata = pinctrl_dev_get_drvdata(pctldev); 318 *groups = drvdata->pmx_functions[selector].groups; 319 *num_groups = drvdata->pmx_functions[selector].num_groups; 320 return 0; 321 } 322 323 /* 324 * given a pin number that is local to a pin controller, find out the pin bank 325 * and the register base of the pin bank. 326 */ 327 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, 328 unsigned pin, void __iomem **reg, u32 *offset, 329 struct samsung_pin_bank **bank) 330 { 331 struct samsung_pin_bank *b; 332 333 b = drvdata->pin_banks; 334 335 while ((pin >= b->pin_base) && 336 ((b->pin_base + b->nr_pins - 1) < pin)) 337 b++; 338 339 *reg = b->pctl_base + b->pctl_offset; 340 *offset = pin - b->pin_base; 341 if (bank) 342 *bank = b; 343 } 344 345 /* enable or disable a pinmux function */ 346 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, 347 unsigned group) 348 { 349 struct samsung_pinctrl_drv_data *drvdata; 350 const struct samsung_pin_bank_type *type; 351 struct samsung_pin_bank *bank; 352 void __iomem *reg; 353 u32 mask, shift, data, pin_offset; 354 unsigned long flags; 355 const struct samsung_pmx_func *func; 356 const struct samsung_pin_group *grp; 357 358 drvdata = pinctrl_dev_get_drvdata(pctldev); 359 func = &drvdata->pmx_functions[selector]; 360 grp = &drvdata->pin_groups[group]; 361 362 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, 363 ®, &pin_offset, &bank); 364 type = bank->type; 365 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 366 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; 367 if (shift >= 32) { 368 /* Some banks have two config registers */ 369 shift -= 32; 370 reg += 4; 371 } 372 373 spin_lock_irqsave(&bank->slock, flags); 374 375 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); 376 data &= ~(mask << shift); 377 data |= func->val << shift; 378 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); 379 380 spin_unlock_irqrestore(&bank->slock, flags); 381 } 382 383 /* enable a specified pinmux by writing to registers */ 384 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, 385 unsigned selector, 386 unsigned group) 387 { 388 samsung_pinmux_setup(pctldev, selector, group); 389 return 0; 390 } 391 392 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ 393 static const struct pinmux_ops samsung_pinmux_ops = { 394 .get_functions_count = samsung_get_functions_count, 395 .get_function_name = samsung_pinmux_get_fname, 396 .get_function_groups = samsung_pinmux_get_groups, 397 .set_mux = samsung_pinmux_set_mux, 398 }; 399 400 /* set or get the pin config settings for a specified pin */ 401 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, 402 unsigned long *config, bool set) 403 { 404 struct samsung_pinctrl_drv_data *drvdata; 405 const struct samsung_pin_bank_type *type; 406 struct samsung_pin_bank *bank; 407 void __iomem *reg_base; 408 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 409 u32 data, width, pin_offset, mask, shift; 410 u32 cfg_value, cfg_reg; 411 unsigned long flags; 412 413 drvdata = pinctrl_dev_get_drvdata(pctldev); 414 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, 415 &pin_offset, &bank); 416 type = bank->type; 417 418 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) 419 return -EINVAL; 420 421 width = type->fld_width[cfg_type]; 422 cfg_reg = type->reg_offset[cfg_type]; 423 424 spin_lock_irqsave(&bank->slock, flags); 425 426 mask = (1 << width) - 1; 427 shift = pin_offset * width; 428 data = readl(reg_base + cfg_reg); 429 430 if (set) { 431 cfg_value = PINCFG_UNPACK_VALUE(*config); 432 data &= ~(mask << shift); 433 data |= (cfg_value << shift); 434 writel(data, reg_base + cfg_reg); 435 } else { 436 data >>= shift; 437 data &= mask; 438 *config = PINCFG_PACK(cfg_type, data); 439 } 440 441 spin_unlock_irqrestore(&bank->slock, flags); 442 443 return 0; 444 } 445 446 /* set the pin config settings for a specified pin */ 447 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 448 unsigned long *configs, unsigned num_configs) 449 { 450 int i, ret; 451 452 for (i = 0; i < num_configs; i++) { 453 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); 454 if (ret < 0) 455 return ret; 456 } /* for each config */ 457 458 return 0; 459 } 460 461 /* get the pin config settings for a specified pin */ 462 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 463 unsigned long *config) 464 { 465 return samsung_pinconf_rw(pctldev, pin, config, false); 466 } 467 468 /* set the pin config settings for a specified pin group */ 469 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, 470 unsigned group, unsigned long *configs, 471 unsigned num_configs) 472 { 473 struct samsung_pinctrl_drv_data *drvdata; 474 const unsigned int *pins; 475 unsigned int cnt; 476 477 drvdata = pinctrl_dev_get_drvdata(pctldev); 478 pins = drvdata->pin_groups[group].pins; 479 480 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) 481 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); 482 483 return 0; 484 } 485 486 /* get the pin config settings for a specified pin group */ 487 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, 488 unsigned int group, unsigned long *config) 489 { 490 struct samsung_pinctrl_drv_data *drvdata; 491 const unsigned int *pins; 492 493 drvdata = pinctrl_dev_get_drvdata(pctldev); 494 pins = drvdata->pin_groups[group].pins; 495 samsung_pinconf_get(pctldev, pins[0], config); 496 return 0; 497 } 498 499 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ 500 static const struct pinconf_ops samsung_pinconf_ops = { 501 .pin_config_get = samsung_pinconf_get, 502 .pin_config_set = samsung_pinconf_set, 503 .pin_config_group_get = samsung_pinconf_group_get, 504 .pin_config_group_set = samsung_pinconf_group_set, 505 }; 506 507 /* 508 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held 509 * to avoid race condition. 510 */ 511 static void samsung_gpio_set_value(struct gpio_chip *gc, 512 unsigned offset, int value) 513 { 514 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 515 const struct samsung_pin_bank_type *type = bank->type; 516 void __iomem *reg; 517 u32 data; 518 519 reg = bank->pctl_base + bank->pctl_offset; 520 521 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 522 data &= ~(1 << offset); 523 if (value) 524 data |= 1 << offset; 525 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); 526 } 527 528 /* gpiolib gpio_set callback function */ 529 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 530 { 531 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 532 unsigned long flags; 533 534 spin_lock_irqsave(&bank->slock, flags); 535 samsung_gpio_set_value(gc, offset, value); 536 spin_unlock_irqrestore(&bank->slock, flags); 537 } 538 539 /* gpiolib gpio_get callback function */ 540 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) 541 { 542 void __iomem *reg; 543 u32 data; 544 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 545 const struct samsung_pin_bank_type *type = bank->type; 546 547 reg = bank->pctl_base + bank->pctl_offset; 548 549 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 550 data >>= offset; 551 data &= 1; 552 return data; 553 } 554 555 /* 556 * The samsung_gpio_set_direction() should be called with "bank->slock" held 557 * to avoid race condition. 558 * The calls to gpio_direction_output() and gpio_direction_input() 559 * leads to this function call. 560 */ 561 static int samsung_gpio_set_direction(struct gpio_chip *gc, 562 unsigned offset, bool input) 563 { 564 const struct samsung_pin_bank_type *type; 565 struct samsung_pin_bank *bank; 566 void __iomem *reg; 567 u32 data, mask, shift; 568 569 bank = gpiochip_get_data(gc); 570 type = bank->type; 571 572 reg = bank->pctl_base + bank->pctl_offset 573 + type->reg_offset[PINCFG_TYPE_FUNC]; 574 575 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 576 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; 577 if (shift >= 32) { 578 /* Some banks have two config registers */ 579 shift -= 32; 580 reg += 4; 581 } 582 583 data = readl(reg); 584 data &= ~(mask << shift); 585 if (!input) 586 data |= EXYNOS_PIN_FUNC_OUTPUT << shift; 587 writel(data, reg); 588 589 return 0; 590 } 591 592 /* gpiolib gpio_direction_input callback function. */ 593 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 594 { 595 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 596 unsigned long flags; 597 int ret; 598 599 spin_lock_irqsave(&bank->slock, flags); 600 ret = samsung_gpio_set_direction(gc, offset, true); 601 spin_unlock_irqrestore(&bank->slock, flags); 602 return ret; 603 } 604 605 /* gpiolib gpio_direction_output callback function. */ 606 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 607 int value) 608 { 609 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 610 unsigned long flags; 611 int ret; 612 613 spin_lock_irqsave(&bank->slock, flags); 614 samsung_gpio_set_value(gc, offset, value); 615 ret = samsung_gpio_set_direction(gc, offset, false); 616 spin_unlock_irqrestore(&bank->slock, flags); 617 618 return ret; 619 } 620 621 /* 622 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin 623 * and a virtual IRQ, if not already present. 624 */ 625 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 626 { 627 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 628 unsigned int virq; 629 630 if (!bank->irq_domain) 631 return -ENXIO; 632 633 virq = irq_create_mapping(bank->irq_domain, offset); 634 635 return (virq) ? : -ENXIO; 636 } 637 638 static struct samsung_pin_group *samsung_pinctrl_create_groups( 639 struct device *dev, 640 struct samsung_pinctrl_drv_data *drvdata, 641 unsigned int *cnt) 642 { 643 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 644 struct samsung_pin_group *groups, *grp; 645 const struct pinctrl_pin_desc *pdesc; 646 int i; 647 648 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups), 649 GFP_KERNEL); 650 if (!groups) 651 return ERR_PTR(-EINVAL); 652 grp = groups; 653 654 pdesc = ctrldesc->pins; 655 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { 656 grp->name = pdesc->name; 657 grp->pins = &pdesc->number; 658 grp->num_pins = 1; 659 } 660 661 *cnt = ctrldesc->npins; 662 return groups; 663 } 664 665 static int samsung_pinctrl_create_function(struct device *dev, 666 struct samsung_pinctrl_drv_data *drvdata, 667 struct device_node *func_np, 668 struct samsung_pmx_func *func) 669 { 670 int npins; 671 int ret; 672 int i; 673 674 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) 675 return 0; 676 677 npins = of_property_count_strings(func_np, "samsung,pins"); 678 if (npins < 1) { 679 dev_err(dev, "invalid pin list in %pOFn node", func_np); 680 return -EINVAL; 681 } 682 683 func->name = func_np->full_name; 684 685 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL); 686 if (!func->groups) 687 return -ENOMEM; 688 689 for (i = 0; i < npins; ++i) { 690 const char *gname; 691 692 ret = of_property_read_string_index(func_np, "samsung,pins", 693 i, &gname); 694 if (ret) { 695 dev_err(dev, 696 "failed to read pin name %d from %pOFn node\n", 697 i, func_np); 698 return ret; 699 } 700 701 func->groups[i] = gname; 702 } 703 704 func->num_groups = npins; 705 return 1; 706 } 707 708 static struct samsung_pmx_func *samsung_pinctrl_create_functions( 709 struct device *dev, 710 struct samsung_pinctrl_drv_data *drvdata, 711 unsigned int *cnt) 712 { 713 struct samsung_pmx_func *functions, *func; 714 struct device_node *dev_np = dev->of_node; 715 struct device_node *cfg_np; 716 unsigned int func_cnt = 0; 717 int ret; 718 719 /* 720 * Iterate over all the child nodes of the pin controller node 721 * and create pin groups and pin function lists. 722 */ 723 for_each_child_of_node(dev_np, cfg_np) { 724 struct device_node *func_np; 725 726 if (!of_get_child_count(cfg_np)) { 727 if (!of_find_property(cfg_np, 728 "samsung,pin-function", NULL)) 729 continue; 730 ++func_cnt; 731 continue; 732 } 733 734 for_each_child_of_node(cfg_np, func_np) { 735 if (!of_find_property(func_np, 736 "samsung,pin-function", NULL)) 737 continue; 738 ++func_cnt; 739 } 740 } 741 742 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions), 743 GFP_KERNEL); 744 if (!functions) 745 return ERR_PTR(-ENOMEM); 746 func = functions; 747 748 /* 749 * Iterate over all the child nodes of the pin controller node 750 * and create pin groups and pin function lists. 751 */ 752 func_cnt = 0; 753 for_each_child_of_node(dev_np, cfg_np) { 754 struct device_node *func_np; 755 756 if (!of_get_child_count(cfg_np)) { 757 ret = samsung_pinctrl_create_function(dev, drvdata, 758 cfg_np, func); 759 if (ret < 0) 760 return ERR_PTR(ret); 761 if (ret > 0) { 762 ++func; 763 ++func_cnt; 764 } 765 continue; 766 } 767 768 for_each_child_of_node(cfg_np, func_np) { 769 ret = samsung_pinctrl_create_function(dev, drvdata, 770 func_np, func); 771 if (ret < 0) 772 return ERR_PTR(ret); 773 if (ret > 0) { 774 ++func; 775 ++func_cnt; 776 } 777 } 778 } 779 780 *cnt = func_cnt; 781 return functions; 782 } 783 784 /* 785 * Parse the information about all the available pin groups and pin functions 786 * from device node of the pin-controller. A pin group is formed with all 787 * the pins listed in the "samsung,pins" property. 788 */ 789 790 static int samsung_pinctrl_parse_dt(struct platform_device *pdev, 791 struct samsung_pinctrl_drv_data *drvdata) 792 { 793 struct device *dev = &pdev->dev; 794 struct samsung_pin_group *groups; 795 struct samsung_pmx_func *functions; 796 unsigned int grp_cnt = 0, func_cnt = 0; 797 798 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); 799 if (IS_ERR(groups)) { 800 dev_err(dev, "failed to parse pin groups\n"); 801 return PTR_ERR(groups); 802 } 803 804 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); 805 if (IS_ERR(functions)) { 806 dev_err(dev, "failed to parse pin functions\n"); 807 return PTR_ERR(functions); 808 } 809 810 drvdata->pin_groups = groups; 811 drvdata->nr_groups = grp_cnt; 812 drvdata->pmx_functions = functions; 813 drvdata->nr_functions = func_cnt; 814 815 return 0; 816 } 817 818 /* register the pinctrl interface with the pinctrl subsystem */ 819 static int samsung_pinctrl_register(struct platform_device *pdev, 820 struct samsung_pinctrl_drv_data *drvdata) 821 { 822 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 823 struct pinctrl_pin_desc *pindesc, *pdesc; 824 struct samsung_pin_bank *pin_bank; 825 char *pin_names; 826 int pin, bank, ret; 827 828 ctrldesc->name = "samsung-pinctrl"; 829 ctrldesc->owner = THIS_MODULE; 830 ctrldesc->pctlops = &samsung_pctrl_ops; 831 ctrldesc->pmxops = &samsung_pinmux_ops; 832 ctrldesc->confops = &samsung_pinconf_ops; 833 834 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * 835 drvdata->nr_pins, GFP_KERNEL); 836 if (!pindesc) 837 return -ENOMEM; 838 ctrldesc->pins = pindesc; 839 ctrldesc->npins = drvdata->nr_pins; 840 841 /* dynamically populate the pin number and pin name for pindesc */ 842 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) 843 pdesc->number = pin + drvdata->pin_base; 844 845 /* 846 * allocate space for storing the dynamically generated names for all 847 * the pins which belong to this pin-controller. 848 */ 849 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH * 850 drvdata->nr_pins, GFP_KERNEL); 851 if (!pin_names) 852 return -ENOMEM; 853 854 /* for each pin, the name of the pin is pin-bank name + pin number */ 855 for (bank = 0; bank < drvdata->nr_banks; bank++) { 856 pin_bank = &drvdata->pin_banks[bank]; 857 for (pin = 0; pin < pin_bank->nr_pins; pin++) { 858 sprintf(pin_names, "%s-%d", pin_bank->name, pin); 859 pdesc = pindesc + pin_bank->pin_base + pin; 860 pdesc->name = pin_names; 861 pin_names += PIN_NAME_LENGTH; 862 } 863 } 864 865 ret = samsung_pinctrl_parse_dt(pdev, drvdata); 866 if (ret) 867 return ret; 868 869 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, 870 drvdata); 871 if (IS_ERR(drvdata->pctl_dev)) { 872 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 873 return PTR_ERR(drvdata->pctl_dev); 874 } 875 876 for (bank = 0; bank < drvdata->nr_banks; ++bank) { 877 pin_bank = &drvdata->pin_banks[bank]; 878 pin_bank->grange.name = pin_bank->name; 879 pin_bank->grange.id = bank; 880 pin_bank->grange.pin_base = drvdata->pin_base 881 + pin_bank->pin_base; 882 pin_bank->grange.base = pin_bank->grange.pin_base; 883 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; 884 pin_bank->grange.gc = &pin_bank->gpio_chip; 885 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); 886 } 887 888 return 0; 889 } 890 891 /* unregister the pinctrl interface with the pinctrl subsystem */ 892 static int samsung_pinctrl_unregister(struct platform_device *pdev, 893 struct samsung_pinctrl_drv_data *drvdata) 894 { 895 struct samsung_pin_bank *bank = drvdata->pin_banks; 896 int i; 897 898 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) 899 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); 900 901 return 0; 902 } 903 904 static const struct gpio_chip samsung_gpiolib_chip = { 905 .request = gpiochip_generic_request, 906 .free = gpiochip_generic_free, 907 .set = samsung_gpio_set, 908 .get = samsung_gpio_get, 909 .direction_input = samsung_gpio_direction_input, 910 .direction_output = samsung_gpio_direction_output, 911 .to_irq = samsung_gpio_to_irq, 912 .owner = THIS_MODULE, 913 }; 914 915 /* register the gpiolib interface with the gpiolib subsystem */ 916 static int samsung_gpiolib_register(struct platform_device *pdev, 917 struct samsung_pinctrl_drv_data *drvdata) 918 { 919 struct samsung_pin_bank *bank = drvdata->pin_banks; 920 struct gpio_chip *gc; 921 int ret; 922 int i; 923 924 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { 925 bank->gpio_chip = samsung_gpiolib_chip; 926 927 gc = &bank->gpio_chip; 928 gc->base = bank->grange.base; 929 gc->ngpio = bank->nr_pins; 930 gc->parent = &pdev->dev; 931 gc->of_node = bank->of_node; 932 gc->label = bank->name; 933 934 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); 935 if (ret) { 936 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", 937 gc->label, ret); 938 return ret; 939 } 940 } 941 942 return 0; 943 } 944 945 /* retrieve the soc specific data */ 946 static const struct samsung_pin_ctrl * 947 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, 948 struct platform_device *pdev) 949 { 950 int id; 951 struct device_node *node = pdev->dev.of_node; 952 struct device_node *np; 953 const struct samsung_pin_bank_data *bdata; 954 const struct samsung_pin_ctrl *ctrl; 955 struct samsung_pin_bank *bank; 956 struct resource *res; 957 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; 958 unsigned int i; 959 960 id = of_alias_get_id(node, "pinctrl"); 961 if (id < 0) { 962 dev_err(&pdev->dev, "failed to get alias id\n"); 963 return ERR_PTR(-ENOENT); 964 } 965 ctrl = of_device_get_match_data(&pdev->dev); 966 ctrl += id; 967 968 d->suspend = ctrl->suspend; 969 d->resume = ctrl->resume; 970 d->nr_banks = ctrl->nr_banks; 971 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, 972 sizeof(*d->pin_banks), GFP_KERNEL); 973 if (!d->pin_banks) 974 return ERR_PTR(-ENOMEM); 975 976 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) 977 return ERR_PTR(-EINVAL); 978 979 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { 980 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 981 if (!res) { 982 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); 983 return ERR_PTR(-EINVAL); 984 } 985 virt_base[i] = devm_ioremap(&pdev->dev, res->start, 986 resource_size(res)); 987 if (!virt_base[i]) { 988 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); 989 return ERR_PTR(-EIO); 990 } 991 } 992 993 bank = d->pin_banks; 994 bdata = ctrl->pin_banks; 995 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { 996 bank->type = bdata->type; 997 bank->pctl_offset = bdata->pctl_offset; 998 bank->nr_pins = bdata->nr_pins; 999 bank->eint_func = bdata->eint_func; 1000 bank->eint_type = bdata->eint_type; 1001 bank->eint_mask = bdata->eint_mask; 1002 bank->eint_offset = bdata->eint_offset; 1003 bank->name = bdata->name; 1004 1005 spin_lock_init(&bank->slock); 1006 bank->drvdata = d; 1007 bank->pin_base = d->nr_pins; 1008 d->nr_pins += bank->nr_pins; 1009 1010 bank->eint_base = virt_base[0]; 1011 bank->pctl_base = virt_base[bdata->pctl_res_idx]; 1012 } 1013 /* 1014 * Legacy platforms should provide only one resource with IO memory. 1015 * Store it as virt_base because legacy driver needs to access it 1016 * through samsung_pinctrl_drv_data. 1017 */ 1018 d->virt_base = virt_base[0]; 1019 1020 for_each_child_of_node(node, np) { 1021 if (!of_find_property(np, "gpio-controller", NULL)) 1022 continue; 1023 bank = d->pin_banks; 1024 for (i = 0; i < d->nr_banks; ++i, ++bank) { 1025 if (!strcmp(bank->name, np->name)) { 1026 bank->of_node = np; 1027 break; 1028 } 1029 } 1030 } 1031 1032 d->pin_base = pin_base; 1033 pin_base += d->nr_pins; 1034 1035 return ctrl; 1036 } 1037 1038 static int samsung_pinctrl_probe(struct platform_device *pdev) 1039 { 1040 struct samsung_pinctrl_drv_data *drvdata; 1041 const struct samsung_pin_ctrl *ctrl; 1042 struct device *dev = &pdev->dev; 1043 struct resource *res; 1044 int ret; 1045 1046 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 1047 if (!drvdata) 1048 return -ENOMEM; 1049 1050 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); 1051 if (IS_ERR(ctrl)) { 1052 dev_err(&pdev->dev, "driver data not available\n"); 1053 return PTR_ERR(ctrl); 1054 } 1055 drvdata->dev = dev; 1056 1057 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1058 if (res) 1059 drvdata->irq = res->start; 1060 1061 if (ctrl->retention_data) { 1062 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, 1063 ctrl->retention_data); 1064 if (IS_ERR(drvdata->retention_ctrl)) 1065 return PTR_ERR(drvdata->retention_ctrl); 1066 } 1067 1068 ret = samsung_pinctrl_register(pdev, drvdata); 1069 if (ret) 1070 return ret; 1071 1072 ret = samsung_gpiolib_register(pdev, drvdata); 1073 if (ret) { 1074 samsung_pinctrl_unregister(pdev, drvdata); 1075 return ret; 1076 } 1077 1078 if (ctrl->eint_gpio_init) 1079 ctrl->eint_gpio_init(drvdata); 1080 if (ctrl->eint_wkup_init) 1081 ctrl->eint_wkup_init(drvdata); 1082 1083 platform_set_drvdata(pdev, drvdata); 1084 1085 return 0; 1086 } 1087 1088 /** 1089 * samsung_pinctrl_suspend - save pinctrl state for suspend 1090 * 1091 * Save data for all banks handled by this device. 1092 */ 1093 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) 1094 { 1095 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1096 int i; 1097 1098 for (i = 0; i < drvdata->nr_banks; i++) { 1099 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1100 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1101 const u8 *offs = bank->type->reg_offset; 1102 const u8 *widths = bank->type->fld_width; 1103 enum pincfg_type type; 1104 1105 /* Registers without a powerdown config aren't lost */ 1106 if (!widths[PINCFG_TYPE_CON_PDN]) 1107 continue; 1108 1109 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1110 if (widths[type]) 1111 bank->pm_save[type] = readl(reg + offs[type]); 1112 1113 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1114 /* Some banks have two config registers */ 1115 bank->pm_save[PINCFG_TYPE_NUM] = 1116 readl(reg + offs[PINCFG_TYPE_FUNC] + 4); 1117 pr_debug("Save %s @ %p (con %#010x %08x)\n", 1118 bank->name, reg, 1119 bank->pm_save[PINCFG_TYPE_FUNC], 1120 bank->pm_save[PINCFG_TYPE_NUM]); 1121 } else { 1122 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, 1123 reg, bank->pm_save[PINCFG_TYPE_FUNC]); 1124 } 1125 } 1126 1127 if (drvdata->suspend) 1128 drvdata->suspend(drvdata); 1129 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) 1130 drvdata->retention_ctrl->enable(drvdata); 1131 1132 return 0; 1133 } 1134 1135 /** 1136 * samsung_pinctrl_resume - restore pinctrl state from suspend 1137 * 1138 * Restore one of the banks that was saved during suspend. 1139 * 1140 * We don't bother doing anything complicated to avoid glitching lines since 1141 * we're called before pad retention is turned off. 1142 */ 1143 static int __maybe_unused samsung_pinctrl_resume(struct device *dev) 1144 { 1145 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1146 int i; 1147 1148 if (drvdata->resume) 1149 drvdata->resume(drvdata); 1150 1151 for (i = 0; i < drvdata->nr_banks; i++) { 1152 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1153 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1154 const u8 *offs = bank->type->reg_offset; 1155 const u8 *widths = bank->type->fld_width; 1156 enum pincfg_type type; 1157 1158 /* Registers without a powerdown config aren't lost */ 1159 if (!widths[PINCFG_TYPE_CON_PDN]) 1160 continue; 1161 1162 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1163 /* Some banks have two config registers */ 1164 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", 1165 bank->name, reg, 1166 readl(reg + offs[PINCFG_TYPE_FUNC]), 1167 readl(reg + offs[PINCFG_TYPE_FUNC] + 4), 1168 bank->pm_save[PINCFG_TYPE_FUNC], 1169 bank->pm_save[PINCFG_TYPE_NUM]); 1170 writel(bank->pm_save[PINCFG_TYPE_NUM], 1171 reg + offs[PINCFG_TYPE_FUNC] + 4); 1172 } else { 1173 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, 1174 reg, readl(reg + offs[PINCFG_TYPE_FUNC]), 1175 bank->pm_save[PINCFG_TYPE_FUNC]); 1176 } 1177 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1178 if (widths[type]) 1179 writel(bank->pm_save[type], reg + offs[type]); 1180 } 1181 1182 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) 1183 drvdata->retention_ctrl->disable(drvdata); 1184 1185 return 0; 1186 } 1187 1188 static const struct of_device_id samsung_pinctrl_dt_match[] = { 1189 #ifdef CONFIG_PINCTRL_EXYNOS_ARM 1190 { .compatible = "samsung,exynos3250-pinctrl", 1191 .data = exynos3250_pin_ctrl }, 1192 { .compatible = "samsung,exynos4210-pinctrl", 1193 .data = exynos4210_pin_ctrl }, 1194 { .compatible = "samsung,exynos4x12-pinctrl", 1195 .data = exynos4x12_pin_ctrl }, 1196 { .compatible = "samsung,exynos5250-pinctrl", 1197 .data = exynos5250_pin_ctrl }, 1198 { .compatible = "samsung,exynos5260-pinctrl", 1199 .data = exynos5260_pin_ctrl }, 1200 { .compatible = "samsung,exynos5410-pinctrl", 1201 .data = exynos5410_pin_ctrl }, 1202 { .compatible = "samsung,exynos5420-pinctrl", 1203 .data = exynos5420_pin_ctrl }, 1204 { .compatible = "samsung,s5pv210-pinctrl", 1205 .data = s5pv210_pin_ctrl }, 1206 #endif 1207 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64 1208 { .compatible = "samsung,exynos5433-pinctrl", 1209 .data = exynos5433_pin_ctrl }, 1210 { .compatible = "samsung,exynos7-pinctrl", 1211 .data = exynos7_pin_ctrl }, 1212 #endif 1213 #ifdef CONFIG_PINCTRL_S3C64XX 1214 { .compatible = "samsung,s3c64xx-pinctrl", 1215 .data = s3c64xx_pin_ctrl }, 1216 #endif 1217 #ifdef CONFIG_PINCTRL_S3C24XX 1218 { .compatible = "samsung,s3c2412-pinctrl", 1219 .data = s3c2412_pin_ctrl }, 1220 { .compatible = "samsung,s3c2416-pinctrl", 1221 .data = s3c2416_pin_ctrl }, 1222 { .compatible = "samsung,s3c2440-pinctrl", 1223 .data = s3c2440_pin_ctrl }, 1224 { .compatible = "samsung,s3c2450-pinctrl", 1225 .data = s3c2450_pin_ctrl }, 1226 #endif 1227 {}, 1228 }; 1229 1230 static const struct dev_pm_ops samsung_pinctrl_pm_ops = { 1231 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, 1232 samsung_pinctrl_resume) 1233 }; 1234 1235 static struct platform_driver samsung_pinctrl_driver = { 1236 .probe = samsung_pinctrl_probe, 1237 .driver = { 1238 .name = "samsung-pinctrl", 1239 .of_match_table = samsung_pinctrl_dt_match, 1240 .suppress_bind_attrs = true, 1241 .pm = &samsung_pinctrl_pm_ops, 1242 }, 1243 }; 1244 1245 static int __init samsung_pinctrl_drv_register(void) 1246 { 1247 return platform_driver_register(&samsung_pinctrl_driver); 1248 } 1249 postcore_initcall(samsung_pinctrl_drv_register); 1250