1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. 4 // 5 // Copyright (c) 2012 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 // Copyright (c) 2012 Linaro Ltd 8 // http://www.linaro.org 9 // 10 // Author: Thomas Abraham <thomas.ab@samsung.com> 11 // 12 // This driver implements the Samsung pinctrl driver. It supports setting up of 13 // pinmux and pinconf configurations. The gpiolib interface is also included. 14 // External interrupt (gpio and wakeup) support are not included in this driver 15 // but provides extensions to which platform specific implementation of the gpio 16 // and wakeup interrupts can be hooked to. 17 18 #include <linux/init.h> 19 #include <linux/platform_device.h> 20 #include <linux/io.h> 21 #include <linux/slab.h> 22 #include <linux/err.h> 23 #include <linux/gpio.h> 24 #include <linux/irqdomain.h> 25 #include <linux/of_device.h> 26 #include <linux/spinlock.h> 27 28 #include <dt-bindings/pinctrl/samsung.h> 29 30 #include "../core.h" 31 #include "pinctrl-samsung.h" 32 33 /* maximum number of the memory resources */ 34 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 35 36 /* list of all possible config options supported */ 37 static struct pin_config { 38 const char *property; 39 enum pincfg_type param; 40 } cfg_params[] = { 41 { "samsung,pin-pud", PINCFG_TYPE_PUD }, 42 { "samsung,pin-drv", PINCFG_TYPE_DRV }, 43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, 44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, 45 { "samsung,pin-val", PINCFG_TYPE_DAT }, 46 }; 47 48 static unsigned int pin_base; 49 50 static int samsung_get_group_count(struct pinctrl_dev *pctldev) 51 { 52 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 53 54 return pmx->nr_groups; 55 } 56 57 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, 58 unsigned group) 59 { 60 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 61 62 return pmx->pin_groups[group].name; 63 } 64 65 static int samsung_get_group_pins(struct pinctrl_dev *pctldev, 66 unsigned group, 67 const unsigned **pins, 68 unsigned *num_pins) 69 { 70 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); 71 72 *pins = pmx->pin_groups[group].pins; 73 *num_pins = pmx->pin_groups[group].num_pins; 74 75 return 0; 76 } 77 78 static int reserve_map(struct device *dev, struct pinctrl_map **map, 79 unsigned *reserved_maps, unsigned *num_maps, 80 unsigned reserve) 81 { 82 unsigned old_num = *reserved_maps; 83 unsigned new_num = *num_maps + reserve; 84 struct pinctrl_map *new_map; 85 86 if (old_num >= new_num) 87 return 0; 88 89 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); 90 if (!new_map) 91 return -ENOMEM; 92 93 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); 94 95 *map = new_map; 96 *reserved_maps = new_num; 97 98 return 0; 99 } 100 101 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, 102 unsigned *num_maps, const char *group, 103 const char *function) 104 { 105 if (WARN_ON(*num_maps == *reserved_maps)) 106 return -ENOSPC; 107 108 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; 109 (*map)[*num_maps].data.mux.group = group; 110 (*map)[*num_maps].data.mux.function = function; 111 (*num_maps)++; 112 113 return 0; 114 } 115 116 static int add_map_configs(struct device *dev, struct pinctrl_map **map, 117 unsigned *reserved_maps, unsigned *num_maps, 118 const char *group, unsigned long *configs, 119 unsigned num_configs) 120 { 121 unsigned long *dup_configs; 122 123 if (WARN_ON(*num_maps == *reserved_maps)) 124 return -ENOSPC; 125 126 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), 127 GFP_KERNEL); 128 if (!dup_configs) 129 return -ENOMEM; 130 131 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; 132 (*map)[*num_maps].data.configs.group_or_pin = group; 133 (*map)[*num_maps].data.configs.configs = dup_configs; 134 (*map)[*num_maps].data.configs.num_configs = num_configs; 135 (*num_maps)++; 136 137 return 0; 138 } 139 140 static int add_config(struct device *dev, unsigned long **configs, 141 unsigned *num_configs, unsigned long config) 142 { 143 unsigned old_num = *num_configs; 144 unsigned new_num = old_num + 1; 145 unsigned long *new_configs; 146 147 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, 148 GFP_KERNEL); 149 if (!new_configs) 150 return -ENOMEM; 151 152 new_configs[old_num] = config; 153 154 *configs = new_configs; 155 *num_configs = new_num; 156 157 return 0; 158 } 159 160 static void samsung_dt_free_map(struct pinctrl_dev *pctldev, 161 struct pinctrl_map *map, 162 unsigned num_maps) 163 { 164 int i; 165 166 for (i = 0; i < num_maps; i++) 167 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) 168 kfree(map[i].data.configs.configs); 169 170 kfree(map); 171 } 172 173 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, 174 struct device *dev, 175 struct device_node *np, 176 struct pinctrl_map **map, 177 unsigned *reserved_maps, 178 unsigned *num_maps) 179 { 180 int ret, i; 181 u32 val; 182 unsigned long config; 183 unsigned long *configs = NULL; 184 unsigned num_configs = 0; 185 unsigned reserve; 186 struct property *prop; 187 const char *group; 188 bool has_func = false; 189 190 ret = of_property_read_u32(np, "samsung,pin-function", &val); 191 if (!ret) 192 has_func = true; 193 194 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { 195 ret = of_property_read_u32(np, cfg_params[i].property, &val); 196 if (!ret) { 197 config = PINCFG_PACK(cfg_params[i].param, val); 198 ret = add_config(dev, &configs, &num_configs, config); 199 if (ret < 0) 200 goto exit; 201 /* EINVAL=missing, which is fine since it's optional */ 202 } else if (ret != -EINVAL) { 203 dev_err(dev, "could not parse property %s\n", 204 cfg_params[i].property); 205 } 206 } 207 208 reserve = 0; 209 if (has_func) 210 reserve++; 211 if (num_configs) 212 reserve++; 213 ret = of_property_count_strings(np, "samsung,pins"); 214 if (ret < 0) { 215 dev_err(dev, "could not parse property samsung,pins\n"); 216 goto exit; 217 } 218 reserve *= ret; 219 220 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); 221 if (ret < 0) 222 goto exit; 223 224 of_property_for_each_string(np, "samsung,pins", prop, group) { 225 if (has_func) { 226 ret = add_map_mux(map, reserved_maps, 227 num_maps, group, np->full_name); 228 if (ret < 0) 229 goto exit; 230 } 231 232 if (num_configs) { 233 ret = add_map_configs(dev, map, reserved_maps, 234 num_maps, group, configs, 235 num_configs); 236 if (ret < 0) 237 goto exit; 238 } 239 } 240 241 ret = 0; 242 243 exit: 244 kfree(configs); 245 return ret; 246 } 247 248 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, 249 struct device_node *np_config, 250 struct pinctrl_map **map, 251 unsigned *num_maps) 252 { 253 struct samsung_pinctrl_drv_data *drvdata; 254 unsigned reserved_maps; 255 struct device_node *np; 256 int ret; 257 258 drvdata = pinctrl_dev_get_drvdata(pctldev); 259 260 reserved_maps = 0; 261 *map = NULL; 262 *num_maps = 0; 263 264 if (!of_get_child_count(np_config)) 265 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, 266 np_config, map, 267 &reserved_maps, 268 num_maps); 269 270 for_each_child_of_node(np_config, np) { 271 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, 272 &reserved_maps, num_maps); 273 if (ret < 0) { 274 samsung_dt_free_map(pctldev, *map, *num_maps); 275 return ret; 276 } 277 } 278 279 return 0; 280 } 281 282 #ifdef CONFIG_DEBUG_FS 283 /* Forward declaration which can be used by samsung_pin_dbg_show */ 284 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 285 unsigned long *config); 286 static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN", 287 "PUD_PDN"}; 288 289 static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev, 290 struct seq_file *s, unsigned int pin) 291 { 292 enum pincfg_type cfg_type; 293 unsigned long config; 294 int ret; 295 296 for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) { 297 config = PINCFG_PACK(cfg_type, 0); 298 ret = samsung_pinconf_get(pctldev, pin, &config); 299 if (ret < 0) 300 continue; 301 302 seq_printf(s, " %s(0x%lx)", reg_names[cfg_type], 303 PINCFG_UNPACK_VALUE(config)); 304 } 305 } 306 #endif 307 308 /* list of pinctrl callbacks for the pinctrl core */ 309 static const struct pinctrl_ops samsung_pctrl_ops = { 310 .get_groups_count = samsung_get_group_count, 311 .get_group_name = samsung_get_group_name, 312 .get_group_pins = samsung_get_group_pins, 313 .dt_node_to_map = samsung_dt_node_to_map, 314 .dt_free_map = samsung_dt_free_map, 315 #ifdef CONFIG_DEBUG_FS 316 .pin_dbg_show = samsung_pin_dbg_show, 317 #endif 318 }; 319 320 /* check if the selector is a valid pin function selector */ 321 static int samsung_get_functions_count(struct pinctrl_dev *pctldev) 322 { 323 struct samsung_pinctrl_drv_data *drvdata; 324 325 drvdata = pinctrl_dev_get_drvdata(pctldev); 326 return drvdata->nr_functions; 327 } 328 329 /* return the name of the pin function specified */ 330 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, 331 unsigned selector) 332 { 333 struct samsung_pinctrl_drv_data *drvdata; 334 335 drvdata = pinctrl_dev_get_drvdata(pctldev); 336 return drvdata->pmx_functions[selector].name; 337 } 338 339 /* return the groups associated for the specified function selector */ 340 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, 341 unsigned selector, const char * const **groups, 342 unsigned * const num_groups) 343 { 344 struct samsung_pinctrl_drv_data *drvdata; 345 346 drvdata = pinctrl_dev_get_drvdata(pctldev); 347 *groups = drvdata->pmx_functions[selector].groups; 348 *num_groups = drvdata->pmx_functions[selector].num_groups; 349 return 0; 350 } 351 352 /* 353 * given a pin number that is local to a pin controller, find out the pin bank 354 * and the register base of the pin bank. 355 */ 356 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, 357 unsigned pin, void __iomem **reg, u32 *offset, 358 struct samsung_pin_bank **bank) 359 { 360 struct samsung_pin_bank *b; 361 362 b = drvdata->pin_banks; 363 364 while ((pin >= b->pin_base) && 365 ((b->pin_base + b->nr_pins - 1) < pin)) 366 b++; 367 368 *reg = b->pctl_base + b->pctl_offset; 369 *offset = pin - b->pin_base; 370 if (bank) 371 *bank = b; 372 } 373 374 /* enable or disable a pinmux function */ 375 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, 376 unsigned group) 377 { 378 struct samsung_pinctrl_drv_data *drvdata; 379 const struct samsung_pin_bank_type *type; 380 struct samsung_pin_bank *bank; 381 void __iomem *reg; 382 u32 mask, shift, data, pin_offset; 383 unsigned long flags; 384 const struct samsung_pmx_func *func; 385 const struct samsung_pin_group *grp; 386 387 drvdata = pinctrl_dev_get_drvdata(pctldev); 388 func = &drvdata->pmx_functions[selector]; 389 grp = &drvdata->pin_groups[group]; 390 391 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, 392 ®, &pin_offset, &bank); 393 type = bank->type; 394 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 395 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; 396 if (shift >= 32) { 397 /* Some banks have two config registers */ 398 shift -= 32; 399 reg += 4; 400 } 401 402 spin_lock_irqsave(&bank->slock, flags); 403 404 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); 405 data &= ~(mask << shift); 406 data |= func->val << shift; 407 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); 408 409 spin_unlock_irqrestore(&bank->slock, flags); 410 } 411 412 /* enable a specified pinmux by writing to registers */ 413 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, 414 unsigned selector, 415 unsigned group) 416 { 417 samsung_pinmux_setup(pctldev, selector, group); 418 return 0; 419 } 420 421 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ 422 static const struct pinmux_ops samsung_pinmux_ops = { 423 .get_functions_count = samsung_get_functions_count, 424 .get_function_name = samsung_pinmux_get_fname, 425 .get_function_groups = samsung_pinmux_get_groups, 426 .set_mux = samsung_pinmux_set_mux, 427 }; 428 429 /* set or get the pin config settings for a specified pin */ 430 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, 431 unsigned long *config, bool set) 432 { 433 struct samsung_pinctrl_drv_data *drvdata; 434 const struct samsung_pin_bank_type *type; 435 struct samsung_pin_bank *bank; 436 void __iomem *reg_base; 437 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 438 u32 data, width, pin_offset, mask, shift; 439 u32 cfg_value, cfg_reg; 440 unsigned long flags; 441 442 drvdata = pinctrl_dev_get_drvdata(pctldev); 443 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, 444 &pin_offset, &bank); 445 type = bank->type; 446 447 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) 448 return -EINVAL; 449 450 width = type->fld_width[cfg_type]; 451 cfg_reg = type->reg_offset[cfg_type]; 452 453 spin_lock_irqsave(&bank->slock, flags); 454 455 mask = (1 << width) - 1; 456 shift = pin_offset * width; 457 data = readl(reg_base + cfg_reg); 458 459 if (set) { 460 cfg_value = PINCFG_UNPACK_VALUE(*config); 461 data &= ~(mask << shift); 462 data |= (cfg_value << shift); 463 writel(data, reg_base + cfg_reg); 464 } else { 465 data >>= shift; 466 data &= mask; 467 *config = PINCFG_PACK(cfg_type, data); 468 } 469 470 spin_unlock_irqrestore(&bank->slock, flags); 471 472 return 0; 473 } 474 475 /* set the pin config settings for a specified pin */ 476 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, 477 unsigned long *configs, unsigned num_configs) 478 { 479 int i, ret; 480 481 for (i = 0; i < num_configs; i++) { 482 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); 483 if (ret < 0) 484 return ret; 485 } /* for each config */ 486 487 return 0; 488 } 489 490 /* get the pin config settings for a specified pin */ 491 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, 492 unsigned long *config) 493 { 494 return samsung_pinconf_rw(pctldev, pin, config, false); 495 } 496 497 /* set the pin config settings for a specified pin group */ 498 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, 499 unsigned group, unsigned long *configs, 500 unsigned num_configs) 501 { 502 struct samsung_pinctrl_drv_data *drvdata; 503 const unsigned int *pins; 504 unsigned int cnt; 505 506 drvdata = pinctrl_dev_get_drvdata(pctldev); 507 pins = drvdata->pin_groups[group].pins; 508 509 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) 510 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); 511 512 return 0; 513 } 514 515 /* get the pin config settings for a specified pin group */ 516 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, 517 unsigned int group, unsigned long *config) 518 { 519 struct samsung_pinctrl_drv_data *drvdata; 520 const unsigned int *pins; 521 522 drvdata = pinctrl_dev_get_drvdata(pctldev); 523 pins = drvdata->pin_groups[group].pins; 524 samsung_pinconf_get(pctldev, pins[0], config); 525 return 0; 526 } 527 528 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ 529 static const struct pinconf_ops samsung_pinconf_ops = { 530 .pin_config_get = samsung_pinconf_get, 531 .pin_config_set = samsung_pinconf_set, 532 .pin_config_group_get = samsung_pinconf_group_get, 533 .pin_config_group_set = samsung_pinconf_group_set, 534 }; 535 536 /* 537 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held 538 * to avoid race condition. 539 */ 540 static void samsung_gpio_set_value(struct gpio_chip *gc, 541 unsigned offset, int value) 542 { 543 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 544 const struct samsung_pin_bank_type *type = bank->type; 545 void __iomem *reg; 546 u32 data; 547 548 reg = bank->pctl_base + bank->pctl_offset; 549 550 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 551 data &= ~(1 << offset); 552 if (value) 553 data |= 1 << offset; 554 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); 555 } 556 557 /* gpiolib gpio_set callback function */ 558 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 559 { 560 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 561 unsigned long flags; 562 563 spin_lock_irqsave(&bank->slock, flags); 564 samsung_gpio_set_value(gc, offset, value); 565 spin_unlock_irqrestore(&bank->slock, flags); 566 } 567 568 /* gpiolib gpio_get callback function */ 569 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) 570 { 571 void __iomem *reg; 572 u32 data; 573 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 574 const struct samsung_pin_bank_type *type = bank->type; 575 576 reg = bank->pctl_base + bank->pctl_offset; 577 578 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); 579 data >>= offset; 580 data &= 1; 581 return data; 582 } 583 584 /* 585 * The samsung_gpio_set_direction() should be called with "bank->slock" held 586 * to avoid race condition. 587 * The calls to gpio_direction_output() and gpio_direction_input() 588 * leads to this function call. 589 */ 590 static int samsung_gpio_set_direction(struct gpio_chip *gc, 591 unsigned offset, bool input) 592 { 593 const struct samsung_pin_bank_type *type; 594 struct samsung_pin_bank *bank; 595 void __iomem *reg; 596 u32 data, mask, shift; 597 598 bank = gpiochip_get_data(gc); 599 type = bank->type; 600 601 reg = bank->pctl_base + bank->pctl_offset 602 + type->reg_offset[PINCFG_TYPE_FUNC]; 603 604 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; 605 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; 606 if (shift >= 32) { 607 /* Some banks have two config registers */ 608 shift -= 32; 609 reg += 4; 610 } 611 612 data = readl(reg); 613 data &= ~(mask << shift); 614 if (!input) 615 data |= EXYNOS_PIN_FUNC_OUTPUT << shift; 616 writel(data, reg); 617 618 return 0; 619 } 620 621 /* gpiolib gpio_direction_input callback function. */ 622 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 623 { 624 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 625 unsigned long flags; 626 int ret; 627 628 spin_lock_irqsave(&bank->slock, flags); 629 ret = samsung_gpio_set_direction(gc, offset, true); 630 spin_unlock_irqrestore(&bank->slock, flags); 631 return ret; 632 } 633 634 /* gpiolib gpio_direction_output callback function. */ 635 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, 636 int value) 637 { 638 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 639 unsigned long flags; 640 int ret; 641 642 spin_lock_irqsave(&bank->slock, flags); 643 samsung_gpio_set_value(gc, offset, value); 644 ret = samsung_gpio_set_direction(gc, offset, false); 645 spin_unlock_irqrestore(&bank->slock, flags); 646 647 return ret; 648 } 649 650 /* 651 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin 652 * and a virtual IRQ, if not already present. 653 */ 654 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) 655 { 656 struct samsung_pin_bank *bank = gpiochip_get_data(gc); 657 unsigned int virq; 658 659 if (!bank->irq_domain) 660 return -ENXIO; 661 662 virq = irq_create_mapping(bank->irq_domain, offset); 663 664 return (virq) ? : -ENXIO; 665 } 666 667 static struct samsung_pin_group *samsung_pinctrl_create_groups( 668 struct device *dev, 669 struct samsung_pinctrl_drv_data *drvdata, 670 unsigned int *cnt) 671 { 672 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 673 struct samsung_pin_group *groups, *grp; 674 const struct pinctrl_pin_desc *pdesc; 675 int i; 676 677 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups), 678 GFP_KERNEL); 679 if (!groups) 680 return ERR_PTR(-EINVAL); 681 grp = groups; 682 683 pdesc = ctrldesc->pins; 684 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { 685 grp->name = pdesc->name; 686 grp->pins = &pdesc->number; 687 grp->num_pins = 1; 688 } 689 690 *cnt = ctrldesc->npins; 691 return groups; 692 } 693 694 static int samsung_pinctrl_create_function(struct device *dev, 695 struct samsung_pinctrl_drv_data *drvdata, 696 struct device_node *func_np, 697 struct samsung_pmx_func *func) 698 { 699 int npins; 700 int ret; 701 int i; 702 703 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) 704 return 0; 705 706 npins = of_property_count_strings(func_np, "samsung,pins"); 707 if (npins < 1) { 708 dev_err(dev, "invalid pin list in %pOFn node", func_np); 709 return -EINVAL; 710 } 711 712 func->name = func_np->full_name; 713 714 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL); 715 if (!func->groups) 716 return -ENOMEM; 717 718 for (i = 0; i < npins; ++i) { 719 const char *gname; 720 721 ret = of_property_read_string_index(func_np, "samsung,pins", 722 i, &gname); 723 if (ret) { 724 dev_err(dev, 725 "failed to read pin name %d from %pOFn node\n", 726 i, func_np); 727 return ret; 728 } 729 730 func->groups[i] = gname; 731 } 732 733 func->num_groups = npins; 734 return 1; 735 } 736 737 static struct samsung_pmx_func *samsung_pinctrl_create_functions( 738 struct device *dev, 739 struct samsung_pinctrl_drv_data *drvdata, 740 unsigned int *cnt) 741 { 742 struct samsung_pmx_func *functions, *func; 743 struct device_node *dev_np = dev->of_node; 744 struct device_node *cfg_np; 745 unsigned int func_cnt = 0; 746 int ret; 747 748 /* 749 * Iterate over all the child nodes of the pin controller node 750 * and create pin groups and pin function lists. 751 */ 752 for_each_child_of_node(dev_np, cfg_np) { 753 struct device_node *func_np; 754 755 if (!of_get_child_count(cfg_np)) { 756 if (!of_find_property(cfg_np, 757 "samsung,pin-function", NULL)) 758 continue; 759 ++func_cnt; 760 continue; 761 } 762 763 for_each_child_of_node(cfg_np, func_np) { 764 if (!of_find_property(func_np, 765 "samsung,pin-function", NULL)) 766 continue; 767 ++func_cnt; 768 } 769 } 770 771 functions = devm_kcalloc(dev, func_cnt, sizeof(*functions), 772 GFP_KERNEL); 773 if (!functions) 774 return ERR_PTR(-ENOMEM); 775 func = functions; 776 777 /* 778 * Iterate over all the child nodes of the pin controller node 779 * and create pin groups and pin function lists. 780 */ 781 func_cnt = 0; 782 for_each_child_of_node(dev_np, cfg_np) { 783 struct device_node *func_np; 784 785 if (!of_get_child_count(cfg_np)) { 786 ret = samsung_pinctrl_create_function(dev, drvdata, 787 cfg_np, func); 788 if (ret < 0) 789 return ERR_PTR(ret); 790 if (ret > 0) { 791 ++func; 792 ++func_cnt; 793 } 794 continue; 795 } 796 797 for_each_child_of_node(cfg_np, func_np) { 798 ret = samsung_pinctrl_create_function(dev, drvdata, 799 func_np, func); 800 if (ret < 0) 801 return ERR_PTR(ret); 802 if (ret > 0) { 803 ++func; 804 ++func_cnt; 805 } 806 } 807 } 808 809 *cnt = func_cnt; 810 return functions; 811 } 812 813 /* 814 * Parse the information about all the available pin groups and pin functions 815 * from device node of the pin-controller. A pin group is formed with all 816 * the pins listed in the "samsung,pins" property. 817 */ 818 819 static int samsung_pinctrl_parse_dt(struct platform_device *pdev, 820 struct samsung_pinctrl_drv_data *drvdata) 821 { 822 struct device *dev = &pdev->dev; 823 struct samsung_pin_group *groups; 824 struct samsung_pmx_func *functions; 825 unsigned int grp_cnt = 0, func_cnt = 0; 826 827 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); 828 if (IS_ERR(groups)) { 829 dev_err(dev, "failed to parse pin groups\n"); 830 return PTR_ERR(groups); 831 } 832 833 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); 834 if (IS_ERR(functions)) { 835 dev_err(dev, "failed to parse pin functions\n"); 836 return PTR_ERR(functions); 837 } 838 839 drvdata->pin_groups = groups; 840 drvdata->nr_groups = grp_cnt; 841 drvdata->pmx_functions = functions; 842 drvdata->nr_functions = func_cnt; 843 844 return 0; 845 } 846 847 /* register the pinctrl interface with the pinctrl subsystem */ 848 static int samsung_pinctrl_register(struct platform_device *pdev, 849 struct samsung_pinctrl_drv_data *drvdata) 850 { 851 struct pinctrl_desc *ctrldesc = &drvdata->pctl; 852 struct pinctrl_pin_desc *pindesc, *pdesc; 853 struct samsung_pin_bank *pin_bank; 854 char *pin_names; 855 int pin, bank, ret; 856 857 ctrldesc->name = "samsung-pinctrl"; 858 ctrldesc->owner = THIS_MODULE; 859 ctrldesc->pctlops = &samsung_pctrl_ops; 860 ctrldesc->pmxops = &samsung_pinmux_ops; 861 ctrldesc->confops = &samsung_pinconf_ops; 862 863 pindesc = devm_kcalloc(&pdev->dev, 864 drvdata->nr_pins, sizeof(*pindesc), 865 GFP_KERNEL); 866 if (!pindesc) 867 return -ENOMEM; 868 ctrldesc->pins = pindesc; 869 ctrldesc->npins = drvdata->nr_pins; 870 871 /* dynamically populate the pin number and pin name for pindesc */ 872 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) 873 pdesc->number = pin + drvdata->pin_base; 874 875 /* 876 * allocate space for storing the dynamically generated names for all 877 * the pins which belong to this pin-controller. 878 */ 879 pin_names = devm_kzalloc(&pdev->dev, 880 array3_size(sizeof(char), PIN_NAME_LENGTH, 881 drvdata->nr_pins), 882 GFP_KERNEL); 883 if (!pin_names) 884 return -ENOMEM; 885 886 /* for each pin, the name of the pin is pin-bank name + pin number */ 887 for (bank = 0; bank < drvdata->nr_banks; bank++) { 888 pin_bank = &drvdata->pin_banks[bank]; 889 for (pin = 0; pin < pin_bank->nr_pins; pin++) { 890 sprintf(pin_names, "%s-%d", pin_bank->name, pin); 891 pdesc = pindesc + pin_bank->pin_base + pin; 892 pdesc->name = pin_names; 893 pin_names += PIN_NAME_LENGTH; 894 } 895 } 896 897 ret = samsung_pinctrl_parse_dt(pdev, drvdata); 898 if (ret) 899 return ret; 900 901 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, 902 drvdata); 903 if (IS_ERR(drvdata->pctl_dev)) { 904 dev_err(&pdev->dev, "could not register pinctrl driver\n"); 905 return PTR_ERR(drvdata->pctl_dev); 906 } 907 908 for (bank = 0; bank < drvdata->nr_banks; ++bank) { 909 pin_bank = &drvdata->pin_banks[bank]; 910 pin_bank->grange.name = pin_bank->name; 911 pin_bank->grange.id = bank; 912 pin_bank->grange.pin_base = drvdata->pin_base 913 + pin_bank->pin_base; 914 pin_bank->grange.base = pin_bank->grange.pin_base; 915 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; 916 pin_bank->grange.gc = &pin_bank->gpio_chip; 917 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); 918 } 919 920 return 0; 921 } 922 923 /* unregister the pinctrl interface with the pinctrl subsystem */ 924 static int samsung_pinctrl_unregister(struct platform_device *pdev, 925 struct samsung_pinctrl_drv_data *drvdata) 926 { 927 struct samsung_pin_bank *bank = drvdata->pin_banks; 928 int i; 929 930 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) 931 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); 932 933 return 0; 934 } 935 936 static const struct gpio_chip samsung_gpiolib_chip = { 937 .request = gpiochip_generic_request, 938 .free = gpiochip_generic_free, 939 .set = samsung_gpio_set, 940 .get = samsung_gpio_get, 941 .direction_input = samsung_gpio_direction_input, 942 .direction_output = samsung_gpio_direction_output, 943 .to_irq = samsung_gpio_to_irq, 944 .owner = THIS_MODULE, 945 }; 946 947 /* register the gpiolib interface with the gpiolib subsystem */ 948 static int samsung_gpiolib_register(struct platform_device *pdev, 949 struct samsung_pinctrl_drv_data *drvdata) 950 { 951 struct samsung_pin_bank *bank = drvdata->pin_banks; 952 struct gpio_chip *gc; 953 int ret; 954 int i; 955 956 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { 957 bank->gpio_chip = samsung_gpiolib_chip; 958 959 gc = &bank->gpio_chip; 960 gc->base = bank->grange.base; 961 gc->ngpio = bank->nr_pins; 962 gc->parent = &pdev->dev; 963 gc->of_node = bank->of_node; 964 gc->label = bank->name; 965 966 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); 967 if (ret) { 968 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", 969 gc->label, ret); 970 return ret; 971 } 972 } 973 974 return 0; 975 } 976 977 static const struct samsung_pin_ctrl * 978 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev) 979 { 980 struct device_node *node = pdev->dev.of_node; 981 const struct samsung_pinctrl_of_match_data *of_data; 982 int id; 983 984 id = of_alias_get_id(node, "pinctrl"); 985 if (id < 0) { 986 dev_err(&pdev->dev, "failed to get alias id\n"); 987 return NULL; 988 } 989 990 of_data = of_device_get_match_data(&pdev->dev); 991 if (id >= of_data->num_ctrl) { 992 dev_err(&pdev->dev, "invalid alias id %d\n", id); 993 return NULL; 994 } 995 996 return &(of_data->ctrl[id]); 997 } 998 999 /* retrieve the soc specific data */ 1000 static const struct samsung_pin_ctrl * 1001 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, 1002 struct platform_device *pdev) 1003 { 1004 struct device_node *node = pdev->dev.of_node; 1005 struct device_node *np; 1006 const struct samsung_pin_bank_data *bdata; 1007 const struct samsung_pin_ctrl *ctrl; 1008 struct samsung_pin_bank *bank; 1009 struct resource *res; 1010 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; 1011 unsigned int i; 1012 1013 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev); 1014 if (!ctrl) 1015 return ERR_PTR(-ENOENT); 1016 1017 d->suspend = ctrl->suspend; 1018 d->resume = ctrl->resume; 1019 d->nr_banks = ctrl->nr_banks; 1020 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, 1021 sizeof(*d->pin_banks), GFP_KERNEL); 1022 if (!d->pin_banks) 1023 return ERR_PTR(-ENOMEM); 1024 1025 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) 1026 return ERR_PTR(-EINVAL); 1027 1028 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { 1029 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 1030 if (!res) { 1031 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); 1032 return ERR_PTR(-EINVAL); 1033 } 1034 virt_base[i] = devm_ioremap(&pdev->dev, res->start, 1035 resource_size(res)); 1036 if (!virt_base[i]) { 1037 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); 1038 return ERR_PTR(-EIO); 1039 } 1040 } 1041 1042 bank = d->pin_banks; 1043 bdata = ctrl->pin_banks; 1044 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { 1045 bank->type = bdata->type; 1046 bank->pctl_offset = bdata->pctl_offset; 1047 bank->nr_pins = bdata->nr_pins; 1048 bank->eint_func = bdata->eint_func; 1049 bank->eint_type = bdata->eint_type; 1050 bank->eint_mask = bdata->eint_mask; 1051 bank->eint_offset = bdata->eint_offset; 1052 bank->name = bdata->name; 1053 1054 spin_lock_init(&bank->slock); 1055 bank->drvdata = d; 1056 bank->pin_base = d->nr_pins; 1057 d->nr_pins += bank->nr_pins; 1058 1059 bank->eint_base = virt_base[0]; 1060 bank->pctl_base = virt_base[bdata->pctl_res_idx]; 1061 } 1062 /* 1063 * Legacy platforms should provide only one resource with IO memory. 1064 * Store it as virt_base because legacy driver needs to access it 1065 * through samsung_pinctrl_drv_data. 1066 */ 1067 d->virt_base = virt_base[0]; 1068 1069 for_each_child_of_node(node, np) { 1070 if (!of_find_property(np, "gpio-controller", NULL)) 1071 continue; 1072 bank = d->pin_banks; 1073 for (i = 0; i < d->nr_banks; ++i, ++bank) { 1074 if (!strcmp(bank->name, np->name)) { 1075 bank->of_node = np; 1076 break; 1077 } 1078 } 1079 } 1080 1081 d->pin_base = pin_base; 1082 pin_base += d->nr_pins; 1083 1084 return ctrl; 1085 } 1086 1087 static int samsung_pinctrl_probe(struct platform_device *pdev) 1088 { 1089 struct samsung_pinctrl_drv_data *drvdata; 1090 const struct samsung_pin_ctrl *ctrl; 1091 struct device *dev = &pdev->dev; 1092 struct resource *res; 1093 int ret; 1094 1095 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 1096 if (!drvdata) 1097 return -ENOMEM; 1098 1099 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); 1100 if (IS_ERR(ctrl)) { 1101 dev_err(&pdev->dev, "driver data not available\n"); 1102 return PTR_ERR(ctrl); 1103 } 1104 drvdata->dev = dev; 1105 1106 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1107 if (res) 1108 drvdata->irq = res->start; 1109 1110 if (ctrl->retention_data) { 1111 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, 1112 ctrl->retention_data); 1113 if (IS_ERR(drvdata->retention_ctrl)) 1114 return PTR_ERR(drvdata->retention_ctrl); 1115 } 1116 1117 ret = samsung_pinctrl_register(pdev, drvdata); 1118 if (ret) 1119 return ret; 1120 1121 ret = samsung_gpiolib_register(pdev, drvdata); 1122 if (ret) { 1123 samsung_pinctrl_unregister(pdev, drvdata); 1124 return ret; 1125 } 1126 1127 if (ctrl->eint_gpio_init) 1128 ctrl->eint_gpio_init(drvdata); 1129 if (ctrl->eint_wkup_init) 1130 ctrl->eint_wkup_init(drvdata); 1131 1132 platform_set_drvdata(pdev, drvdata); 1133 1134 return 0; 1135 } 1136 1137 /** 1138 * samsung_pinctrl_suspend - save pinctrl state for suspend 1139 * 1140 * Save data for all banks handled by this device. 1141 */ 1142 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) 1143 { 1144 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1145 int i; 1146 1147 for (i = 0; i < drvdata->nr_banks; i++) { 1148 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1149 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1150 const u8 *offs = bank->type->reg_offset; 1151 const u8 *widths = bank->type->fld_width; 1152 enum pincfg_type type; 1153 1154 /* Registers without a powerdown config aren't lost */ 1155 if (!widths[PINCFG_TYPE_CON_PDN]) 1156 continue; 1157 1158 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1159 if (widths[type]) 1160 bank->pm_save[type] = readl(reg + offs[type]); 1161 1162 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1163 /* Some banks have two config registers */ 1164 bank->pm_save[PINCFG_TYPE_NUM] = 1165 readl(reg + offs[PINCFG_TYPE_FUNC] + 4); 1166 pr_debug("Save %s @ %p (con %#010x %08x)\n", 1167 bank->name, reg, 1168 bank->pm_save[PINCFG_TYPE_FUNC], 1169 bank->pm_save[PINCFG_TYPE_NUM]); 1170 } else { 1171 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, 1172 reg, bank->pm_save[PINCFG_TYPE_FUNC]); 1173 } 1174 } 1175 1176 if (drvdata->suspend) 1177 drvdata->suspend(drvdata); 1178 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) 1179 drvdata->retention_ctrl->enable(drvdata); 1180 1181 return 0; 1182 } 1183 1184 /** 1185 * samsung_pinctrl_resume - restore pinctrl state from suspend 1186 * 1187 * Restore one of the banks that was saved during suspend. 1188 * 1189 * We don't bother doing anything complicated to avoid glitching lines since 1190 * we're called before pad retention is turned off. 1191 */ 1192 static int __maybe_unused samsung_pinctrl_resume(struct device *dev) 1193 { 1194 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); 1195 int i; 1196 1197 if (drvdata->resume) 1198 drvdata->resume(drvdata); 1199 1200 for (i = 0; i < drvdata->nr_banks; i++) { 1201 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; 1202 void __iomem *reg = bank->pctl_base + bank->pctl_offset; 1203 const u8 *offs = bank->type->reg_offset; 1204 const u8 *widths = bank->type->fld_width; 1205 enum pincfg_type type; 1206 1207 /* Registers without a powerdown config aren't lost */ 1208 if (!widths[PINCFG_TYPE_CON_PDN]) 1209 continue; 1210 1211 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { 1212 /* Some banks have two config registers */ 1213 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", 1214 bank->name, reg, 1215 readl(reg + offs[PINCFG_TYPE_FUNC]), 1216 readl(reg + offs[PINCFG_TYPE_FUNC] + 4), 1217 bank->pm_save[PINCFG_TYPE_FUNC], 1218 bank->pm_save[PINCFG_TYPE_NUM]); 1219 writel(bank->pm_save[PINCFG_TYPE_NUM], 1220 reg + offs[PINCFG_TYPE_FUNC] + 4); 1221 } else { 1222 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, 1223 reg, readl(reg + offs[PINCFG_TYPE_FUNC]), 1224 bank->pm_save[PINCFG_TYPE_FUNC]); 1225 } 1226 for (type = 0; type < PINCFG_TYPE_NUM; type++) 1227 if (widths[type]) 1228 writel(bank->pm_save[type], reg + offs[type]); 1229 } 1230 1231 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) 1232 drvdata->retention_ctrl->disable(drvdata); 1233 1234 return 0; 1235 } 1236 1237 static const struct of_device_id samsung_pinctrl_dt_match[] = { 1238 #ifdef CONFIG_PINCTRL_EXYNOS_ARM 1239 { .compatible = "samsung,exynos3250-pinctrl", 1240 .data = &exynos3250_of_data }, 1241 { .compatible = "samsung,exynos4210-pinctrl", 1242 .data = &exynos4210_of_data }, 1243 { .compatible = "samsung,exynos4x12-pinctrl", 1244 .data = &exynos4x12_of_data }, 1245 { .compatible = "samsung,exynos5250-pinctrl", 1246 .data = &exynos5250_of_data }, 1247 { .compatible = "samsung,exynos5260-pinctrl", 1248 .data = &exynos5260_of_data }, 1249 { .compatible = "samsung,exynos5410-pinctrl", 1250 .data = &exynos5410_of_data }, 1251 { .compatible = "samsung,exynos5420-pinctrl", 1252 .data = &exynos5420_of_data }, 1253 { .compatible = "samsung,s5pv210-pinctrl", 1254 .data = &s5pv210_of_data }, 1255 #endif 1256 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64 1257 { .compatible = "samsung,exynos5433-pinctrl", 1258 .data = &exynos5433_of_data }, 1259 { .compatible = "samsung,exynos7-pinctrl", 1260 .data = &exynos7_of_data }, 1261 #endif 1262 #ifdef CONFIG_PINCTRL_S3C64XX 1263 { .compatible = "samsung,s3c64xx-pinctrl", 1264 .data = &s3c64xx_of_data }, 1265 #endif 1266 #ifdef CONFIG_PINCTRL_S3C24XX 1267 { .compatible = "samsung,s3c2412-pinctrl", 1268 .data = &s3c2412_of_data }, 1269 { .compatible = "samsung,s3c2416-pinctrl", 1270 .data = &s3c2416_of_data }, 1271 { .compatible = "samsung,s3c2440-pinctrl", 1272 .data = &s3c2440_of_data }, 1273 { .compatible = "samsung,s3c2450-pinctrl", 1274 .data = &s3c2450_of_data }, 1275 #endif 1276 {}, 1277 }; 1278 1279 static const struct dev_pm_ops samsung_pinctrl_pm_ops = { 1280 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, 1281 samsung_pinctrl_resume) 1282 }; 1283 1284 static struct platform_driver samsung_pinctrl_driver = { 1285 .probe = samsung_pinctrl_probe, 1286 .driver = { 1287 .name = "samsung-pinctrl", 1288 .of_match_table = samsung_pinctrl_dt_match, 1289 .suppress_bind_attrs = true, 1290 .pm = &samsung_pinctrl_pm_ops, 1291 }, 1292 }; 1293 1294 static int __init samsung_pinctrl_drv_register(void) 1295 { 1296 return platform_driver_register(&samsung_pinctrl_driver); 1297 } 1298 postcore_initcall(samsung_pinctrl_drv_register); 1299